* [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support
@ 2013-01-14 7:34 Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 01/12] spi/atmel_spi: add physical base address Wenyou Yang
` (13 more replies)
0 siblings, 14 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang
Hi All,
This set of patches is to add dmaengine and device tree support for atmel spi.
The work is based on Nicolas and Richard's work.
It is tested on at91sam9x5ek, at91sam9m10g45ek, at91sam9263ek and at91sam9g20ek.
It is based on v3.8-rc3.
Changelog:
v4:
1./ Take Joe Perches's advance, rewrite atmel_spi_is_v2(struct atmel_spi *as)
and atmel_spi_use_dma(struct atmel_spi *as),
and remove atmel_spi_use_pdc(struct atmel_spi *as).
2./ Rebase on v3.8-rc3.
V3:
1./ Rebase on v3.8-rc2.
2./ Remove some Jean-Christophe's patches which has been
applied on v3.8-rc2.
3./ Remove spi property "cs-gpios" from the SoC dtsi files
to the board dts files to avoid some useless pin conflicts.
v2:
1./ Remove the patch :PATCH]mtd: m25p80: change the m25p80_read to reading page to page
which purpose to fix the BUG: when run "flashcp /bin/busybox /dev/mtdX" in
the at91sam9g25ek with DMA mode, it arises a OOPS.
Now fix it in this patch:
[PATHC] spi/atmel_spi: add dmaengine support changing to fix the [BUG].
2./ Remove two patches:
which purpose to read dts property to select SPI IP version and DMA mode
Now they will be gat from device tree different compatile.
3./ Fix DMA: when enable both spi0 AND spi1, the spi0 doesn't work BUG.
4./ Rebase v3.7-rc8.
Best Regards,
Wenyou Yang.
Nicolas Ferre (5):
spi/atmel_spi: add physical base address
spi/atmel_spi: call unmapping on transfers buffers
spi/atmel_spi: status information passed through controller data
spi/atmel_spi: add flag to controller data for lock operations
spi/atmel_spi: add dmaengine support
Richard Genoud (6):
spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes
spi/atmel_spi: correct 16 bits transfers using PIO
spi/atmel_spi: correct 16 bits transfer with DMA
ARM: at91: add clocks for spi dt entries
ARM: dts: add spi nodes for atmel SoC
ARM: dts: add spi nodes for the atmel boards
Wenyou Yang (1):
spi/atmel_spi: update the dt support
arch/arm/boot/dts/at91sam9260.dtsi | 18 +
arch/arm/boot/dts/at91sam9263.dtsi | 18 +
arch/arm/boot/dts/at91sam9263ek.dts | 14 +
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 +
arch/arm/boot/dts/at91sam9g45.dtsi | 18 +
arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 +
arch/arm/boot/dts/at91sam9n12.dtsi | 18 +
arch/arm/boot/dts/at91sam9n12ek.dts | 14 +
arch/arm/boot/dts/at91sam9x5.dtsi | 18 +
arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 +
arch/arm/mach-at91/at91sam9260.c | 2 +
arch/arm/mach-at91/at91sam9g45.c | 2 +
arch/arm/mach-at91/at91sam9n12.c | 2 +
arch/arm/mach-at91/at91sam9x5.c | 2 +
drivers/spi/spi-atmel.c | 809 ++++++++++++++++++++++++---
15 files changed, 908 insertions(+), 69 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 29+ messages in thread
* [v4 PATCH 01/12] spi/atmel_spi: add physical base address
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 02/12] spi/atmel_spi: call unmapping on transfers buffers Wenyou Yang
` (12 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Nicolas Ferre <nicolas.ferre@atmel.com>
Needed for future use with dmaengine enabled driver.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
---
drivers/spi/spi-atmel.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index ab34497..4516839 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -189,6 +189,7 @@
struct atmel_spi {
spinlock_t lock;
+ resource_size_t phybase;
void __iomem *regs;
int irq;
struct clk *clk;
@@ -967,6 +968,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
as->regs = ioremap(regs->start, resource_size(regs));
if (!as->regs)
goto out_free_buffer;
+ as->phybase = regs->start;
as->irq = irq;
as->clk = clk;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 02/12] spi/atmel_spi: call unmapping on transfers buffers
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 01/12] spi/atmel_spi: add physical base address Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 03/12] spi/atmel_spi: status information passed through controller data Wenyou Yang
` (11 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
---
drivers/spi/spi-atmel.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 4516839..9782206 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -1016,6 +1016,7 @@ static int atmel_spi_remove(struct platform_device *pdev)
struct spi_master *master = platform_get_drvdata(pdev);
struct atmel_spi *as = spi_master_get_devdata(master);
struct spi_message *msg;
+ struct spi_transfer *xfer;
/* reset the hardware and block queue progress */
spin_lock_irq(&as->lock);
@@ -1027,9 +1028,10 @@ static int atmel_spi_remove(struct platform_device *pdev)
/* Terminate remaining queued transfers */
list_for_each_entry(msg, &as->queue, queue) {
- /* REVISIT unmapping the dma is a NOP on ARM and AVR32
- * but we shouldn't depend on that...
- */
+ list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+ if (!msg->is_dma_mapped)
+ atmel_spi_dma_unmap_xfer(master, xfer);
+ }
msg->status = -ESHUTDOWN;
msg->complete(msg->context);
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 03/12] spi/atmel_spi: status information passed through controller data
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 01/12] spi/atmel_spi: add physical base address Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 02/12] spi/atmel_spi: call unmapping on transfers buffers Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 04/12] spi/atmel_spi: add flag to controller data for lock operations Wenyou Yang
` (10 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Nicolas Ferre <nicolas.ferre@atmel.com>
The status of transfer is stored in controller data structure
so that it can be used not only by atmel_spi_msg_done() function.
This will be useful for upcoming dmaengine enabled driver.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
---
drivers/spi/spi-atmel.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 9782206..687075e 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -202,6 +202,7 @@ struct atmel_spi {
unsigned long current_remaining_bytes;
struct spi_transfer *next_transfer;
unsigned long next_remaining_bytes;
+ int done_status;
void *buffer;
dma_addr_t buffer_dma;
@@ -545,15 +546,15 @@ static void atmel_spi_dma_unmap_xfer(struct spi_master *master,
static void
atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
- struct spi_message *msg, int status, int stay)
+ struct spi_message *msg, int stay)
{
- if (!stay || status < 0)
+ if (!stay || as->done_status < 0)
cs_deactivate(as, msg->spi);
else
as->stay = msg->spi;
list_del(&msg->queue);
- msg->status = status;
+ msg->status = as->done_status;
dev_dbg(master->dev.parent,
"xfer complete: %u bytes transferred\n",
@@ -565,6 +566,7 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
as->current_transfer = NULL;
as->next_transfer = NULL;
+ as->done_status = 0;
/* continue if needed */
if (list_empty(&as->queue) || as->stopping)
@@ -642,7 +644,8 @@ atmel_spi_interrupt(int irq, void *dev_id)
/* Clear any overrun happening while cleaning up */
spi_readl(as, SR);
- atmel_spi_msg_done(master, as, msg, -EIO, 0);
+ as->done_status = -EIO;
+ atmel_spi_msg_done(master, as, msg, 0);
} else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) {
ret = IRQ_HANDLED;
@@ -660,7 +663,7 @@ atmel_spi_interrupt(int irq, void *dev_id)
if (atmel_spi_xfer_is_last(msg, xfer)) {
/* report completed message */
- atmel_spi_msg_done(master, as, msg, 0,
+ atmel_spi_msg_done(master, as, msg,
xfer->cs_change);
} else {
if (xfer->cs_change) {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 04/12] spi/atmel_spi: add flag to controller data for lock operations
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (2 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 03/12] spi/atmel_spi: status information passed through controller data Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 05/12] spi/atmel_spi: update the dt support Wenyou Yang
` (9 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Nicolas Ferre <nicolas.ferre@atmel.com>
Will allow to drop the lock during DMA operations.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
---
drivers/spi/spi-atmel.c | 31 +++++++++++++++++++------------
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 687075e..8f6f0a0 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -188,6 +188,7 @@
*/
struct atmel_spi {
spinlock_t lock;
+ unsigned long flags;
resource_size_t phybase;
void __iomem *regs;
@@ -324,6 +325,16 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
gpio_set_value(asd->npcs_pin, !active);
}
+static void atmel_spi_lock(struct atmel_spi *as)
+{
+ spin_lock_irqsave(&as->lock, as->flags);
+}
+
+static void atmel_spi_unlock(struct atmel_spi *as)
+{
+ spin_unlock_irqrestore(&as->lock, as->flags);
+}
+
static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
struct spi_transfer *xfer)
{
@@ -560,9 +571,9 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
"xfer complete: %u bytes transferred\n",
msg->actual_length);
- spin_unlock(&as->lock);
+ atmel_spi_unlock(as);
msg->complete(msg->context);
- spin_lock(&as->lock);
+ atmel_spi_lock(as);
as->current_transfer = NULL;
as->next_transfer = NULL;
@@ -793,13 +804,11 @@ static int atmel_spi_setup(struct spi_device *spi)
spi->controller_state = asd;
gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH));
} else {
- unsigned long flags;
-
- spin_lock_irqsave(&as->lock, flags);
+ atmel_spi_lock(as);
if (as->stay == spi)
as->stay = NULL;
cs_deactivate(as, spi);
- spin_unlock_irqrestore(&as->lock, flags);
+ atmel_spi_unlock(as);
}
asd->csr = csr;
@@ -818,7 +827,6 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
{
struct atmel_spi *as;
struct spi_transfer *xfer;
- unsigned long flags;
struct device *controller = spi->master->dev.parent;
u8 bits;
struct atmel_spi_device *asd;
@@ -883,11 +891,11 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
msg->status = -EINPROGRESS;
msg->actual_length = 0;
- spin_lock_irqsave(&as->lock, flags);
+ atmel_spi_lock(as);
list_add_tail(&msg->queue, &as->queue);
if (!as->current_transfer)
atmel_spi_next_message(spi->master);
- spin_unlock_irqrestore(&as->lock, flags);
+ atmel_spi_unlock(as);
return 0;
}
@@ -897,17 +905,16 @@ static void atmel_spi_cleanup(struct spi_device *spi)
struct atmel_spi *as = spi_master_get_devdata(spi->master);
struct atmel_spi_device *asd = spi->controller_state;
unsigned gpio = (unsigned) spi->controller_data;
- unsigned long flags;
if (!asd)
return;
- spin_lock_irqsave(&as->lock, flags);
+ atmel_spi_lock(as);
if (as->stay == spi) {
as->stay = NULL;
cs_deactivate(as, spi);
}
- spin_unlock_irqrestore(&as->lock, flags);
+ atmel_spi_unlock(as);
spi->controller_state = NULL;
gpio_free(gpio);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 05/12] spi/atmel_spi: update the dt support
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (3 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 04/12] spi/atmel_spi: add flag to controller data for lock operations Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-02-05 20:04 ` Jean-Christophe PLAGNIOL-VILLARD
2013-01-14 7:34 ` [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support Wenyou Yang
` (8 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang
To meet the different spi IP version of atmel SoC,
add the more compatible with different config and devtype.
The "has_dma_support" is used to select the dma engine transfer mode.
The "has_wdrbt" indicate if there is the "WDRBT" bit in the Mode Register,
WDRBT (Wait Data Read Before Transfer),if WDRBT is set,
a transfer can start only if the Receive Data Register is empty,i.e. does not
contain any unread data, to prevent overrun error in reception
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
drivers/spi/spi-atmel.c | 134 ++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 115 insertions(+), 19 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 8f6f0a0..43c1f63 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -71,6 +71,8 @@
#define SPI_FDIV_SIZE 1
#define SPI_MODFDIS_OFFSET 4
#define SPI_MODFDIS_SIZE 1
+#define SPI_WDRBT_OFFSET 5
+#define SPI_WDRBT_SIZE 1
#define SPI_LLB_OFFSET 7
#define SPI_LLB_SIZE 1
#define SPI_PCS_OFFSET 16
@@ -186,6 +188,12 @@
* DMA transfers; transfer queue progress is driven by IRQs. The clock
* framework provides the base clock, subdivided for each spi_device.
*/
+struct atmel_spi_pdata {
+ u8 version;
+ bool has_dma_support;
+ bool has_wdrbt;
+};
+
struct atmel_spi {
spinlock_t lock;
unsigned long flags;
@@ -204,6 +212,7 @@ struct atmel_spi {
struct spi_transfer *next_transfer;
unsigned long next_remaining_bytes;
int done_status;
+ struct atmel_spi_pdata *pdata;
void *buffer;
dma_addr_t buffer_dma;
@@ -218,6 +227,69 @@ struct atmel_spi_device {
#define BUFFER_SIZE PAGE_SIZE
#define INVALID_DMA_ADDRESS 0xffffffff
+static struct atmel_spi_pdata at91rm9200_config = {
+ .version = 1,
+ .has_dma_support = false,
+ .has_wdrbt = false,
+};
+
+static struct atmel_spi_pdata at91sam9260_config = {
+ .version = 2,
+ .has_dma_support = false,
+ .has_wdrbt = false,
+};
+
+static struct atmel_spi_pdata at91sam9g45_config = {
+ .version = 2,
+ .has_dma_support = false,
+ .has_wdrbt = true,
+};
+
+static struct atmel_spi_pdata at91sam9x5_config = {
+ .version = 2,
+ .has_dma_support = true,
+ .has_wdrbt = true,
+};
+
+static const struct platform_device_id atmel_spi_devtypes[] = {
+ {
+ .name = "spi-at91rm9200",
+ .driver_data = (unsigned long) &at91rm9200_config,
+ }, {
+ .name = "spi-at91sam9260",
+ .driver_data = (unsigned long) &at91sam9260_config,
+ }, {
+ .name = "spi-at91sam9g45",
+ .driver_data = (unsigned long) &at91sam9g45_config,
+ }, {
+ .name = "spi-at91sam9x5",
+ .driver_data = (unsigned long) &at91sam9x5_config,
+ }, {
+ /* sentinel */
+ }
+};
+
+#if defined(CONFIG_OF)
+static const struct of_device_id atmel_spi_dt_ids[] = {
+ {
+ .compatible = "atmel,at91rm9200-spi",
+ .data = &at91rm9200_config,
+ } , {
+ .compatible = "atmel,at91sam9260-spi",
+ .data = &at91sam9260_config,
+ } , {
+ .compatible = "atmel,at91sam9g45-spi",
+ .data = &at91sam9g45_config,
+ } , {
+ .compatible = "atmel,at91sam9x5-spi",
+ .data = &at91sam9x5_config,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids);
+#endif
+
/*
* Version 2 of the SPI controller has
* - CR.LASTXFER
@@ -230,11 +302,12 @@ struct atmel_spi_device {
* register, but I haven't checked that it exists on all chips, and
* this is cheaper anyway.
*/
-static bool atmel_spi_is_v2(void)
+static bool atmel_spi_is_v2(struct atmel_spi *as)
{
- return !cpu_is_at91rm9200();
+ return as->pdata->version == 2;
}
+
/*
* Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
* they assume that spi slave device state will not change on deselect, so
@@ -266,15 +339,21 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
unsigned active = spi->mode & SPI_CS_HIGH;
u32 mr;
- if (atmel_spi_is_v2()) {
+ if (atmel_spi_is_v2(as)) {
/*
* Always use CSR0. This ensures that the clock
* switches to the correct idle polarity before we
* toggle the CS.
*/
spi_writel(as, CSR0, asd->csr);
- spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS)
- | SPI_BIT(MSTR));
+
+ if (as->pdata->has_wdrbt)
+ spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MSTR)
+ | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
+ else
+ spi_writel(as, MR, SPI_BF(PCS, 0x0e)
+ | SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
+
mr = spi_readl(as, MR);
gpio_set_value(asd->npcs_pin, active);
} else {
@@ -321,7 +400,7 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
asd->npcs_pin, active ? " (low)" : "",
mr);
- if (atmel_spi_is_v2() || spi->chip_select != 0)
+ if (atmel_spi_is_v2(as) || spi->chip_select != 0)
gpio_set_value(asd->npcs_pin, !active);
}
@@ -734,7 +813,7 @@ static int atmel_spi_setup(struct spi_device *spi)
}
/* see notes above re chipselect */
- if (!atmel_spi_is_v2()
+ if (!atmel_spi_is_v2(as)
&& spi->chip_select == 0
&& (spi->mode & SPI_CS_HIGH)) {
dev_dbg(&spi->dev, "setup: can't be active-high\n");
@@ -743,7 +822,7 @@ static int atmel_spi_setup(struct spi_device *spi)
/* v1 chips start out at half the peripheral bus speed. */
bus_hz = clk_get_rate(as->clk);
- if (!atmel_spi_is_v2())
+ if (!atmel_spi_is_v2(as))
bus_hz /= 2;
if (spi->max_speed_hz) {
@@ -817,7 +896,7 @@ static int atmel_spi_setup(struct spi_device *spi)
"setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
bus_hz / scbr, bits, spi->mode, spi->chip_select, csr);
- if (!atmel_spi_is_v2())
+ if (!atmel_spi_is_v2(as))
spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
return 0;
@@ -921,6 +1000,21 @@ static void atmel_spi_cleanup(struct spi_device *spi)
kfree(asd);
}
+static struct atmel_spi_pdata * __devinit atmel_spi_get_driver_data(
+ struct platform_device *pdev)
+{
+ if (pdev->dev.of_node) {
+ const struct of_device_id *match;
+ match = of_match_node(atmel_spi_dt_ids, pdev->dev.of_node);
+ if (!match)
+ return NULL;
+ return (struct atmel_spi_pdata *) match->data;
+ }
+
+ return (struct atmel_spi_pdata *)
+ platform_get_device_id(pdev)->driver_data;
+}
+
/*-------------------------------------------------------------------------*/
static int atmel_spi_probe(struct platform_device *pdev)
@@ -987,11 +1081,21 @@ static int atmel_spi_probe(struct platform_device *pdev)
if (ret)
goto out_unmap_regs;
+ as->pdata = atmel_spi_get_driver_data(pdev);
+ if (!as->pdata)
+ goto out_unmap_regs;
+
/* Initialize the hardware */
clk_enable(clk);
spi_writel(as, CR, SPI_BIT(SWRST));
spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
- spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
+
+ if (as->pdata->has_wdrbt)
+ spi_writel(as, MR,
+ SPI_BIT(MSTR) | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
+ else
+ spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
+
spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
spi_writel(as, CR, SPI_BIT(SPIEN));
@@ -1084,21 +1188,13 @@ static int atmel_spi_resume(struct platform_device *pdev)
#define atmel_spi_resume NULL
#endif
-#if defined(CONFIG_OF)
-static const struct of_device_id atmel_spi_dt_ids[] = {
- { .compatible = "atmel,at91rm9200-spi" },
- { /* sentinel */ }
-};
-
-MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids);
-#endif
-
static struct platform_driver atmel_spi_driver = {
.driver = {
.name = "atmel_spi",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(atmel_spi_dt_ids),
},
+ .id_table = atmel_spi_devtypes,
.suspend = atmel_spi_suspend,
.resume = atmel_spi_resume,
.probe = atmel_spi_probe,
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (4 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 05/12] spi/atmel_spi: update the dt support Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-23 16:25 ` Richard Genoud
2013-01-14 7:34 ` [v4 PATCH 07/12] spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes Wenyou Yang
` (7 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Nicolas Ferre <nicolas.ferre@atmel.com>
Add dmaengine support.
For different SoC, the "has_dma_support" is used to select
the transfer mode: dmaengine or PDC.
For the dmaengine transfer mode, if it fails to config dmaengine,
or if the message len less than 16 bytes, it will use the PIO transfer mode.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[wenyou.yang@atmel.com: using "has_dma_support" to select DMA as the spi xfer mode]
[wenyou.yang@atmel.com: add support NPCS1,2,3 chip select other than NPCS0]
[wenyou.yang@atmel.com: fix DMA: OOPS if buffer > 4096 bytes]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Cc: richard.genoud@gmail.com
---
This patch is based on the original patch from Nicolas
[PATCH] spi/atmel_spi: add dmaengine support
and merge the patches from Richard Genoud <richard.genoud@gmail.com>
[PATCH] spi-atmel: update with dmaengine interface
[PATCH] spi-atmel: fix __init/__devinit sections mismatch
and Wenyou Yang add the code to support selecting the spi transfer mode,
add support NPCS1,2,3 chip select other than NPCS0.
fix DMA: OOPS if buffer > 4096 bytes.
Hi, Richard,
Could you sign your signature in this patch?
Best Regards,
Wenyou Yang
drivers/spi/spi-atmel.c | 555 ++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 521 insertions(+), 34 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 43c1f63..0d242dc 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -15,11 +15,13 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/platform_data/atmel.h>
+#include <linux/platform_data/dma-atmel.h>
#include <linux/of.h>
#include <asm/io.h>
@@ -182,6 +184,19 @@
#define spi_writel(port,reg,value) \
__raw_writel((value), (port)->regs + SPI_##reg)
+/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
+ * cache operations; better heuristics consider wordsize and bitrate.
+ */
+#define DMA_MIN_BYTES 16
+
+struct atmel_spi_dma {
+ struct dma_chan *chan_rx;
+ struct dma_chan *chan_tx;
+ struct scatterlist sgrx;
+ struct scatterlist sgtx;
+ struct dma_async_tx_descriptor *data_desc_rx;
+ struct dma_async_tx_descriptor *data_desc_tx;
+};
/*
* The core SPI transfer engine just talks to a register bank to set up
@@ -192,6 +207,7 @@ struct atmel_spi_pdata {
u8 version;
bool has_dma_support;
bool has_wdrbt;
+ struct at_dma_slave dma_slave;
};
struct atmel_spi {
@@ -207,6 +223,7 @@ struct atmel_spi {
u8 stopping;
struct list_head queue;
+ struct tasklet_struct tasklet;
struct spi_transfer *current_transfer;
unsigned long current_remaining_bytes;
struct spi_transfer *next_transfer;
@@ -214,8 +231,15 @@ struct atmel_spi {
int done_status;
struct atmel_spi_pdata *pdata;
+ bool use_dma;
+ bool use_pdc;
+
+ /* scratch buffer */
void *buffer;
dma_addr_t buffer_dma;
+
+ /* dmaengine data */
+ struct atmel_spi_dma dma;
};
/* Controller-specific per-slave state */
@@ -328,9 +352,7 @@ static bool atmel_spi_is_v2(struct atmel_spi *as)
* and (c) will trigger that first erratum in some cases.
*
* TODO: Test if the atmel_spi_is_v2() branch below works on
- * AT91RM9200 if we use some other register than CSR0. However, don't
- * do this unconditionally since AP7000 has an errata where the BITS
- * field in CSR0 overrides all other CSRs.
+ * AT91RM9200 if we use some other register than CSR0.
*/
static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
@@ -340,18 +362,16 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
u32 mr;
if (atmel_spi_is_v2(as)) {
- /*
- * Always use CSR0. This ensures that the clock
- * switches to the correct idle polarity before we
- * toggle the CS.
- */
- spi_writel(as, CSR0, asd->csr);
+ spi_writel(as, CSR0 + 4 * spi->chip_select, asd->csr);
if (as->pdata->has_wdrbt)
- spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MSTR)
- | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
+ spi_writel(as, MR,
+ SPI_BF(PCS, ~(0x01 << spi->chip_select))
+ | SPI_BIT(MSTR) | SPI_BIT(MODFDIS)
+ | SPI_BIT(WDRBT));
else
- spi_writel(as, MR, SPI_BF(PCS, 0x0e)
+ spi_writel(as, MR,
+ SPI_BF(PCS, ~(0x01 << spi->chip_select))
| SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
mr = spi_readl(as, MR);
@@ -414,6 +434,12 @@ static void atmel_spi_unlock(struct atmel_spi *as)
spin_unlock_irqrestore(&as->lock, as->flags);
}
+static inline bool atmel_spi_use_dma(struct atmel_spi *as,
+ struct spi_transfer *xfer)
+{
+ return as->use_dma && xfer->len >= DMA_MIN_BYTES;
+}
+
static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
struct spi_transfer *xfer)
{
@@ -425,6 +451,220 @@ static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
return xfer->delay_usecs == 0 && !xfer->cs_change;
}
+static bool filter(struct dma_chan *chan, void *slave)
+{
+ struct at_dma_slave *sl = slave;
+
+ if (sl->dma_dev == chan->device->dev) {
+ chan->private = sl;
+ return true;
+ } else {
+ return false;
+ }
+}
+
+static int __devinit atmel_spi_configure_dma(struct atmel_spi *as)
+{
+ struct at_dma_slave *sdata
+ = (struct at_dma_slave *)&as->pdata->dma_slave;
+
+ if (sdata && sdata->dma_dev) {
+ dma_cap_mask_t mask;
+
+ /* setup DMA addresses */
+ sdata->rx_reg = (dma_addr_t)as->phybase + SPI_RDR;
+ sdata->tx_reg = (dma_addr_t)as->phybase + SPI_TDR;
+
+ /* Try to grab two DMA channels */
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+ as->dma.chan_tx = dma_request_channel(mask, filter, sdata);
+ if (as->dma.chan_tx)
+ as->dma.chan_rx =
+ dma_request_channel(mask, filter, sdata);
+ }
+ if (!as->dma.chan_rx || !as->dma.chan_tx) {
+ if (as->dma.chan_rx)
+ dma_release_channel(as->dma.chan_rx);
+ if (as->dma.chan_tx)
+ dma_release_channel(as->dma.chan_tx);
+ dev_err(&as->pdev->dev,
+ "DMA channel not available, unable to use SPI\n");
+ return -EBUSY;
+ }
+
+ dev_info(&as->pdev->dev,
+ "Using %s (tx) and %s (rx) for DMA transfers\n",
+ dma_chan_name(as->dma.chan_tx),
+ dma_chan_name(as->dma.chan_rx));
+
+ return 0;
+}
+
+static void atmel_spi_stop_dma(struct atmel_spi *as)
+{
+ if (as->dma.chan_rx)
+ as->dma.chan_rx->device->device_control(as->dma.chan_rx,
+ DMA_TERMINATE_ALL, 0);
+ if (as->dma.chan_tx)
+ as->dma.chan_tx->device->device_control(as->dma.chan_tx,
+ DMA_TERMINATE_ALL, 0);
+}
+
+static void atmel_spi_release_dma(struct atmel_spi *as)
+{
+ if (as->dma.chan_rx)
+ dma_release_channel(as->dma.chan_rx);
+ if (as->dma.chan_tx)
+ dma_release_channel(as->dma.chan_tx);
+}
+
+/* This function is called by the DMA driver from tasklet context */
+static void dma_callback(void *data)
+{
+ struct spi_master *master = data;
+ struct atmel_spi *as = spi_master_get_devdata(master);
+
+ /* trigger SPI tasklet */
+ tasklet_schedule(&as->tasklet);
+}
+
+/*
+ * Next transfer using PIO.
+ * lock is held, spi tasklet is blocked
+ */
+static void atmel_spi_next_xfer_pio(struct spi_master *master,
+ struct spi_transfer *xfer)
+{
+ struct atmel_spi *as = spi_master_get_devdata(master);
+
+ dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n");
+
+ as->current_remaining_bytes = xfer->len;
+
+ /* Make sure data is not remaining in RDR */
+ spi_readl(as, RDR);
+ while (spi_readl(as, SR) & SPI_BIT(RDRF)) {
+ spi_readl(as, RDR);
+ cpu_relax();
+ }
+
+ if (xfer->tx_buf)
+ spi_writel(as, TDR, *(u8 *)(xfer->tx_buf));
+ else
+ spi_writel(as, TDR, 0);
+
+ dev_dbg(master->dev.parent,
+ " start pio xfer %p: len %u tx %p rx %p\n",
+ xfer, xfer->len, xfer->tx_buf, xfer->rx_buf);
+
+ /* Enable relevant interrupts */
+ spi_writel(as, IER, SPI_BIT(RDRF) | SPI_BIT(OVRES));
+}
+
+/*
+ * Submit next transfer for DMA.
+ * lock is held, spi tasklet is blocked
+ */
+static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
+ struct spi_transfer *xfer,
+ u32 *plen)
+{
+ struct atmel_spi *as = spi_master_get_devdata(master);
+ struct dma_chan *rxchan = as->dma.chan_rx;
+ struct dma_chan *txchan = as->dma.chan_tx;
+ struct dma_async_tx_descriptor *rxdesc;
+ struct dma_async_tx_descriptor *txdesc;
+ dma_cookie_t cookie;
+ u32 len = *plen;
+
+ dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_dma_submit\n");
+
+ /* Check that the channels are available */
+ if (!rxchan || !txchan)
+ return -ENODEV;
+
+ /* release lock for DMA operations */
+ atmel_spi_unlock(as);
+
+ /* prepare the RX dma transfer */
+ sg_init_table(&as->dma.sgrx, 1);
+ if (xfer->rx_buf)
+ as->dma.sgrx.dma_address = xfer->rx_dma + xfer->len - *plen;
+ else {
+ as->dma.sgrx.dma_address = as->buffer_dma;
+ if (len > BUFFER_SIZE)
+ len = BUFFER_SIZE;
+ }
+
+ /* prepare the TX dma transfer */
+ sg_init_table(&as->dma.sgtx, 1);
+ if (xfer->tx_buf) {
+ as->dma.sgtx.dma_address = xfer->tx_dma + xfer->len - *plen;
+ } else {
+ as->dma.sgtx.dma_address = as->buffer_dma;
+ if (len > BUFFER_SIZE)
+ len = BUFFER_SIZE;
+ memset(as->buffer, 0, len);
+ }
+
+ sg_dma_len(&as->dma.sgtx) = len;
+ sg_dma_len(&as->dma.sgrx) = len;
+
+ *plen = len;
+
+ /* Send both scatterlists */
+ rxdesc = rxchan->device->device_prep_slave_sg(rxchan,
+ &as->dma.sgrx,
+ 1,
+ DMA_FROM_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK,
+ NULL);
+ if (!rxdesc)
+ goto err_dma;
+
+ txdesc = txchan->device->device_prep_slave_sg(txchan,
+ &as->dma.sgtx,
+ 1,
+ DMA_TO_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK,
+ NULL);
+ if (!txdesc)
+ goto err_dma;
+
+ dev_dbg(master->dev.parent,
+ " start dma xfer %p: len %u tx %p/%08x rx %p/%08x\n",
+ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
+ xfer->rx_buf, xfer->rx_dma);
+
+ /* Enable relevant interrupts */
+ spi_writel(as, IER, SPI_BIT(OVRES));
+
+ /* Put the callback on the RX transfer only, that should finish last */
+ rxdesc->callback = dma_callback;
+ rxdesc->callback_param = master;
+
+ /* Submit and fire RX and TX with TX last so we're ready to read! */
+ cookie = rxdesc->tx_submit(rxdesc);
+ if (dma_submit_error(cookie))
+ goto err_dma;
+ cookie = txdesc->tx_submit(txdesc);
+ if (dma_submit_error(cookie))
+ goto err_dma;
+ rxchan->device->device_issue_pending(rxchan);
+ txchan->device->device_issue_pending(txchan);
+
+ /* take back lock */
+ atmel_spi_lock(as);
+ return 0;
+
+err_dma:
+ spi_writel(as, IDR, SPI_BIT(OVRES));
+ atmel_spi_stop_dma(as);
+ atmel_spi_lock(as);
+ return -ENOMEM;
+}
+
static void atmel_spi_next_xfer_data(struct spi_master *master,
struct spi_transfer *xfer,
dma_addr_t *tx_dma,
@@ -457,10 +697,10 @@ static void atmel_spi_next_xfer_data(struct spi_master *master,
}
/*
- * Submit next transfer for DMA.
+ * Submit next transfer for PDC.
* lock is held, spi irq is blocked
*/
-static void atmel_spi_next_xfer(struct spi_master *master,
+static void atmel_spi_next_xfer_pdc(struct spi_master *master,
struct spi_message *msg)
{
struct atmel_spi *as = spi_master_get_devdata(master);
@@ -557,6 +797,49 @@ static void atmel_spi_next_xfer(struct spi_master *master,
spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
}
+/*
+ * Choose way to submit next transfer and start it.
+ * lock is held, spi tasklet is blocked
+ */
+static void atmel_spi_next_xfer_dma(struct spi_master *master,
+ struct spi_message *msg)
+{
+ struct atmel_spi *as = spi_master_get_devdata(master);
+ struct spi_transfer *xfer;
+ u32 remaining, len;
+
+ dev_vdbg(&msg->spi->dev, "atmel_spi_next_xfer\n");
+
+ remaining = as->current_remaining_bytes;
+ if (remaining) {
+ xfer = as->current_transfer;
+ len = remaining;
+ } else {
+ if (!as->current_transfer)
+ xfer = list_entry(msg->transfers.next,
+ struct spi_transfer, transfer_list);
+ else
+ xfer = list_entry(
+ as->current_transfer->transfer_list.next,
+ struct spi_transfer, transfer_list);
+
+ as->current_transfer = xfer;
+ len = xfer->len;
+ }
+
+ if (atmel_spi_use_dma(as, xfer)) {
+ u32 total = len;
+ if (!atmel_spi_next_xfer_dma_submit(master, xfer, &len)) {
+ as->current_remaining_bytes = total - len;
+ return;
+ } else
+ dev_err(&msg->spi->dev, "unable to use DMA, fallback to PIO\n");
+ }
+
+ /* use PIO if error appened using DMA */
+ atmel_spi_next_xfer_pio(master, xfer);
+}
+
static void atmel_spi_next_message(struct spi_master *master)
{
struct atmel_spi *as = spi_master_get_devdata(master);
@@ -581,7 +864,10 @@ static void atmel_spi_next_message(struct spi_master *master)
} else
cs_activate(as, spi);
- atmel_spi_next_xfer(master, msg);
+ if (as->use_pdc)
+ atmel_spi_next_xfer_pdc(master, msg);
+ else
+ atmel_spi_next_xfer_dma(master, msg);
}
/*
@@ -634,6 +920,11 @@ static void atmel_spi_dma_unmap_xfer(struct spi_master *master,
xfer->len, DMA_FROM_DEVICE);
}
+static void atmel_spi_disable_pdc_transfer(struct atmel_spi *as)
+{
+ spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
+}
+
static void
atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
struct spi_message *msg, int stay)
@@ -659,19 +950,175 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
as->done_status = 0;
/* continue if needed */
- if (list_empty(&as->queue) || as->stopping)
- spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
- else
+ if (list_empty(&as->queue) || as->stopping) {
+ if (as->use_pdc)
+ atmel_spi_disable_pdc_transfer(as);
+ } else
atmel_spi_next_message(master);
}
-static irqreturn_t
-atmel_spi_interrupt(int irq, void *dev_id)
+/* Called from IRQ
+ * lock is held
+ *
+ * Must update "current_remaining_bytes" to keep track of data
+ * to transfer.
+ */
+static void
+atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer)
{
- struct spi_master *master = dev_id;
+ u8 *txp;
+ u8 *rxp;
+ unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
+
+ if (xfer->rx_buf) {
+ rxp = ((u8 *)xfer->rx_buf) + xfer_pos;
+ *rxp = spi_readl(as, RDR);
+ } else {
+ spi_readl(as, RDR);
+ }
+
+ as->current_remaining_bytes--;
+
+ if (as->current_remaining_bytes) {
+ if (xfer->tx_buf) {
+ txp = ((u8 *)xfer->tx_buf) + xfer_pos + 1;
+ spi_writel(as, TDR, *txp);
+ } else {
+ spi_writel(as, TDR, 0);
+ }
+ }
+}
+
+/* Tasklet
+ * Called from DMA callback + pio transfer and overrun IRQ.
+ */
+static void atmel_spi_tasklet_func(unsigned long data)
+{
+ struct spi_master *master = (struct spi_master *)data;
struct atmel_spi *as = spi_master_get_devdata(master);
struct spi_message *msg;
struct spi_transfer *xfer;
+
+ dev_vdbg(master->dev.parent, "atmel_spi_tasklet_func\n");
+
+ atmel_spi_lock(as);
+
+ xfer = as->current_transfer;
+
+ if (xfer == NULL)
+ /* already been there */
+ goto tasklet_out;
+
+ msg = list_entry(as->queue.next, struct spi_message, queue);
+
+ if (as->current_remaining_bytes == 0) {
+ if (as->done_status < 0) {
+ /* error happened (overrun) */
+ if (atmel_spi_use_dma(as, xfer))
+ atmel_spi_stop_dma(as);
+ } else
+ /* only update length if no error */
+ msg->actual_length += xfer->len;
+
+ if (atmel_spi_use_dma(as, xfer))
+ if (!msg->is_dma_mapped)
+ atmel_spi_dma_unmap_xfer(master, xfer);
+
+ if (xfer->delay_usecs)
+ udelay(xfer->delay_usecs);
+
+ if (atmel_spi_xfer_is_last(msg, xfer) || as->done_status < 0)
+ /* report completed (or erroneous) message */
+ atmel_spi_msg_done(master, as, msg, xfer->cs_change);
+ else {
+ if (xfer->cs_change) {
+ cs_deactivate(as, msg->spi);
+ udelay(1);
+ cs_activate(as, msg->spi);
+ }
+
+ /*
+ * Not done yet. Submit the next transfer.
+ *
+ * FIXME handle protocol options for xfer
+ */
+ atmel_spi_next_xfer_dma(master, msg);
+ }
+ } else
+ /*
+ * Keep going, we still have data to send in
+ * the current transfer.
+ */
+ atmel_spi_next_xfer_dma(master, msg);
+
+tasklet_out:
+ atmel_spi_unlock(as);
+}
+
+static int atmel_spi_interrupt_dma(struct atmel_spi *as,
+ struct spi_master *master)
+{
+ u32 status, pending, imr;
+ struct spi_transfer *xfer;
+ int ret = IRQ_NONE;
+
+ imr = spi_readl(as, IMR);
+ status = spi_readl(as, SR);
+ pending = status & imr;
+
+ if (pending & SPI_BIT(OVRES)) {
+ ret = IRQ_HANDLED;
+ spi_writel(as, IDR, SPI_BIT(OVRES));
+ dev_warn(master->dev.parent, "overrun\n");
+
+ /*
+ * When we get an overrun, we disregard the current
+ * transfer. Data will not be copied back from any
+ * bounce buffer and msg->actual_len will not be
+ * updated with the last xfer.
+ *
+ * We will also not process any remaning transfers in
+ * the message.
+ *
+ * All actions are done in tasklet with done_status indication
+ */
+ as->done_status = -EIO;
+ smp_wmb();
+
+ /* Clear any overrun happening while cleaning up */
+ spi_readl(as, SR);
+
+ tasklet_schedule(&as->tasklet);
+
+ } else if (pending & SPI_BIT(RDRF)) {
+ atmel_spi_lock(as);
+
+ if (as->current_remaining_bytes) {
+ ret = IRQ_HANDLED;
+ xfer = as->current_transfer;
+ atmel_spi_pump_pio_data(as, xfer);
+ if (!as->current_remaining_bytes) {
+ /* no more data to xfer, kick tasklet */
+ spi_writel(as, IDR, pending);
+ tasklet_schedule(&as->tasklet);
+ }
+ }
+
+ atmel_spi_unlock(as);
+ } else {
+ WARN_ONCE(pending, "IRQ not handled, pending = %x\n", pending);
+ ret = IRQ_HANDLED;
+ spi_writel(as, IDR, pending);
+ }
+
+ return ret;
+}
+
+static int atmel_spi_interrupt_pdc(struct atmel_spi *as,
+ struct spi_master *master)
+{
+ struct spi_message *msg;
+ struct spi_transfer *xfer;
u32 status, pending, imr;
int ret = IRQ_NONE;
@@ -767,14 +1214,14 @@ atmel_spi_interrupt(int irq, void *dev_id)
*
* FIXME handle protocol options for xfer
*/
- atmel_spi_next_xfer(master, msg);
+ atmel_spi_next_xfer_pdc(master, msg);
}
} else {
/*
* Keep going, we still have data to send in
* the current transfer.
*/
- atmel_spi_next_xfer(master, msg);
+ atmel_spi_next_xfer_pdc(master, msg);
}
}
@@ -783,6 +1230,27 @@ atmel_spi_interrupt(int irq, void *dev_id)
return ret;
}
+/* Interrupt
+ *
+ * No need for locking in this Interrupt handler: done_status is the
+ * only information modified. What we need is the update of this field
+ * before tasklet runs. This is ensured by using barrier.
+ */
+static irqreturn_t
+atmel_spi_interrupt(int irq, void *dev_id)
+{
+ struct spi_master *master = dev_id;
+ struct atmel_spi *as = spi_master_get_devdata(master);
+ int ret;
+
+ if (as->use_pdc)
+ ret = atmel_spi_interrupt_pdc(as, master);
+ else
+ ret = atmel_spi_interrupt_dma(as, master);
+
+ return ret;
+}
+
static int atmel_spi_setup(struct spi_device *spi)
{
struct atmel_spi *as;
@@ -945,13 +1413,10 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
/*
* DMA map early, for performance (empties dcache ASAP) and
- * better fault reporting. This is a DMA-only driver.
- *
- * NOTE that if dma_unmap_single() ever starts to do work on
- * platforms supported by this driver, we would need to clean
- * up mappings for previously-mapped transfers.
+ * better fault reporting.
*/
- if (!msg->is_dma_mapped) {
+ if ((!msg->is_dma_mapped) && (atmel_spi_use_dma(as, xfer)
+ || as->use_pdc)) {
if (atmel_spi_dma_map_xfer(as, xfer) < 0)
return -ENOMEM;
}
@@ -1068,6 +1533,8 @@ static int atmel_spi_probe(struct platform_device *pdev)
spin_lock_init(&as->lock);
INIT_LIST_HEAD(&as->queue);
+ tasklet_init(&as->tasklet, atmel_spi_tasklet_func,
+ (unsigned long)master);
as->pdev = pdev;
as->regs = ioremap(regs->start, resource_size(regs));
if (!as->regs)
@@ -1096,7 +1563,15 @@ static int atmel_spi_probe(struct platform_device *pdev)
else
spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
- spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
+ as->use_dma = false;
+ as->use_pdc = false;
+
+ if (as->pdata->has_dma_support) {
+ if (atmel_spi_configure_dma(as) == 0)
+ as->use_dma = true;
+ } else
+ as->use_pdc = true;
+
spi_writel(as, CR, SPI_BIT(SPIEN));
/* go! */
@@ -1105,11 +1580,14 @@ static int atmel_spi_probe(struct platform_device *pdev)
ret = spi_register_master(master);
if (ret)
- goto out_reset_hw;
+ goto out_free_dma;
return 0;
-out_reset_hw:
+out_free_dma:
+ if (as->use_dma)
+ atmel_spi_release_dma(as);
+
spi_writel(as, CR, SPI_BIT(SWRST));
spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
clk_disable(clk);
@@ -1117,6 +1595,7 @@ out_reset_hw:
out_unmap_regs:
iounmap(as->regs);
out_free_buffer:
+ tasklet_kill(&as->tasklet);
dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
as->buffer_dma);
out_free:
@@ -1135,6 +1614,11 @@ static int atmel_spi_remove(struct platform_device *pdev)
/* reset the hardware and block queue progress */
spin_lock_irq(&as->lock);
as->stopping = 1;
+ if (as->use_dma) {
+ atmel_spi_stop_dma(as);
+ atmel_spi_release_dma(as);
+ }
+
spi_writel(as, CR, SPI_BIT(SWRST));
spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
spi_readl(as, SR);
@@ -1143,13 +1627,16 @@ static int atmel_spi_remove(struct platform_device *pdev)
/* Terminate remaining queued transfers */
list_for_each_entry(msg, &as->queue, queue) {
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
- if (!msg->is_dma_mapped)
+ if (!msg->is_dma_mapped
+ && (atmel_spi_use_dma(as, xfer)
+ || as->use_pdc))
atmel_spi_dma_unmap_xfer(master, xfer);
}
msg->status = -ESHUTDOWN;
msg->complete(msg->context);
}
+ tasklet_kill(&as->tasklet);
dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
as->buffer_dma);
@@ -1198,7 +1685,7 @@ static struct platform_driver atmel_spi_driver = {
.suspend = atmel_spi_suspend,
.resume = atmel_spi_resume,
.probe = atmel_spi_probe,
- .remove = __exit_p(atmel_spi_remove),
+ .remove = atmel_spi_remove,
};
module_platform_driver(atmel_spi_driver);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 07/12] spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (5 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 08/12] spi/atmel_spi: correct 16 bits transfers using PIO Wenyou Yang
` (6 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Richard Genoud <richard.genoud@gmail.com>
This is the following of the patch e2b35f3dbfc080f15b72834d08f04f0269dbe9be
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: fix DMA: when enable both spi0 and spi1, spi0 doesn't work]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
---
drivers/spi/spi-atmel.c | 61 +++++++++++++++++++++++++++++++++++++++--------
1 file changed, 51 insertions(+), 10 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 0d242dc..4d80074 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -451,6 +451,37 @@ static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
return xfer->delay_usecs == 0 && !xfer->cs_change;
}
+static int atmel_spi_dma_slave_config(struct atmel_spi *as,
+ struct dma_slave_config *slave_config)
+{
+ int err = 0;
+
+ slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+ slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+
+ slave_config->dst_addr = (dma_addr_t)as->phybase + SPI_TDR;
+ slave_config->src_addr = (dma_addr_t)as->phybase + SPI_RDR;
+ slave_config->src_maxburst = 1;
+ slave_config->dst_maxburst = 1;
+ slave_config->device_fc = false;
+
+ slave_config->direction = DMA_MEM_TO_DEV;
+ if (dmaengine_slave_config(as->dma.chan_tx, slave_config)) {
+ dev_err(&as->pdev->dev,
+ "failed to configure tx dma channel\n");
+ err = -EINVAL;
+ }
+
+ slave_config->direction = DMA_DEV_TO_MEM;
+ if (dmaengine_slave_config(as->dma.chan_rx, slave_config)) {
+ dev_err(&as->pdev->dev,
+ "failed to configure rx dma channel\n");
+ err = -EINVAL;
+ }
+
+ return err;
+}
+
static bool filter(struct dma_chan *chan, void *slave)
{
struct at_dma_slave *sl = slave;
@@ -467,14 +498,12 @@ static int __devinit atmel_spi_configure_dma(struct atmel_spi *as)
{
struct at_dma_slave *sdata
= (struct at_dma_slave *)&as->pdata->dma_slave;
+ struct dma_slave_config slave_config;
+ int err;
if (sdata && sdata->dma_dev) {
dma_cap_mask_t mask;
- /* setup DMA addresses */
- sdata->rx_reg = (dma_addr_t)as->phybase + SPI_RDR;
- sdata->tx_reg = (dma_addr_t)as->phybase + SPI_TDR;
-
/* Try to grab two DMA channels */
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
@@ -484,21 +513,27 @@ static int __devinit atmel_spi_configure_dma(struct atmel_spi *as)
dma_request_channel(mask, filter, sdata);
}
if (!as->dma.chan_rx || !as->dma.chan_tx) {
- if (as->dma.chan_rx)
- dma_release_channel(as->dma.chan_rx);
- if (as->dma.chan_tx)
- dma_release_channel(as->dma.chan_tx);
dev_err(&as->pdev->dev,
"DMA channel not available, unable to use SPI\n");
- return -EBUSY;
+ err = -EBUSY;
+ goto error;
}
+ err = atmel_spi_dma_slave_config(as, &slave_config);
+ if (err)
+ goto error;
+
dev_info(&as->pdev->dev,
"Using %s (tx) and %s (rx) for DMA transfers\n",
dma_chan_name(as->dma.chan_tx),
dma_chan_name(as->dma.chan_rx));
-
return 0;
+error:
+ if (as->dma.chan_rx)
+ dma_release_channel(as->dma.chan_rx);
+ if (as->dma.chan_tx)
+ dma_release_channel(as->dma.chan_tx);
+ return err;
}
static void atmel_spi_stop_dma(struct atmel_spi *as)
@@ -575,6 +610,7 @@ static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
struct dma_chan *txchan = as->dma.chan_tx;
struct dma_async_tx_descriptor *rxdesc;
struct dma_async_tx_descriptor *txdesc;
+ struct dma_slave_config slave_config;
dma_cookie_t cookie;
u32 len = *plen;
@@ -613,6 +649,10 @@ static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
*plen = len;
+ if (atmel_spi_dma_slave_config(as, &slave_config))
+ goto err_exit;
+
+
/* Send both scatterlists */
rxdesc = rxchan->device->device_prep_slave_sg(rxchan,
&as->dma.sgrx,
@@ -661,6 +701,7 @@ static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
err_dma:
spi_writel(as, IDR, SPI_BIT(OVRES));
atmel_spi_stop_dma(as);
+err_exit:
atmel_spi_lock(as);
return -ENOMEM;
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 08/12] spi/atmel_spi: correct 16 bits transfers using PIO
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (6 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 07/12] spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 09/12] spi/atmel_spi: correct 16 bits transfer with DMA Wenyou Yang
` (5 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
---
drivers/spi/spi-atmel.c | 46 +++++++++++++++++++++++++++++++++++++---------
1 file changed, 37 insertions(+), 9 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 4d80074..a20cd03 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -585,13 +585,17 @@ static void atmel_spi_next_xfer_pio(struct spi_master *master,
}
if (xfer->tx_buf)
- spi_writel(as, TDR, *(u8 *)(xfer->tx_buf));
+ if (xfer->bits_per_word > 8)
+ spi_writel(as, TDR, *(u16 *)(xfer->tx_buf));
+ else
+ spi_writel(as, TDR, *(u8 *)(xfer->tx_buf));
else
spi_writel(as, TDR, 0);
dev_dbg(master->dev.parent,
- " start pio xfer %p: len %u tx %p rx %p\n",
- xfer, xfer->len, xfer->tx_buf, xfer->rx_buf);
+ " start pio xfer %p: len %u tx %p rx %p bitpw %d\n",
+ xfer, xfer->len, xfer->tx_buf, xfer->rx_buf,
+ xfer->bits_per_word);
/* Enable relevant interrupts */
spi_writel(as, IER, SPI_BIT(RDRF) | SPI_BIT(OVRES));
@@ -1009,21 +1013,39 @@ atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer)
{
u8 *txp;
u8 *rxp;
+ u16 *txp16;
+ u16 *rxp16;
unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
if (xfer->rx_buf) {
- rxp = ((u8 *)xfer->rx_buf) + xfer_pos;
- *rxp = spi_readl(as, RDR);
+ if (xfer->bits_per_word > 8) {
+ rxp16 = (u16 *)(((u8 *)xfer->rx_buf) + xfer_pos);
+ *rxp16 = spi_readl(as, RDR);
+ } else {
+ rxp = ((u8 *)xfer->rx_buf) + xfer_pos;
+ *rxp = spi_readl(as, RDR);
+ }
} else {
spi_readl(as, RDR);
}
-
- as->current_remaining_bytes--;
+ if (xfer->bits_per_word > 8) {
+ as->current_remaining_bytes -= 2;
+ if (as->current_remaining_bytes < 0)
+ as->current_remaining_bytes = 0;
+ } else {
+ as->current_remaining_bytes--;
+ }
if (as->current_remaining_bytes) {
if (xfer->tx_buf) {
- txp = ((u8 *)xfer->tx_buf) + xfer_pos + 1;
- spi_writel(as, TDR, *txp);
+ if (xfer->bits_per_word > 8) {
+ txp16 = (u16 *)(((u8 *)xfer->tx_buf)
+ + xfer_pos + 2);
+ spi_writel(as, TDR, *txp16);
+ } else {
+ txp = ((u8 *)xfer->tx_buf) + xfer_pos + 1;
+ spi_writel(as, TDR, *txp);
+ }
} else {
spi_writel(as, TDR, 0);
}
@@ -1445,6 +1467,12 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
return -ENOPROTOOPT;
}
}
+ if (xfer->bits_per_word > 8) {
+ if (xfer->len % 2) {
+ dev_dbg(&spi->dev, "buffer len should be 16 bits aligned\n");
+ return -EINVAL;
+ }
+ }
/* FIXME implement these protocol options!! */
if (xfer->speed_hz) {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 09/12] spi/atmel_spi: correct 16 bits transfer with DMA
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (7 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 08/12] spi/atmel_spi: correct 16 bits transfers using PIO Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 10/12] ARM: at91: add clocks for spi dt entries Wenyou Yang
` (4 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, grant.likely, spi-devel-general
From: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
---
drivers/spi/spi-atmel.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index a20cd03..8984563 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -452,12 +452,18 @@ static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
}
static int atmel_spi_dma_slave_config(struct atmel_spi *as,
- struct dma_slave_config *slave_config)
+ struct dma_slave_config *slave_config,
+ u8 bits_per_word)
{
int err = 0;
- slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
- slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+ if (bits_per_word > 8) {
+ slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ } else {
+ slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+ slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+ }
slave_config->dst_addr = (dma_addr_t)as->phybase + SPI_TDR;
slave_config->src_addr = (dma_addr_t)as->phybase + SPI_RDR;
@@ -519,7 +525,7 @@ static int __devinit atmel_spi_configure_dma(struct atmel_spi *as)
goto error;
}
- err = atmel_spi_dma_slave_config(as, &slave_config);
+ err = atmel_spi_dma_slave_config(as, &slave_config, 8);
if (err)
goto error;
@@ -653,10 +659,9 @@ static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
*plen = len;
- if (atmel_spi_dma_slave_config(as, &slave_config))
+ if (atmel_spi_dma_slave_config(as, &slave_config, 8))
goto err_exit;
-
/* Send both scatterlists */
rxdesc = rxchan->device->device_prep_slave_sg(rxchan,
&as->dma.sgrx,
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 10/12] ARM: at91: add clocks for spi dt entries
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (8 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 09/12] spi/atmel_spi: correct 16 bits transfer with DMA Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC Wenyou Yang
` (3 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, linux, linux
From: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[<wenyou.yang@atmel.com: declare the spi clocks for sam9260, at91sam9g45, and at91sam9n12]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: linux@arm.linux.org.uk
Cc: plagnioj@jcrosoft.com
Cc: linux@maxim.org.za
---
arch/arm/mach-at91/at91sam9260.c | 2 ++
arch/arm/mach-at91/at91sam9g45.c | 2 ++
arch/arm/mach-at91/at91sam9n12.c | 2 ++
arch/arm/mach-at91/at91sam9x5.c | 2 ++
4 files changed, 8 insertions(+)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b67cd53..44199bc 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
/* fake hclk clock */
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index d3addee..2ec5efe 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -262,6 +262,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
/* fake hclk clock */
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 5dfc8fd..ccd0783 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -172,6 +172,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 44a9a62..a200d8a 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (9 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 10/12] ARM: at91: add clocks for spi dt entries Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-02-05 19:51 ` Jean-Christophe PLAGNIOL-VILLARD
2013-01-14 7:34 ` [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards Wenyou Yang
` (2 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, linux
From: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45 and sam9n12]
[wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts files]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: linux@arm.linux.org.uk
---
arch/arm/boot/dts/at91sam9260.dtsi | 18 ++++++++++++++++++
arch/arm/boot/dts/at91sam9263.dtsi | 18 ++++++++++++++++++
arch/arm/boot/dts/at91sam9g45.dtsi | 18 ++++++++++++++++++
arch/arm/boot/dts/at91sam9n12.dtsi | 18 ++++++++++++++++++
arch/arm/boot/dts/at91sam9x5.dtsi | 18 ++++++++++++++++++
5 files changed, 90 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 68bccf4..9586fe1 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -453,6 +453,24 @@
status = "disabled";
};
+ spi0: spi@fffc8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9260-spi";
+ reg = <0xfffc8000 0x200>;
+ interrupts = <12 4 3>;
+ status = "disabled";
+ };
+
+ spi1: spi@fffcc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9260-spi";
+ reg = <0xfffcc000 0x200>;
+ interrupts = <13 4 3>;
+ status = "disabled";
+ };
+
adc0: adc@fffe0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 32ec62c..636b882 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -426,6 +426,24 @@
reg = <0xfffffd40 0x10>;
status = "disabled";
};
+
+ spi0: spi@fffa4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9260-spi";
+ reg = <0xfffa4000 0x200>;
+ interrupts = <14 4 3>;
+ status = "disabled";
+ };
+
+ spi1: spi@fffa8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9260-spi";
+ reg = <0xfffa8000 0x200>;
+ interrupts = <15 4 3>;
+ status = "disabled";
+ };
};
nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 231858f..0100b80 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -495,6 +495,24 @@
reg = <0xfffffd40 0x10>;
status = "disabled";
};
+
+ spi0: spi@fffa4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9g45-spi";
+ reg = <0xfffa4000 0x200>;
+ interrupts = <14 4 3>;
+ status = "disabled";
+ };
+
+ spi1: spi@fffa8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9g45-spi";
+ reg = <0xfffa8000 0x200>;
+ interrupts = <15 4 3>;
+ status = "disabled";
+ };
};
nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index e9efb34..86d5357 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -355,6 +355,24 @@
#size-cells = <0>;
status = "disabled";
};
+
+ spi0: spi@f0000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9x5-spi";
+ reg = <0xf0000000 0x100>;
+ interrupts = <13 4 3>;
+ status = "disabled";
+ };
+
+ spi1: spi@f0004000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9x5-spi";
+ reg = <0xf0004000 0x100>;
+ interrupts = <14 4 3>;
+ status = "disabled";
+ };
};
nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 40ac3a4..8ea2f7d 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -473,6 +473,24 @@
trigger-value = <0x6>;
};
};
+
+ spi0: spi@f0000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9x5-spi";
+ reg = <0xf0000000 0x100>;
+ interrupts = <13 4 3>;
+ status = "disabled";
+ };
+
+ spi1: spi@f0004000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9x5-spi";
+ reg = <0xf0004000 0x100>;
+ interrupts = <14 4 3>;
+ status = "disabled";
+ };
};
nand0: nand@40000000 {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (10 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC Wenyou Yang
@ 2013-01-14 7:34 ` Wenyou Yang
2013-02-05 19:50 ` Jean-Christophe PLAGNIOL-VILLARD
2013-01-18 8:46 ` [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Richard Genoud
2013-02-05 14:14 ` Grant Likely
13 siblings, 1 reply; 29+ messages in thread
From: Wenyou Yang @ 2013-01-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, nicolas.ferre, plagnioj, richard.genoud, JM.Lin,
wenyou.yang, linux
From: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: added spi nodes for the sam9263ek, sam9g20ek, sam9m10g45ek and sam9n12ek boards]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: linux@arm.linux.org.uk
---
arch/arm/boot/dts/at91sam9263ek.dts | 14 ++++++++++++++
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 ++++++++++++++
arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 ++++++++++++++
arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++++++++++++++
arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 ++++++++++++++
5 files changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 1eb0872..63ba57b 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -79,6 +79,20 @@
};
};
};
+
+ spi0: spi@fffa4000 {
+ status = "okay";
+ cs-gpios = <&pioA 5 0
+ &pioA 3 0
+ &pioA 4 0
+ &pioB 11 0
+ >;
+ mtd_dataflash@0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ };
+ };
};
nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index da15e83..49ad49e 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -96,6 +96,20 @@
status = "okay";
pinctrl-0 = <&pinctrl_ssc0_tx>;
};
+
+ spi0: spi@fffc8000 {
+ status = "okay";
+ cs-gpios = <&pioA 3 0
+ &pioC 11 0
+ &pioC 16 0
+ &pioC 17 0
+ >;
+ mtd_dataflash@0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <50000000>;
+ reg = <1>;
+ };
+ };
};
nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 20c3191..275f22d 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -102,6 +102,20 @@
};
};
};
+
+ spi0: spi@fffa4000{
+ status = "okay";
+ cs-gpios = <&pioB 3 0
+ &pioB 18 0
+ &pioB 19 0
+ &pioD 27 0
+ >;
+ mtd_dataflash@0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <13000000>;
+ reg = <0>;
+ };
+ };
};
nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index 0376bf4..4eeca7b 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -67,6 +67,20 @@
};
};
};
+
+ spi0: spi@f0000000 {
+ status = "okay";
+ cs-gpios = <&pioA 14 0
+ &pioA 7 0
+ &pioA 1 0
+ &pioB 3 0
+ >;
+ m25p80@0 {
+ compatible = "atmel,at25df321a";
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ };
+ };
};
nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 8a7cf1d..ca0a056 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -84,6 +84,20 @@
};
};
};
+
+ spi0: spi@f0000000 {
+ status = "okay";
+ cs-gpios = <&pioA 14 0
+ &pioA 7 0
+ &pioA 1 0
+ &pioB 3 0
+ >;
+ m25p80@0 {
+ compatible = "atmel,at25df321a";
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ };
+ };
};
usb0: ohci@00600000 {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (11 preceding siblings ...)
2013-01-14 7:34 ` [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards Wenyou Yang
@ 2013-01-18 8:46 ` Richard Genoud
2013-01-18 9:31 ` Yang, Wenyou
2013-02-05 14:14 ` Grant Likely
13 siblings, 1 reply; 29+ messages in thread
From: Richard Genoud @ 2013-01-18 8:46 UTC (permalink / raw)
To: Wenyou Yang
Cc: linux-arm-kernel, linux-kernel, nicolas.ferre, plagnioj, JM.Lin
2013/1/14 Wenyou Yang <wenyou.yang@atmel.com>:
> Hi All,
>
> This set of patches is to add dmaengine and device tree support for atmel spi.
> The work is based on Nicolas and Richard's work.
> It is tested on at91sam9x5ek, at91sam9m10g45ek, at91sam9263ek and at91sam9g20ek.
>
> It is based on v3.8-rc3.
Hi,
You should rebase it on rc4 because __devinit macros are gone in rc4.
(cf 54b956b903607f8f8878754dd4352da6a54a1da2 )
So the patches 05 and 06 will break compilation.
>
> Changelog:
> v4:
> 1./ Take Joe Perches's advance, rewrite atmel_spi_is_v2(struct atmel_spi *as)
> and atmel_spi_use_dma(struct atmel_spi *as),
> and remove atmel_spi_use_pdc(struct atmel_spi *as).
>
> 2./ Rebase on v3.8-rc3.
>
> V3:
> 1./ Rebase on v3.8-rc2.
>
> 2./ Remove some Jean-Christophe's patches which has been
> applied on v3.8-rc2.
>
> 3./ Remove spi property "cs-gpios" from the SoC dtsi files
> to the board dts files to avoid some useless pin conflicts.
>
> v2:
> 1./ Remove the patch :PATCH]mtd: m25p80: change the m25p80_read to reading page to page
> which purpose to fix the BUG: when run "flashcp /bin/busybox /dev/mtdX" in
> the at91sam9g25ek with DMA mode, it arises a OOPS.
> Now fix it in this patch:
> [PATHC] spi/atmel_spi: add dmaengine support changing to fix the [BUG].
>
> 2./ Remove two patches:
> which purpose to read dts property to select SPI IP version and DMA mode
> Now they will be gat from device tree different compatile.
>
> 3./ Fix DMA: when enable both spi0 AND spi1, the spi0 doesn't work BUG.
>
> 4./ Rebase v3.7-rc8.
>
> Best Regards,
> Wenyou Yang.
>
> Nicolas Ferre (5):
> spi/atmel_spi: add physical base address
> spi/atmel_spi: call unmapping on transfers buffers
> spi/atmel_spi: status information passed through controller data
> spi/atmel_spi: add flag to controller data for lock operations
> spi/atmel_spi: add dmaengine support
>
> Richard Genoud (6):
> spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes
> spi/atmel_spi: correct 16 bits transfers using PIO
> spi/atmel_spi: correct 16 bits transfer with DMA
> ARM: at91: add clocks for spi dt entries
> ARM: dts: add spi nodes for atmel SoC
> ARM: dts: add spi nodes for the atmel boards
>
> Wenyou Yang (1):
> spi/atmel_spi: update the dt support
>
> arch/arm/boot/dts/at91sam9260.dtsi | 18 +
> arch/arm/boot/dts/at91sam9263.dtsi | 18 +
> arch/arm/boot/dts/at91sam9263ek.dts | 14 +
> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 +
> arch/arm/boot/dts/at91sam9g45.dtsi | 18 +
> arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 +
> arch/arm/boot/dts/at91sam9n12.dtsi | 18 +
> arch/arm/boot/dts/at91sam9n12ek.dts | 14 +
> arch/arm/boot/dts/at91sam9x5.dtsi | 18 +
> arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 +
> arch/arm/mach-at91/at91sam9260.c | 2 +
> arch/arm/mach-at91/at91sam9g45.c | 2 +
> arch/arm/mach-at91/at91sam9n12.c | 2 +
> arch/arm/mach-at91/at91sam9x5.c | 2 +
> drivers/spi/spi-atmel.c | 809 ++++++++++++++++++++++++---
> 15 files changed, 908 insertions(+), 69 deletions(-)
>
> --
> 1.7.9.5
>
--
for me, ck means con kolivas and not calvin klein... does it mean I'm a geek ?
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support
2013-01-18 8:46 ` [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Richard Genoud
@ 2013-01-18 9:31 ` Yang, Wenyou
0 siblings, 0 replies; 29+ messages in thread
From: Yang, Wenyou @ 2013-01-18 9:31 UTC (permalink / raw)
To: Richard Genoud
Cc: linux-arm-kernel, linux-kernel, Ferre, Nicolas, plagnioj, Lin, JM
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 4225 bytes --]
> -----Original Message-----
> From: Richard Genoud [mailto:richard.genoud@gmail.com]
> Sent: 2013年1月18日 16:46
> To: Yang, Wenyou
> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
> Nicolas; plagnioj@jcrosoft.com; Lin, JM
> Subject: Re: [v4 PATCH 00/12] atmel spi controller with dmaengine and device
> tree support
>
> 2013/1/14 Wenyou Yang <wenyou.yang@atmel.com>:
> > Hi All,
> >
> > This set of patches is to add dmaengine and device tree support for atmel spi.
> > The work is based on Nicolas and Richard's work.
> > It is tested on at91sam9x5ek, at91sam9m10g45ek, at91sam9263ek and
> at91sam9g20ek.
> >
> > It is based on v3.8-rc3.
> Hi,
> You should rebase it on rc4 because __devinit macros are gone in rc4.
> (cf 54b956b903607f8f8878754dd4352da6a54a1da2 )
> So the patches 05 and 06 will break compilation.
thanks
>
> >
> > Changelog:
> > v4:
> > 1./ Take Joe Perches's advance, rewrite atmel_spi_is_v2(struct
> atmel_spi *as)
> > and atmel_spi_use_dma(struct atmel_spi *as),
> > and remove atmel_spi_use_pdc(struct atmel_spi *as).
> >
> > 2./ Rebase on v3.8-rc3.
> >
> > V3:
> > 1./ Rebase on v3.8-rc2.
> >
> > 2./ Remove some Jean-Christophe's patches which has been
> > applied on v3.8-rc2.
> >
> > 3./ Remove spi property "cs-gpios" from the SoC dtsi files
> > to the board dts files to avoid some useless pin conflicts.
> >
> > v2:
> > 1./ Remove the patch :PATCH]mtd: m25p80: change the
> m25p80_read to reading page to page
> > which purpose to fix the BUG: when run "flashcp /bin/busybox
> /dev/mtdX" in
> > the at91sam9g25ek with DMA mode, it arises a OOPS.
> > Now fix it in this patch:
> > [PATHC] spi/atmel_spi: add dmaengine support changing to fix
> the [BUG].
> >
> > 2./ Remove two patches:
> > which purpose to read dts property to select SPI IP version
> and DMA mode
> > Now they will be gat from device tree different compatile.
> >
> > 3./ Fix DMA: when enable both spi0 AND spi1, the spi0 doesn't
> work BUG.
> >
> > 4./ Rebase v3.7-rc8.
> >
> > Best Regards,
> > Wenyou Yang.
> >
> > Nicolas Ferre (5):
> > spi/atmel_spi: add physical base address
> > spi/atmel_spi: call unmapping on transfers buffers
> > spi/atmel_spi: status information passed through controller data
> > spi/atmel_spi: add flag to controller data for lock operations
> > spi/atmel_spi: add dmaengine support
> >
> > Richard Genoud (6):
> > spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes
> > spi/atmel_spi: correct 16 bits transfers using PIO
> > spi/atmel_spi: correct 16 bits transfer with DMA
> > ARM: at91: add clocks for spi dt entries
> > ARM: dts: add spi nodes for atmel SoC
> > ARM: dts: add spi nodes for the atmel boards
> >
> > Wenyou Yang (1):
> > spi/atmel_spi: update the dt support
> >
> > arch/arm/boot/dts/at91sam9260.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9263.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9263ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 +
> > arch/arm/boot/dts/at91sam9g45.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9n12.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9n12ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9x5.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 +
> > arch/arm/mach-at91/at91sam9260.c | 2 +
> > arch/arm/mach-at91/at91sam9g45.c | 2 +
> > arch/arm/mach-at91/at91sam9n12.c | 2 +
> > arch/arm/mach-at91/at91sam9x5.c | 2 +
> > drivers/spi/spi-atmel.c | 809
> ++++++++++++++++++++++++---
> > 15 files changed, 908 insertions(+), 69 deletions(-)
> >
> > --
> > 1.7.9.5
> >
>
>
>
> --
> for me, ck means con kolivas and not calvin klein... does it mean I'm a geek ?
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support
2013-01-14 7:34 ` [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support Wenyou Yang
@ 2013-01-23 16:25 ` Richard Genoud
2013-01-24 0:44 ` Yang, Wenyou
0 siblings, 1 reply; 29+ messages in thread
From: Richard Genoud @ 2013-01-23 16:25 UTC (permalink / raw)
To: Wenyou Yang
Cc: linux-arm-kernel, linux-kernel, nicolas.ferre, plagnioj, JM.Lin,
grant.likely, spi-devel-general
2013/1/14 Wenyou Yang <wenyou.yang@atmel.com>:
> From: Nicolas Ferre <nicolas.ferre@atmel.com>
>
> Add dmaengine support.
>
> For different SoC, the "has_dma_support" is used to select
> the transfer mode: dmaengine or PDC.
>
> For the dmaengine transfer mode, if it fails to config dmaengine,
> or if the message len less than 16 bytes, it will use the PIO transfer mode.
>
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> [wenyou.yang@atmel.com: using "has_dma_support" to select DMA as the spi xfer mode]
> [wenyou.yang@atmel.com: add support NPCS1,2,3 chip select other than NPCS0]
> [wenyou.yang@atmel.com: fix DMA: OOPS if buffer > 4096 bytes]
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> Cc: grant.likely@secretlab.ca
> Cc: spi-devel-general@lists.sourceforge.net
> Cc: richard.genoud@gmail.com
> ---
> This patch is based on the original patch from Nicolas
> [PATCH] spi/atmel_spi: add dmaengine support
> and merge the patches from Richard Genoud <richard.genoud@gmail.com>
> [PATCH] spi-atmel: update with dmaengine interface
> [PATCH] spi-atmel: fix __init/__devinit sections mismatch
> and Wenyou Yang add the code to support selecting the spi transfer mode,
> add support NPCS1,2,3 chip select other than NPCS0.
> fix DMA: OOPS if buffer > 4096 bytes.
>
> diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
> index 43c1f63..0d242dc 100644
> --- a/drivers/spi/spi-atmel.c
> +++ b/drivers/spi/spi-atmel.c
> @@ -15,11 +15,13 @@
> #include <linux/platform_device.h>
> #include <linux/delay.h>
> #include <linux/dma-mapping.h>
> +#include <linux/dmaengine.h>
> #include <linux/err.h>
> #include <linux/interrupt.h>
> #include <linux/spi/spi.h>
> #include <linux/slab.h>
> #include <linux/platform_data/atmel.h>
> +#include <linux/platform_data/dma-atmel.h>
> #include <linux/of.h>
>
> #include <asm/io.h>
> @@ -182,6 +184,19 @@
> #define spi_writel(port,reg,value) \
> __raw_writel((value), (port)->regs + SPI_##reg)
>
> +/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
> + * cache operations; better heuristics consider wordsize and bitrate.
> + */
> +#define DMA_MIN_BYTES 16
> +
> +struct atmel_spi_dma {
> + struct dma_chan *chan_rx;
> + struct dma_chan *chan_tx;
> + struct scatterlist sgrx;
> + struct scatterlist sgtx;
> + struct dma_async_tx_descriptor *data_desc_rx;
> + struct dma_async_tx_descriptor *data_desc_tx;
> +};
>
> /*
> * The core SPI transfer engine just talks to a register bank to set up
> @@ -192,6 +207,7 @@ struct atmel_spi_pdata {
> u8 version;
> bool has_dma_support;
> bool has_wdrbt;
> + struct at_dma_slave dma_slave;
> };
>
> struct atmel_spi {
> @@ -207,6 +223,7 @@ struct atmel_spi {
>
> u8 stopping;
> struct list_head queue;
> + struct tasklet_struct tasklet;
> struct spi_transfer *current_transfer;
> unsigned long current_remaining_bytes;
> struct spi_transfer *next_transfer;
> @@ -214,8 +231,15 @@ struct atmel_spi {
> int done_status;
> struct atmel_spi_pdata *pdata;
>
> + bool use_dma;
> + bool use_pdc;
> +
> + /* scratch buffer */
> void *buffer;
> dma_addr_t buffer_dma;
> +
> + /* dmaengine data */
> + struct atmel_spi_dma dma;
> };
>
> /* Controller-specific per-slave state */
> @@ -328,9 +352,7 @@ static bool atmel_spi_is_v2(struct atmel_spi *as)
> * and (c) will trigger that first erratum in some cases.
> *
> * TODO: Test if the atmel_spi_is_v2() branch below works on
> - * AT91RM9200 if we use some other register than CSR0. However, don't
> - * do this unconditionally since AP7000 has an errata where the BITS
> - * field in CSR0 overrides all other CSRs.
> + * AT91RM9200 if we use some other register than CSR0.
> */
>
> static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
> @@ -340,18 +362,16 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
> u32 mr;
>
> if (atmel_spi_is_v2(as)) {
> - /*
> - * Always use CSR0. This ensures that the clock
> - * switches to the correct idle polarity before we
> - * toggle the CS.
> - */
> - spi_writel(as, CSR0, asd->csr);
> + spi_writel(as, CSR0 + 4 * spi->chip_select, asd->csr);
>
> if (as->pdata->has_wdrbt)
> - spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MSTR)
> - | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
> + spi_writel(as, MR,
> + SPI_BF(PCS, ~(0x01 << spi->chip_select))
> + | SPI_BIT(MSTR) | SPI_BIT(MODFDIS)
> + | SPI_BIT(WDRBT));
> else
> - spi_writel(as, MR, SPI_BF(PCS, 0x0e)
> + spi_writel(as, MR,
> + SPI_BF(PCS, ~(0x01 << spi->chip_select))
> | SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
>
> mr = spi_readl(as, MR);
> @@ -414,6 +434,12 @@ static void atmel_spi_unlock(struct atmel_spi *as)
> spin_unlock_irqrestore(&as->lock, as->flags);
> }
>
> +static inline bool atmel_spi_use_dma(struct atmel_spi *as,
> + struct spi_transfer *xfer)
> +{
> + return as->use_dma && xfer->len >= DMA_MIN_BYTES;
> +}
> +
> static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
> struct spi_transfer *xfer)
> {
> @@ -425,6 +451,220 @@ static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
> return xfer->delay_usecs == 0 && !xfer->cs_change;
> }
>
> +static bool filter(struct dma_chan *chan, void *slave)
> +{
> + struct at_dma_slave *sl = slave;
> +
> + if (sl->dma_dev == chan->device->dev) {
> + chan->private = sl;
> + return true;
> + } else {
> + return false;
> + }
> +}
> +
> +static int __devinit atmel_spi_configure_dma(struct atmel_spi *as)
> +{
> + struct at_dma_slave *sdata
> + = (struct at_dma_slave *)&as->pdata->dma_slave;
> +
> + if (sdata && sdata->dma_dev) {
> + dma_cap_mask_t mask;
> +
> + /* setup DMA addresses */
> + sdata->rx_reg = (dma_addr_t)as->phybase + SPI_RDR;
> + sdata->tx_reg = (dma_addr_t)as->phybase + SPI_TDR;
> +
> + /* Try to grab two DMA channels */
> + dma_cap_zero(mask);
> + dma_cap_set(DMA_SLAVE, mask);
> + as->dma.chan_tx = dma_request_channel(mask, filter, sdata);
> + if (as->dma.chan_tx)
> + as->dma.chan_rx =
> + dma_request_channel(mask, filter, sdata);
> + }
> + if (!as->dma.chan_rx || !as->dma.chan_tx) {
> + if (as->dma.chan_rx)
> + dma_release_channel(as->dma.chan_rx);
> + if (as->dma.chan_tx)
> + dma_release_channel(as->dma.chan_tx);
> + dev_err(&as->pdev->dev,
> + "DMA channel not available, unable to use SPI\n");
> + return -EBUSY;
> + }
> +
> + dev_info(&as->pdev->dev,
> + "Using %s (tx) and %s (rx) for DMA transfers\n",
> + dma_chan_name(as->dma.chan_tx),
> + dma_chan_name(as->dma.chan_rx));
> +
> + return 0;
> +}
> +
> +static void atmel_spi_stop_dma(struct atmel_spi *as)
> +{
> + if (as->dma.chan_rx)
> + as->dma.chan_rx->device->device_control(as->dma.chan_rx,
> + DMA_TERMINATE_ALL, 0);
> + if (as->dma.chan_tx)
> + as->dma.chan_tx->device->device_control(as->dma.chan_tx,
> + DMA_TERMINATE_ALL, 0);
> +}
> +
> +static void atmel_spi_release_dma(struct atmel_spi *as)
> +{
> + if (as->dma.chan_rx)
> + dma_release_channel(as->dma.chan_rx);
> + if (as->dma.chan_tx)
> + dma_release_channel(as->dma.chan_tx);
> +}
> +
> +/* This function is called by the DMA driver from tasklet context */
> +static void dma_callback(void *data)
> +{
> + struct spi_master *master = data;
> + struct atmel_spi *as = spi_master_get_devdata(master);
> +
> + /* trigger SPI tasklet */
> + tasklet_schedule(&as->tasklet);
> +}
> +
> +/*
> + * Next transfer using PIO.
> + * lock is held, spi tasklet is blocked
> + */
> +static void atmel_spi_next_xfer_pio(struct spi_master *master,
> + struct spi_transfer *xfer)
> +{
> + struct atmel_spi *as = spi_master_get_devdata(master);
> +
> + dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n");
> +
> + as->current_remaining_bytes = xfer->len;
> +
> + /* Make sure data is not remaining in RDR */
> + spi_readl(as, RDR);
> + while (spi_readl(as, SR) & SPI_BIT(RDRF)) {
> + spi_readl(as, RDR);
> + cpu_relax();
> + }
> +
> + if (xfer->tx_buf)
> + spi_writel(as, TDR, *(u8 *)(xfer->tx_buf));
> + else
> + spi_writel(as, TDR, 0);
> +
> + dev_dbg(master->dev.parent,
> + " start pio xfer %p: len %u tx %p rx %p\n",
> + xfer, xfer->len, xfer->tx_buf, xfer->rx_buf);
> +
> + /* Enable relevant interrupts */
> + spi_writel(as, IER, SPI_BIT(RDRF) | SPI_BIT(OVRES));
> +}
> +
> +/*
> + * Submit next transfer for DMA.
> + * lock is held, spi tasklet is blocked
> + */
> +static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
> + struct spi_transfer *xfer,
> + u32 *plen)
> +{
> + struct atmel_spi *as = spi_master_get_devdata(master);
> + struct dma_chan *rxchan = as->dma.chan_rx;
> + struct dma_chan *txchan = as->dma.chan_tx;
> + struct dma_async_tx_descriptor *rxdesc;
> + struct dma_async_tx_descriptor *txdesc;
> + dma_cookie_t cookie;
> + u32 len = *plen;
> +
> + dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_dma_submit\n");
> +
> + /* Check that the channels are available */
> + if (!rxchan || !txchan)
> + return -ENODEV;
> +
> + /* release lock for DMA operations */
> + atmel_spi_unlock(as);
> +
> + /* prepare the RX dma transfer */
> + sg_init_table(&as->dma.sgrx, 1);
> + if (xfer->rx_buf)
> + as->dma.sgrx.dma_address = xfer->rx_dma + xfer->len - *plen;
> + else {
> + as->dma.sgrx.dma_address = as->buffer_dma;
> + if (len > BUFFER_SIZE)
> + len = BUFFER_SIZE;
> + }
You should use brackets before the "else" also.
cf Documentation/CodingStyle line 169 :
This does not apply if only one branch of a conditional statement is a single
statement; in the latter case use braces in both branches:
if (condition) {
do_this();
do_that();
} else {
otherwise();
}
> +
> + /* prepare the TX dma transfer */
> + sg_init_table(&as->dma.sgtx, 1);
> + if (xfer->tx_buf) {
> + as->dma.sgtx.dma_address = xfer->tx_dma + xfer->len - *plen;
> + } else {
> + as->dma.sgtx.dma_address = as->buffer_dma;
> + if (len > BUFFER_SIZE)
> + len = BUFFER_SIZE;
> + memset(as->buffer, 0, len);
> + }
> +
> + sg_dma_len(&as->dma.sgtx) = len;
> + sg_dma_len(&as->dma.sgrx) = len;
> +
> + *plen = len;
> +
> + /* Send both scatterlists */
> + rxdesc = rxchan->device->device_prep_slave_sg(rxchan,
> + &as->dma.sgrx,
> + 1,
> + DMA_FROM_DEVICE,
> + DMA_PREP_INTERRUPT | DMA_CTRL_ACK,
> + NULL);
> + if (!rxdesc)
> + goto err_dma;
> +
> + txdesc = txchan->device->device_prep_slave_sg(txchan,
> + &as->dma.sgtx,
> + 1,
> + DMA_TO_DEVICE,
> + DMA_PREP_INTERRUPT | DMA_CTRL_ACK,
> + NULL);
> + if (!txdesc)
> + goto err_dma;
> +
> + dev_dbg(master->dev.parent,
> + " start dma xfer %p: len %u tx %p/%08x rx %p/%08x\n",
> + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
> + xfer->rx_buf, xfer->rx_dma);
> +
> + /* Enable relevant interrupts */
> + spi_writel(as, IER, SPI_BIT(OVRES));
> +
> + /* Put the callback on the RX transfer only, that should finish last */
> + rxdesc->callback = dma_callback;
> + rxdesc->callback_param = master;
> +
> + /* Submit and fire RX and TX with TX last so we're ready to read! */
> + cookie = rxdesc->tx_submit(rxdesc);
> + if (dma_submit_error(cookie))
> + goto err_dma;
> + cookie = txdesc->tx_submit(txdesc);
> + if (dma_submit_error(cookie))
> + goto err_dma;
> + rxchan->device->device_issue_pending(rxchan);
> + txchan->device->device_issue_pending(txchan);
> +
> + /* take back lock */
> + atmel_spi_lock(as);
> + return 0;
> +
> +err_dma:
> + spi_writel(as, IDR, SPI_BIT(OVRES));
> + atmel_spi_stop_dma(as);
> + atmel_spi_lock(as);
> + return -ENOMEM;
> +}
> +
> static void atmel_spi_next_xfer_data(struct spi_master *master,
> struct spi_transfer *xfer,
> dma_addr_t *tx_dma,
> @@ -457,10 +697,10 @@ static void atmel_spi_next_xfer_data(struct spi_master *master,
> }
>
> /*
> - * Submit next transfer for DMA.
> + * Submit next transfer for PDC.
> * lock is held, spi irq is blocked
> */
> -static void atmel_spi_next_xfer(struct spi_master *master,
> +static void atmel_spi_next_xfer_pdc(struct spi_master *master,
> struct spi_message *msg)
> {
> struct atmel_spi *as = spi_master_get_devdata(master);
> @@ -557,6 +797,49 @@ static void atmel_spi_next_xfer(struct spi_master *master,
> spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
> }
>
> +/*
> + * Choose way to submit next transfer and start it.
> + * lock is held, spi tasklet is blocked
> + */
> +static void atmel_spi_next_xfer_dma(struct spi_master *master,
> + struct spi_message *msg)
> +{
> + struct atmel_spi *as = spi_master_get_devdata(master);
> + struct spi_transfer *xfer;
> + u32 remaining, len;
> +
> + dev_vdbg(&msg->spi->dev, "atmel_spi_next_xfer\n");
> +
> + remaining = as->current_remaining_bytes;
> + if (remaining) {
> + xfer = as->current_transfer;
> + len = remaining;
> + } else {
> + if (!as->current_transfer)
> + xfer = list_entry(msg->transfers.next,
> + struct spi_transfer, transfer_list);
> + else
> + xfer = list_entry(
> + as->current_transfer->transfer_list.next,
> + struct spi_transfer, transfer_list);
> +
> + as->current_transfer = xfer;
> + len = xfer->len;
> + }
> +
> + if (atmel_spi_use_dma(as, xfer)) {
> + u32 total = len;
> + if (!atmel_spi_next_xfer_dma_submit(master, xfer, &len)) {
> + as->current_remaining_bytes = total - len;
> + return;
> + } else
> + dev_err(&msg->spi->dev, "unable to use DMA, fallback to PIO\n");
same here.
> + }
> +
> + /* use PIO if error appened using DMA */
> + atmel_spi_next_xfer_pio(master, xfer);
> +}
> +
> static void atmel_spi_next_message(struct spi_master *master)
> {
> struct atmel_spi *as = spi_master_get_devdata(master);
> @@ -581,7 +864,10 @@ static void atmel_spi_next_message(struct spi_master *master)
> } else
> cs_activate(as, spi);
>
> - atmel_spi_next_xfer(master, msg);
> + if (as->use_pdc)
> + atmel_spi_next_xfer_pdc(master, msg);
> + else
> + atmel_spi_next_xfer_dma(master, msg);
> }
>
> /*
> @@ -634,6 +920,11 @@ static void atmel_spi_dma_unmap_xfer(struct spi_master *master,
> xfer->len, DMA_FROM_DEVICE);
> }
>
> +static void atmel_spi_disable_pdc_transfer(struct atmel_spi *as)
> +{
> + spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> +}
> +
> static void
> atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
> struct spi_message *msg, int stay)
> @@ -659,19 +950,175 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
> as->done_status = 0;
>
> /* continue if needed */
> - if (list_empty(&as->queue) || as->stopping)
> - spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> - else
> + if (list_empty(&as->queue) || as->stopping) {
> + if (as->use_pdc)
> + atmel_spi_disable_pdc_transfer(as);
> + } else
> atmel_spi_next_message(master);
same.
> }
>
> -static irqreturn_t
> -atmel_spi_interrupt(int irq, void *dev_id)
> +/* Called from IRQ
> + * lock is held
> + *
> + * Must update "current_remaining_bytes" to keep track of data
> + * to transfer.
> + */
> +static void
> +atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer)
> {
> - struct spi_master *master = dev_id;
> + u8 *txp;
> + u8 *rxp;
> + unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
> +
> + if (xfer->rx_buf) {
> + rxp = ((u8 *)xfer->rx_buf) + xfer_pos;
> + *rxp = spi_readl(as, RDR);
> + } else {
> + spi_readl(as, RDR);
> + }
> +
> + as->current_remaining_bytes--;
> +
> + if (as->current_remaining_bytes) {
> + if (xfer->tx_buf) {
> + txp = ((u8 *)xfer->tx_buf) + xfer_pos + 1;
> + spi_writel(as, TDR, *txp);
> + } else {
> + spi_writel(as, TDR, 0);
> + }
> + }
> +}
> +
> +/* Tasklet
> + * Called from DMA callback + pio transfer and overrun IRQ.
> + */
> +static void atmel_spi_tasklet_func(unsigned long data)
> +{
> + struct spi_master *master = (struct spi_master *)data;
> struct atmel_spi *as = spi_master_get_devdata(master);
> struct spi_message *msg;
> struct spi_transfer *xfer;
> +
> + dev_vdbg(master->dev.parent, "atmel_spi_tasklet_func\n");
> +
> + atmel_spi_lock(as);
> +
> + xfer = as->current_transfer;
> +
> + if (xfer == NULL)
> + /* already been there */
> + goto tasklet_out;
> +
> + msg = list_entry(as->queue.next, struct spi_message, queue);
> +
> + if (as->current_remaining_bytes == 0) {
> + if (as->done_status < 0) {
> + /* error happened (overrun) */
> + if (atmel_spi_use_dma(as, xfer))
> + atmel_spi_stop_dma(as);
> + } else
> + /* only update length if no error */
> + msg->actual_length += xfer->len;
same
> +
> + if (atmel_spi_use_dma(as, xfer))
> + if (!msg->is_dma_mapped)
> + atmel_spi_dma_unmap_xfer(master, xfer);
> +
> + if (xfer->delay_usecs)
> + udelay(xfer->delay_usecs);
> +
> + if (atmel_spi_xfer_is_last(msg, xfer) || as->done_status < 0)
> + /* report completed (or erroneous) message */
> + atmel_spi_msg_done(master, as, msg, xfer->cs_change);
> + else {
same
> + if (xfer->cs_change) {
> + cs_deactivate(as, msg->spi);
> + udelay(1);
> + cs_activate(as, msg->spi);
> + }
> +
> + /*
> + * Not done yet. Submit the next transfer.
> + *
> + * FIXME handle protocol options for xfer
> + */
> + atmel_spi_next_xfer_dma(master, msg);
> + }
> + } else
same
> + /*
> + * Keep going, we still have data to send in
> + * the current transfer.
> + */
> + atmel_spi_next_xfer_dma(master, msg);
> +
> +tasklet_out:
> + atmel_spi_unlock(as);
> +}
> +
> +static int atmel_spi_interrupt_dma(struct atmel_spi *as,
> + struct spi_master *master)
> +{
> + u32 status, pending, imr;
> + struct spi_transfer *xfer;
> + int ret = IRQ_NONE;
> +
> + imr = spi_readl(as, IMR);
> + status = spi_readl(as, SR);
> + pending = status & imr;
> +
> + if (pending & SPI_BIT(OVRES)) {
> + ret = IRQ_HANDLED;
> + spi_writel(as, IDR, SPI_BIT(OVRES));
> + dev_warn(master->dev.parent, "overrun\n");
> +
> + /*
> + * When we get an overrun, we disregard the current
> + * transfer. Data will not be copied back from any
> + * bounce buffer and msg->actual_len will not be
> + * updated with the last xfer.
> + *
> + * We will also not process any remaning transfers in
> + * the message.
> + *
> + * All actions are done in tasklet with done_status indication
> + */
> + as->done_status = -EIO;
> + smp_wmb();
> +
> + /* Clear any overrun happening while cleaning up */
> + spi_readl(as, SR);
> +
> + tasklet_schedule(&as->tasklet);
> +
> + } else if (pending & SPI_BIT(RDRF)) {
> + atmel_spi_lock(as);
> +
> + if (as->current_remaining_bytes) {
> + ret = IRQ_HANDLED;
> + xfer = as->current_transfer;
> + atmel_spi_pump_pio_data(as, xfer);
> + if (!as->current_remaining_bytes) {
> + /* no more data to xfer, kick tasklet */
> + spi_writel(as, IDR, pending);
> + tasklet_schedule(&as->tasklet);
> + }
> + }
> +
> + atmel_spi_unlock(as);
> + } else {
> + WARN_ONCE(pending, "IRQ not handled, pending = %x\n", pending);
> + ret = IRQ_HANDLED;
> + spi_writel(as, IDR, pending);
> + }
> +
> + return ret;
> +}
> +
> +static int atmel_spi_interrupt_pdc(struct atmel_spi *as,
> + struct spi_master *master)
> +{
> + struct spi_message *msg;
> + struct spi_transfer *xfer;
> u32 status, pending, imr;
> int ret = IRQ_NONE;
>
> @@ -767,14 +1214,14 @@ atmel_spi_interrupt(int irq, void *dev_id)
> *
> * FIXME handle protocol options for xfer
> */
> - atmel_spi_next_xfer(master, msg);
> + atmel_spi_next_xfer_pdc(master, msg);
> }
> } else {
> /*
> * Keep going, we still have data to send in
> * the current transfer.
> */
> - atmel_spi_next_xfer(master, msg);
> + atmel_spi_next_xfer_pdc(master, msg);
> }
> }
>
> @@ -783,6 +1230,27 @@ atmel_spi_interrupt(int irq, void *dev_id)
> return ret;
> }
>
> +/* Interrupt
> + *
> + * No need for locking in this Interrupt handler: done_status is the
> + * only information modified. What we need is the update of this field
> + * before tasklet runs. This is ensured by using barrier.
> + */
> +static irqreturn_t
> +atmel_spi_interrupt(int irq, void *dev_id)
> +{
> + struct spi_master *master = dev_id;
> + struct atmel_spi *as = spi_master_get_devdata(master);
> + int ret;
> +
> + if (as->use_pdc)
> + ret = atmel_spi_interrupt_pdc(as, master);
> + else
> + ret = atmel_spi_interrupt_dma(as, master);
> +
> + return ret;
> +}
> +
> static int atmel_spi_setup(struct spi_device *spi)
> {
> struct atmel_spi *as;
> @@ -945,13 +1413,10 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
>
> /*
> * DMA map early, for performance (empties dcache ASAP) and
> - * better fault reporting. This is a DMA-only driver.
> - *
> - * NOTE that if dma_unmap_single() ever starts to do work on
> - * platforms supported by this driver, we would need to clean
> - * up mappings for previously-mapped transfers.
> + * better fault reporting.
> */
> - if (!msg->is_dma_mapped) {
> + if ((!msg->is_dma_mapped) && (atmel_spi_use_dma(as, xfer)
> + || as->use_pdc)) {
> if (atmel_spi_dma_map_xfer(as, xfer) < 0)
> return -ENOMEM;
> }
> @@ -1068,6 +1533,8 @@ static int atmel_spi_probe(struct platform_device *pdev)
>
> spin_lock_init(&as->lock);
> INIT_LIST_HEAD(&as->queue);
> + tasklet_init(&as->tasklet, atmel_spi_tasklet_func,
> + (unsigned long)master);
> as->pdev = pdev;
> as->regs = ioremap(regs->start, resource_size(regs));
> if (!as->regs)
> @@ -1096,7 +1563,15 @@ static int atmel_spi_probe(struct platform_device *pdev)
> else
> spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
>
> - spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> + as->use_dma = false;
> + as->use_pdc = false;
> +
> + if (as->pdata->has_dma_support) {
> + if (atmel_spi_configure_dma(as) == 0)
> + as->use_dma = true;
> + } else
> + as->use_pdc = true;
same.
Maybe you should add a little dev_info in case both use_dma and
use_pcd are null:
if (!as->use_dma && !as->use_pdc)
dev_info(&pdev->dev, "Atmel SPI Controller: Using PIO only for transferts");
I tested it on sam9g35.
It's working *almost* all right.
I've got a problem with the ioctl SPI_IOC_MESSAGE().
(cf Documentation/spi/spidev_fdx.c)
I'm reading on spidev something like that :
struct spi_ioc_transfer xfer[3];
memset(xfer, 0, sizeof(xfer));
xfer[0].tx_buf = (unsigned long)&tx_header;
xer[0].rx_buf = (unsigned long)&rx_header;
xfer[0].len = 2;
xfer[1].rx_buf = (unsigned long)rx_buf;
xfer[1].len = 124;
xfer[2].tx_buf = (unsigned long)&tx_footer;
xfer[2].rx_buf = (unsigned long)&rx_footer;
xfer[2].len = 2;
nb = ioctl(spi_data->fd, SPI_IOC_MESSAGE(3), xfer);
If I force DMA all the time with
#define DMA_MIN_BYTES 1
I haven't got any problem, all works ok.
If I for PIO all the time with
#define DMA_MIN_BYTES 1000
I'ts woking also without any problem.
BUT
When the DMA_MIN_BYTES are at 16 (so, xfer[0] is transfered by PIO,
xfer[1] by DMA and xfer[2] by PIO), I've got a lot of errors in my
rx_buffer.
ie, I'm not receiving what I should.
Did you experience anything like that ?
Regards,
Richard
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support
2013-01-23 16:25 ` Richard Genoud
@ 2013-01-24 0:44 ` Yang, Wenyou
0 siblings, 0 replies; 29+ messages in thread
From: Yang, Wenyou @ 2013-01-24 0:44 UTC (permalink / raw)
To: Richard Genoud
Cc: linux-arm-kernel, linux-kernel, Ferre, Nicolas, plagnioj, Lin,
JM, grant.likely, spi-devel-general
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 31146 bytes --]
Thanks a lot for so much comments
> -----Original Message-----
> From: Richard Genoud [mailto:richard.genoud@gmail.com]
> Sent: 2013年1月24日 0:25
> To: Yang, Wenyou
> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
> Nicolas; plagnioj@jcrosoft.com; Lin, JM; grant.likely@secretlab.ca;
> spi-devel-general@lists.sourceforge.net
> Subject: Re: [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support
>
> 2013/1/14 Wenyou Yang <wenyou.yang@atmel.com>:
> > From: Nicolas Ferre <nicolas.ferre@atmel.com>
> >
> > Add dmaengine support.
> >
> > For different SoC, the "has_dma_support" is used to select
> > the transfer mode: dmaengine or PDC.
> >
> > For the dmaengine transfer mode, if it fails to config dmaengine,
> > or if the message len less than 16 bytes, it will use the PIO transfer mode.
> >
> > Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> > [wenyou.yang@atmel.com: using "has_dma_support" to select DMA as the
> spi xfer mode]
> > [wenyou.yang@atmel.com: add support NPCS1,2,3 chip select other than
> NPCS0]
> > [wenyou.yang@atmel.com: fix DMA: OOPS if buffer > 4096 bytes]
> > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > Cc: grant.likely@secretlab.ca
> > Cc: spi-devel-general@lists.sourceforge.net
> > Cc: richard.genoud@gmail.com
> > ---
> > This patch is based on the original patch from Nicolas
> > [PATCH] spi/atmel_spi: add dmaengine support
> > and merge the patches from Richard Genoud <richard.genoud@gmail.com>
> > [PATCH] spi-atmel: update with dmaengine interface
> > [PATCH] spi-atmel: fix __init/__devinit sections mismatch
> > and Wenyou Yang add the code to support selecting the spi transfer mode,
> > add support NPCS1,2,3 chip select other than NPCS0.
> > fix DMA: OOPS if buffer > 4096 bytes.
> >
> > diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
> > index 43c1f63..0d242dc 100644
> > --- a/drivers/spi/spi-atmel.c
> > +++ b/drivers/spi/spi-atmel.c
> > @@ -15,11 +15,13 @@
> > #include <linux/platform_device.h>
> > #include <linux/delay.h>
> > #include <linux/dma-mapping.h>
> > +#include <linux/dmaengine.h>
> > #include <linux/err.h>
> > #include <linux/interrupt.h>
> > #include <linux/spi/spi.h>
> > #include <linux/slab.h>
> > #include <linux/platform_data/atmel.h>
> > +#include <linux/platform_data/dma-atmel.h>
> > #include <linux/of.h>
> >
> > #include <asm/io.h>
> > @@ -182,6 +184,19 @@
> > #define spi_writel(port,reg,value) \
> > __raw_writel((value), (port)->regs + SPI_##reg)
> >
> > +/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
> > + * cache operations; better heuristics consider wordsize and bitrate.
> > + */
> > +#define DMA_MIN_BYTES 16
> > +
> > +struct atmel_spi_dma {
> > + struct dma_chan *chan_rx;
> > + struct dma_chan *chan_tx;
> > + struct scatterlist sgrx;
> > + struct scatterlist sgtx;
> > + struct dma_async_tx_descriptor *data_desc_rx;
> > + struct dma_async_tx_descriptor *data_desc_tx;
> > +};
> >
> > /*
> > * The core SPI transfer engine just talks to a register bank to set up
> > @@ -192,6 +207,7 @@ struct atmel_spi_pdata {
> > u8 version;
> > bool has_dma_support;
> > bool has_wdrbt;
> > + struct at_dma_slave dma_slave;
> > };
> >
> > struct atmel_spi {
> > @@ -207,6 +223,7 @@ struct atmel_spi {
> >
> > u8 stopping;
> > struct list_head queue;
> > + struct tasklet_struct tasklet;
> > struct spi_transfer *current_transfer;
> > unsigned long current_remaining_bytes;
> > struct spi_transfer *next_transfer;
> > @@ -214,8 +231,15 @@ struct atmel_spi {
> > int done_status;
> > struct atmel_spi_pdata *pdata;
> >
> > + bool use_dma;
> > + bool use_pdc;
> > +
> > + /* scratch buffer */
> > void *buffer;
> > dma_addr_t buffer_dma;
> > +
> > + /* dmaengine data */
> > + struct atmel_spi_dma dma;
> > };
> >
> > /* Controller-specific per-slave state */
> > @@ -328,9 +352,7 @@ static bool atmel_spi_is_v2(struct atmel_spi *as)
> > * and (c) will trigger that first erratum in some cases.
> > *
> > * TODO: Test if the atmel_spi_is_v2() branch below works on
> > - * AT91RM9200 if we use some other register than CSR0. However, don't
> > - * do this unconditionally since AP7000 has an errata where the BITS
> > - * field in CSR0 overrides all other CSRs.
> > + * AT91RM9200 if we use some other register than CSR0.
> > */
> >
> > static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
> > @@ -340,18 +362,16 @@ static void cs_activate(struct atmel_spi *as,
> struct spi_device *spi)
> > u32 mr;
> >
> > if (atmel_spi_is_v2(as)) {
> > - /*
> > - * Always use CSR0. This ensures that the clock
> > - * switches to the correct idle polarity before we
> > - * toggle the CS.
> > - */
> > - spi_writel(as, CSR0, asd->csr);
> > + spi_writel(as, CSR0 + 4 * spi->chip_select, asd->csr);
> >
> > if (as->pdata->has_wdrbt)
> > - spi_writel(as, MR, SPI_BF(PCS, 0x0e) |
> SPI_BIT(MSTR)
> > - | SPI_BIT(MODFDIS) |
> SPI_BIT(WDRBT));
> > + spi_writel(as, MR,
> > + SPI_BF(PCS, ~(0x01 <<
> spi->chip_select))
> > + | SPI_BIT(MSTR) |
> SPI_BIT(MODFDIS)
> > + | SPI_BIT(WDRBT));
> > else
> > - spi_writel(as, MR, SPI_BF(PCS, 0x0e)
> > + spi_writel(as, MR,
> > + SPI_BF(PCS, ~(0x01 <<
> spi->chip_select))
> > | SPI_BIT(MSTR) |
> SPI_BIT(MODFDIS));
> >
> > mr = spi_readl(as, MR);
> > @@ -414,6 +434,12 @@ static void atmel_spi_unlock(struct atmel_spi *as)
> > spin_unlock_irqrestore(&as->lock, as->flags);
> > }
> >
> > +static inline bool atmel_spi_use_dma(struct atmel_spi *as,
> > + struct spi_transfer *xfer)
> > +{
> > + return as->use_dma && xfer->len >= DMA_MIN_BYTES;
> > +}
> > +
> > static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
> > struct spi_transfer *xfer)
> > {
> > @@ -425,6 +451,220 @@ static inline int
> atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
> > return xfer->delay_usecs == 0 && !xfer->cs_change;
> > }
> >
> > +static bool filter(struct dma_chan *chan, void *slave)
> > +{
> > + struct at_dma_slave *sl = slave;
> > +
> > + if (sl->dma_dev == chan->device->dev) {
> > + chan->private = sl;
> > + return true;
> > + } else {
> > + return false;
> > + }
> > +}
> > +
> > +static int __devinit atmel_spi_configure_dma(struct atmel_spi *as)
> > +{
> > + struct at_dma_slave *sdata
> > + = (struct at_dma_slave
> *)&as->pdata->dma_slave;
> > +
> > + if (sdata && sdata->dma_dev) {
> > + dma_cap_mask_t mask;
> > +
> > + /* setup DMA addresses */
> > + sdata->rx_reg = (dma_addr_t)as->phybase + SPI_RDR;
> > + sdata->tx_reg = (dma_addr_t)as->phybase + SPI_TDR;
> > +
> > + /* Try to grab two DMA channels */
> > + dma_cap_zero(mask);
> > + dma_cap_set(DMA_SLAVE, mask);
> > + as->dma.chan_tx = dma_request_channel(mask, filter,
> sdata);
> > + if (as->dma.chan_tx)
> > + as->dma.chan_rx =
> > + dma_request_channel(mask, filter,
> sdata);
> > + }
> > + if (!as->dma.chan_rx || !as->dma.chan_tx) {
> > + if (as->dma.chan_rx)
> > + dma_release_channel(as->dma.chan_rx);
> > + if (as->dma.chan_tx)
> > + dma_release_channel(as->dma.chan_tx);
> > + dev_err(&as->pdev->dev,
> > + "DMA channel not available, unable to use
> SPI\n");
> > + return -EBUSY;
> > + }
> > +
> > + dev_info(&as->pdev->dev,
> > + "Using %s (tx) and %s (rx) for DMA
> transfers\n",
> > + dma_chan_name(as->dma.chan_tx),
> > + dma_chan_name(as->dma.chan_rx));
> > +
> > + return 0;
> > +}
> > +
> > +static void atmel_spi_stop_dma(struct atmel_spi *as)
> > +{
> > + if (as->dma.chan_rx)
> > +
> as->dma.chan_rx->device->device_control(as->dma.chan_rx,
> > +
> DMA_TERMINATE_ALL, 0);
> > + if (as->dma.chan_tx)
> > +
> as->dma.chan_tx->device->device_control(as->dma.chan_tx,
> > +
> DMA_TERMINATE_ALL, 0);
> > +}
> > +
> > +static void atmel_spi_release_dma(struct atmel_spi *as)
> > +{
> > + if (as->dma.chan_rx)
> > + dma_release_channel(as->dma.chan_rx);
> > + if (as->dma.chan_tx)
> > + dma_release_channel(as->dma.chan_tx);
> > +}
> > +
> > +/* This function is called by the DMA driver from tasklet context */
> > +static void dma_callback(void *data)
> > +{
> > + struct spi_master *master = data;
> > + struct atmel_spi *as = spi_master_get_devdata(master);
> > +
> > + /* trigger SPI tasklet */
> > + tasklet_schedule(&as->tasklet);
> > +}
> > +
> > +/*
> > + * Next transfer using PIO.
> > + * lock is held, spi tasklet is blocked
> > + */
> > +static void atmel_spi_next_xfer_pio(struct spi_master *master,
> > + struct spi_transfer *xfer)
> > +{
> > + struct atmel_spi *as = spi_master_get_devdata(master);
> > +
> > + dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n");
> > +
> > + as->current_remaining_bytes = xfer->len;
> > +
> > + /* Make sure data is not remaining in RDR */
> > + spi_readl(as, RDR);
> > + while (spi_readl(as, SR) & SPI_BIT(RDRF)) {
> > + spi_readl(as, RDR);
> > + cpu_relax();
> > + }
> > +
> > + if (xfer->tx_buf)
> > + spi_writel(as, TDR, *(u8 *)(xfer->tx_buf));
> > + else
> > + spi_writel(as, TDR, 0);
> > +
> > + dev_dbg(master->dev.parent,
> > + " start pio xfer %p: len %u tx %p rx %p\n",
> > + xfer, xfer->len, xfer->tx_buf, xfer->rx_buf);
> > +
> > + /* Enable relevant interrupts */
> > + spi_writel(as, IER, SPI_BIT(RDRF) | SPI_BIT(OVRES));
> > +}
> > +
> > +/*
> > + * Submit next transfer for DMA.
> > + * lock is held, spi tasklet is blocked
> > + */
> > +static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
> > + struct spi_transfer *xfer,
> > + u32 *plen)
> > +{
> > + struct atmel_spi *as = spi_master_get_devdata(master);
> > + struct dma_chan *rxchan = as->dma.chan_rx;
> > + struct dma_chan *txchan = as->dma.chan_tx;
> > + struct dma_async_tx_descriptor *rxdesc;
> > + struct dma_async_tx_descriptor *txdesc;
> > + dma_cookie_t cookie;
> > + u32 len = *plen;
> > +
> > + dev_vdbg(master->dev.parent,
> "atmel_spi_next_xfer_dma_submit\n");
> > +
> > + /* Check that the channels are available */
> > + if (!rxchan || !txchan)
> > + return -ENODEV;
> > +
> > + /* release lock for DMA operations */
> > + atmel_spi_unlock(as);
> > +
> > + /* prepare the RX dma transfer */
> > + sg_init_table(&as->dma.sgrx, 1);
> > + if (xfer->rx_buf)
> > + as->dma.sgrx.dma_address = xfer->rx_dma + xfer->len -
> *plen;
> > + else {
> > + as->dma.sgrx.dma_address = as->buffer_dma;
> > + if (len > BUFFER_SIZE)
> > + len = BUFFER_SIZE;
> > + }
> You should use brackets before the "else" also.
> cf Documentation/CodingStyle line 169 :
>
> This does not apply if only one branch of a conditional statement is a single
> statement; in the latter case use braces in both branches:
>
> if (condition) {
> do_this();
> do_that();
> } else {
> otherwise();
> }
>
>
> > +
> > + /* prepare the TX dma transfer */
> > + sg_init_table(&as->dma.sgtx, 1);
> > + if (xfer->tx_buf) {
> > + as->dma.sgtx.dma_address = xfer->tx_dma + xfer->len -
> *plen;
> > + } else {
> > + as->dma.sgtx.dma_address = as->buffer_dma;
> > + if (len > BUFFER_SIZE)
> > + len = BUFFER_SIZE;
> > + memset(as->buffer, 0, len);
> > + }
> > +
> > + sg_dma_len(&as->dma.sgtx) = len;
> > + sg_dma_len(&as->dma.sgrx) = len;
> > +
> > + *plen = len;
> > +
> > + /* Send both scatterlists */
> > + rxdesc = rxchan->device->device_prep_slave_sg(rxchan,
> > + &as->dma.sgrx,
> > + 1,
> > + DMA_FROM_DEVICE,
> > + DMA_PREP_INTERRUPT |
> DMA_CTRL_ACK,
> > + NULL);
> > + if (!rxdesc)
> > + goto err_dma;
> > +
> > + txdesc = txchan->device->device_prep_slave_sg(txchan,
> > + &as->dma.sgtx,
> > + 1,
> > + DMA_TO_DEVICE,
> > + DMA_PREP_INTERRUPT |
> DMA_CTRL_ACK,
> > + NULL);
> > + if (!txdesc)
> > + goto err_dma;
> > +
> > + dev_dbg(master->dev.parent,
> > + " start dma xfer %p: len %u tx %p/%08x rx %p/%08x\n",
> > + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
> > + xfer->rx_buf, xfer->rx_dma);
> > +
> > + /* Enable relevant interrupts */
> > + spi_writel(as, IER, SPI_BIT(OVRES));
> > +
> > + /* Put the callback on the RX transfer only, that should finish last */
> > + rxdesc->callback = dma_callback;
> > + rxdesc->callback_param = master;
> > +
> > + /* Submit and fire RX and TX with TX last so we're ready to read! */
> > + cookie = rxdesc->tx_submit(rxdesc);
> > + if (dma_submit_error(cookie))
> > + goto err_dma;
> > + cookie = txdesc->tx_submit(txdesc);
> > + if (dma_submit_error(cookie))
> > + goto err_dma;
> > + rxchan->device->device_issue_pending(rxchan);
> > + txchan->device->device_issue_pending(txchan);
> > +
> > + /* take back lock */
> > + atmel_spi_lock(as);
> > + return 0;
> > +
> > +err_dma:
> > + spi_writel(as, IDR, SPI_BIT(OVRES));
> > + atmel_spi_stop_dma(as);
> > + atmel_spi_lock(as);
> > + return -ENOMEM;
> > +}
> > +
> > static void atmel_spi_next_xfer_data(struct spi_master *master,
> > struct spi_transfer *xfer,
> > dma_addr_t *tx_dma,
> > @@ -457,10 +697,10 @@ static void atmel_spi_next_xfer_data(struct
> spi_master *master,
> > }
> >
> > /*
> > - * Submit next transfer for DMA.
> > + * Submit next transfer for PDC.
> > * lock is held, spi irq is blocked
> > */
> > -static void atmel_spi_next_xfer(struct spi_master *master,
> > +static void atmel_spi_next_xfer_pdc(struct spi_master *master,
> > struct spi_message *msg)
> > {
> > struct atmel_spi *as = spi_master_get_devdata(master);
> > @@ -557,6 +797,49 @@ static void atmel_spi_next_xfer(struct spi_master
> *master,
> > spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
> > }
> >
> > +/*
> > + * Choose way to submit next transfer and start it.
> > + * lock is held, spi tasklet is blocked
> > + */
> > +static void atmel_spi_next_xfer_dma(struct spi_master *master,
> > + struct spi_message *msg)
> > +{
> > + struct atmel_spi *as = spi_master_get_devdata(master);
> > + struct spi_transfer *xfer;
> > + u32 remaining, len;
> > +
> > + dev_vdbg(&msg->spi->dev, "atmel_spi_next_xfer\n");
> > +
> > + remaining = as->current_remaining_bytes;
> > + if (remaining) {
> > + xfer = as->current_transfer;
> > + len = remaining;
> > + } else {
> > + if (!as->current_transfer)
> > + xfer = list_entry(msg->transfers.next,
> > + struct spi_transfer, transfer_list);
> > + else
> > + xfer = list_entry(
> > +
> as->current_transfer->transfer_list.next,
> > + struct spi_transfer,
> transfer_list);
> > +
> > + as->current_transfer = xfer;
> > + len = xfer->len;
> > + }
> > +
> > + if (atmel_spi_use_dma(as, xfer)) {
> > + u32 total = len;
> > + if (!atmel_spi_next_xfer_dma_submit(master, xfer, &len))
> {
> > + as->current_remaining_bytes = total - len;
> > + return;
> > + } else
> > + dev_err(&msg->spi->dev, "unable to use DMA,
> fallback to PIO\n");
> same here.
> > + }
> > +
> > + /* use PIO if error appened using DMA */
> > + atmel_spi_next_xfer_pio(master, xfer);
> > +}
> > +
> > static void atmel_spi_next_message(struct spi_master *master)
> > {
> > struct atmel_spi *as = spi_master_get_devdata(master);
> > @@ -581,7 +864,10 @@ static void atmel_spi_next_message(struct
> spi_master *master)
> > } else
> > cs_activate(as, spi);
> >
> > - atmel_spi_next_xfer(master, msg);
> > + if (as->use_pdc)
> > + atmel_spi_next_xfer_pdc(master, msg);
> > + else
> > + atmel_spi_next_xfer_dma(master, msg);
> > }
> >
> > /*
> > @@ -634,6 +920,11 @@ static void atmel_spi_dma_unmap_xfer(struct
> spi_master *master,
> > xfer->len, DMA_FROM_DEVICE);
> > }
> >
> > +static void atmel_spi_disable_pdc_transfer(struct atmel_spi *as)
> > +{
> > + spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> > +}
> > +
> > static void
> > atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
> > struct spi_message *msg, int stay)
> > @@ -659,19 +950,175 @@ atmel_spi_msg_done(struct spi_master *master,
> struct atmel_spi *as,
> > as->done_status = 0;
> >
> > /* continue if needed */
> > - if (list_empty(&as->queue) || as->stopping)
> > - spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> > - else
> > + if (list_empty(&as->queue) || as->stopping) {
> > + if (as->use_pdc)
> > + atmel_spi_disable_pdc_transfer(as);
> > + } else
> > atmel_spi_next_message(master);
> same.
> > }
> >
> > -static irqreturn_t
> > -atmel_spi_interrupt(int irq, void *dev_id)
> > +/* Called from IRQ
> > + * lock is held
> > + *
> > + * Must update "current_remaining_bytes" to keep track of data
> > + * to transfer.
> > + */
> > +static void
> > +atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer)
> > {
> > - struct spi_master *master = dev_id;
> > + u8 *txp;
> > + u8 *rxp;
> > + unsigned long xfer_pos = xfer->len -
> as->current_remaining_bytes;
> > +
> > + if (xfer->rx_buf) {
> > + rxp = ((u8 *)xfer->rx_buf) + xfer_pos;
> > + *rxp = spi_readl(as, RDR);
> > + } else {
> > + spi_readl(as, RDR);
> > + }
> > +
> > + as->current_remaining_bytes--;
> > +
> > + if (as->current_remaining_bytes) {
> > + if (xfer->tx_buf) {
> > + txp = ((u8 *)xfer->tx_buf) + xfer_pos + 1;
> > + spi_writel(as, TDR, *txp);
> > + } else {
> > + spi_writel(as, TDR, 0);
> > + }
> > + }
> > +}
> > +
> > +/* Tasklet
> > + * Called from DMA callback + pio transfer and overrun IRQ.
> > + */
> > +static void atmel_spi_tasklet_func(unsigned long data)
> > +{
> > + struct spi_master *master = (struct spi_master *)data;
> > struct atmel_spi *as = spi_master_get_devdata(master);
> > struct spi_message *msg;
> > struct spi_transfer *xfer;
> > +
> > + dev_vdbg(master->dev.parent, "atmel_spi_tasklet_func\n");
> > +
> > + atmel_spi_lock(as);
> > +
> > + xfer = as->current_transfer;
> > +
> > + if (xfer == NULL)
> > + /* already been there */
> > + goto tasklet_out;
> > +
> > + msg = list_entry(as->queue.next, struct spi_message, queue);
> > +
> > + if (as->current_remaining_bytes == 0) {
> > + if (as->done_status < 0) {
> > + /* error happened (overrun) */
> > + if (atmel_spi_use_dma(as, xfer))
> > + atmel_spi_stop_dma(as);
> > + } else
> > + /* only update length if no error */
> > + msg->actual_length += xfer->len;
> same
> > +
> > + if (atmel_spi_use_dma(as, xfer))
> > + if (!msg->is_dma_mapped)
> > + atmel_spi_dma_unmap_xfer(master,
> xfer);
> > +
> > + if (xfer->delay_usecs)
> > + udelay(xfer->delay_usecs);
> > +
> > + if (atmel_spi_xfer_is_last(msg, xfer) || as->done_status <
> 0)
> > + /* report completed (or erroneous) message */
> > + atmel_spi_msg_done(master, as, msg,
> xfer->cs_change);
> > + else {
> same
> > + if (xfer->cs_change) {
> > + cs_deactivate(as, msg->spi);
> > + udelay(1);
> > + cs_activate(as, msg->spi);
> > + }
> > +
> > + /*
> > + * Not done yet. Submit the next transfer.
> > + *
> > + * FIXME handle protocol options for xfer
> > + */
> > + atmel_spi_next_xfer_dma(master, msg);
> > + }
> > + } else
> same
> > + /*
> > + * Keep going, we still have data to send in
> > + * the current transfer.
> > + */
> > + atmel_spi_next_xfer_dma(master, msg);
> > +
> > +tasklet_out:
> > + atmel_spi_unlock(as);
> > +}
> > +
> > +static int atmel_spi_interrupt_dma(struct atmel_spi *as,
> > + struct spi_master *master)
> > +{
> > + u32 status, pending, imr;
> > + struct spi_transfer *xfer;
> > + int ret = IRQ_NONE;
> > +
> > + imr = spi_readl(as, IMR);
> > + status = spi_readl(as, SR);
> > + pending = status & imr;
> > +
> > + if (pending & SPI_BIT(OVRES)) {
> > + ret = IRQ_HANDLED;
> > + spi_writel(as, IDR, SPI_BIT(OVRES));
> > + dev_warn(master->dev.parent, "overrun\n");
> > +
> > + /*
> > + * When we get an overrun, we disregard the current
> > + * transfer. Data will not be copied back from any
> > + * bounce buffer and msg->actual_len will not be
> > + * updated with the last xfer.
> > + *
> > + * We will also not process any remaning transfers in
> > + * the message.
> > + *
> > + * All actions are done in tasklet with done_status
> indication
> > + */
> > + as->done_status = -EIO;
> > + smp_wmb();
> > +
> > + /* Clear any overrun happening while cleaning up */
> > + spi_readl(as, SR);
> > +
> > + tasklet_schedule(&as->tasklet);
> > +
> > + } else if (pending & SPI_BIT(RDRF)) {
> > + atmel_spi_lock(as);
> > +
> > + if (as->current_remaining_bytes) {
> > + ret = IRQ_HANDLED;
> > + xfer = as->current_transfer;
> > + atmel_spi_pump_pio_data(as, xfer);
> > + if (!as->current_remaining_bytes) {
> > + /* no more data to xfer, kick tasklet */
> > + spi_writel(as, IDR, pending);
> > + tasklet_schedule(&as->tasklet);
> > + }
> > + }
> > +
> > + atmel_spi_unlock(as);
> > + } else {
> > + WARN_ONCE(pending, "IRQ not handled, pending
> = %x\n", pending);
> > + ret = IRQ_HANDLED;
> > + spi_writel(as, IDR, pending);
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +static int atmel_spi_interrupt_pdc(struct atmel_spi *as,
> > + struct spi_master *master)
> > +{
> > + struct spi_message *msg;
> > + struct spi_transfer *xfer;
> > u32 status, pending, imr;
> > int ret = IRQ_NONE;
> >
> > @@ -767,14 +1214,14 @@ atmel_spi_interrupt(int irq, void *dev_id)
> > *
> > * FIXME handle protocol options for
> xfer
> > */
> > - atmel_spi_next_xfer(master, msg);
> > + atmel_spi_next_xfer_pdc(master,
> msg);
> > }
> > } else {
> > /*
> > * Keep going, we still have data to send in
> > * the current transfer.
> > */
> > - atmel_spi_next_xfer(master, msg);
> > + atmel_spi_next_xfer_pdc(master, msg);
> > }
> > }
> >
> > @@ -783,6 +1230,27 @@ atmel_spi_interrupt(int irq, void *dev_id)
> > return ret;
> > }
> >
> > +/* Interrupt
> > + *
> > + * No need for locking in this Interrupt handler: done_status is the
> > + * only information modified. What we need is the update of this field
> > + * before tasklet runs. This is ensured by using barrier.
> > + */
> > +static irqreturn_t
> > +atmel_spi_interrupt(int irq, void *dev_id)
> > +{
> > + struct spi_master *master = dev_id;
> > + struct atmel_spi *as = spi_master_get_devdata(master);
> > + int ret;
> > +
> > + if (as->use_pdc)
> > + ret = atmel_spi_interrupt_pdc(as, master);
> > + else
> > + ret = atmel_spi_interrupt_dma(as, master);
> > +
> > + return ret;
> > +}
> > +
> > static int atmel_spi_setup(struct spi_device *spi)
> > {
> > struct atmel_spi *as;
> > @@ -945,13 +1413,10 @@ static int atmel_spi_transfer(struct spi_device
> *spi, struct spi_message *msg)
> >
> > /*
> > * DMA map early, for performance (empties dcache
> ASAP) and
> > - * better fault reporting. This is a DMA-only driver.
> > - *
> > - * NOTE that if dma_unmap_single() ever starts to do
> work on
> > - * platforms supported by this driver, we would need to
> clean
> > - * up mappings for previously-mapped transfers.
> > + * better fault reporting.
> > */
> > - if (!msg->is_dma_mapped) {
> > + if ((!msg->is_dma_mapped) && (atmel_spi_use_dma(as,
> xfer)
> > + || as->use_pdc)) {
> > if (atmel_spi_dma_map_xfer(as, xfer) < 0)
> > return -ENOMEM;
> > }
> > @@ -1068,6 +1533,8 @@ static int atmel_spi_probe(struct platform_device
> *pdev)
> >
> > spin_lock_init(&as->lock);
> > INIT_LIST_HEAD(&as->queue);
> > + tasklet_init(&as->tasklet, atmel_spi_tasklet_func,
> > + (unsigned long)master);
> > as->pdev = pdev;
> > as->regs = ioremap(regs->start, resource_size(regs));
> > if (!as->regs)
> > @@ -1096,7 +1563,15 @@ static int atmel_spi_probe(struct
> platform_device *pdev)
> > else
> > spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
> >
> > - spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> > + as->use_dma = false;
> > + as->use_pdc = false;
> > +
> > + if (as->pdata->has_dma_support) {
> > + if (atmel_spi_configure_dma(as) == 0)
> > + as->use_dma = true;
> > + } else
> > + as->use_pdc = true;
> same.
>
> Maybe you should add a little dev_info in case both use_dma and
> use_pcd are null:
> if (!as->use_dma && !as->use_pdc)
> dev_info(&pdev->dev, "Atmel SPI Controller: Using PIO only for transferts");
>
> I tested it on sam9g35.
> It's working *almost* all right.
> I've got a problem with the ioctl SPI_IOC_MESSAGE().
> (cf Documentation/spi/spidev_fdx.c)
> I'm reading on spidev something like that :
> struct spi_ioc_transfer xfer[3];
> memset(xfer, 0, sizeof(xfer));
> xfer[0].tx_buf = (unsigned long)&tx_header;
> xer[0].rx_buf = (unsigned long)&rx_header;
> xfer[0].len = 2;
> xfer[1].rx_buf = (unsigned long)rx_buf;
> xfer[1].len = 124;
> xfer[2].tx_buf = (unsigned long)&tx_footer;
> xfer[2].rx_buf = (unsigned long)&rx_footer;
> xfer[2].len = 2;
>
> nb = ioctl(spi_data->fd, SPI_IOC_MESSAGE(3), xfer);
>
> If I force DMA all the time with
> #define DMA_MIN_BYTES 1
> I haven't got any problem, all works ok.
> If I for PIO all the time with
> #define DMA_MIN_BYTES 1000
> I'ts woking also without any problem.
>
> BUT
> When the DMA_MIN_BYTES are at 16 (so, xfer[0] is transfered by PIO,
> xfer[1] by DMA and xfer[2] by PIO), I've got a lot of errors in my
> rx_buffer.
> ie, I'm not receiving what I should.
>
> Did you experience anything like that ?
No, I didn't try it. I will do next week.
>
> Regards,
> Richard
Best Regards,
Wenyou Yang
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
` (12 preceding siblings ...)
2013-01-18 8:46 ` [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Richard Genoud
@ 2013-02-05 14:14 ` Grant Likely
2013-02-05 20:06 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 8:33 ` Yang, Wenyou
13 siblings, 2 replies; 29+ messages in thread
From: Grant Likely @ 2013-02-05 14:14 UTC (permalink / raw)
To: Wenyou Yang, linux-arm-kernel
Cc: richard.genoud, JM.Lin, nicolas.ferre, linux-kernel, wenyou.yang,
plagnioj
On Mon, 14 Jan 2013 15:34:25 +0800, Wenyou Yang <wenyou.yang@atmel.com> wrote:
> Hi All,
>
> This set of patches is to add dmaengine and device tree support for atmel spi.
> The work is based on Nicolas and Richard's work.
> It is tested on at91sam9x5ek, at91sam9m10g45ek, at91sam9263ek and at91sam9g20ek.
>
> It is based on v3.8-rc3.
Hi Wenyou,
The patches look fine on a quick look, but I cannot apply them without a
Signed-off-by line from you since you are the person posting the
patches. Please read section 12 of Documentation/SubmittingPatches
(about line #288) and then reply confirming what your signed-off-by line
should be.
>
> Changelog:
> v4:
> 1./ Take Joe Perches's advance, rewrite atmel_spi_is_v2(struct atmel_spi *as)
> and atmel_spi_use_dma(struct atmel_spi *as),
> and remove atmel_spi_use_pdc(struct atmel_spi *as).
>
> 2./ Rebase on v3.8-rc3.
>
> V3:
> 1./ Rebase on v3.8-rc2.
>
> 2./ Remove some Jean-Christophe's patches which has been
> applied on v3.8-rc2.
>
> 3./ Remove spi property "cs-gpios" from the SoC dtsi files
> to the board dts files to avoid some useless pin conflicts.
>
> v2:
> 1./ Remove the patch :PATCH]mtd: m25p80: change the m25p80_read to reading page to page
> which purpose to fix the BUG: when run "flashcp /bin/busybox /dev/mtdX" in
> the at91sam9g25ek with DMA mode, it arises a OOPS.
> Now fix it in this patch:
> [PATHC] spi/atmel_spi: add dmaengine support changing to fix the [BUG].
>
> 2./ Remove two patches:
> which purpose to read dts property to select SPI IP version and DMA mode
> Now they will be gat from device tree different compatile.
>
> 3./ Fix DMA: when enable both spi0 AND spi1, the spi0 doesn't work BUG.
>
> 4./ Rebase v3.7-rc8.
>
> Best Regards,
> Wenyou Yang.
>
> Nicolas Ferre (5):
> spi/atmel_spi: add physical base address
> spi/atmel_spi: call unmapping on transfers buffers
> spi/atmel_spi: status information passed through controller data
> spi/atmel_spi: add flag to controller data for lock operations
> spi/atmel_spi: add dmaengine support
>
> Richard Genoud (6):
> spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes
> spi/atmel_spi: correct 16 bits transfers using PIO
> spi/atmel_spi: correct 16 bits transfer with DMA
> ARM: at91: add clocks for spi dt entries
> ARM: dts: add spi nodes for atmel SoC
> ARM: dts: add spi nodes for the atmel boards
>
> Wenyou Yang (1):
> spi/atmel_spi: update the dt support
>
> arch/arm/boot/dts/at91sam9260.dtsi | 18 +
> arch/arm/boot/dts/at91sam9263.dtsi | 18 +
> arch/arm/boot/dts/at91sam9263ek.dts | 14 +
> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 +
> arch/arm/boot/dts/at91sam9g45.dtsi | 18 +
> arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 +
> arch/arm/boot/dts/at91sam9n12.dtsi | 18 +
> arch/arm/boot/dts/at91sam9n12ek.dts | 14 +
> arch/arm/boot/dts/at91sam9x5.dtsi | 18 +
> arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 +
> arch/arm/mach-at91/at91sam9260.c | 2 +
> arch/arm/mach-at91/at91sam9g45.c | 2 +
> arch/arm/mach-at91/at91sam9n12.c | 2 +
> arch/arm/mach-at91/at91sam9x5.c | 2 +
> drivers/spi/spi-atmel.c | 809 ++++++++++++++++++++++++---
> 15 files changed, 908 insertions(+), 69 deletions(-)
>
> --
> 1.7.9.5
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
2013-01-14 7:34 ` [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards Wenyou Yang
@ 2013-02-05 19:50 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 1:34 ` Yang, Wenyou
2013-02-08 1:51 ` Yang, Wenyou
0 siblings, 2 replies; 29+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-02-05 19:50 UTC (permalink / raw)
To: Wenyou Yang
Cc: linux-arm-kernel, linux-kernel, nicolas.ferre, richard.genoud,
JM.Lin, linux
On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> From: Richard Genoud <richard.genoud@gmail.com>
>
> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> [wenyou.yang@atmel.com: added spi nodes for the sam9263ek, sam9g20ek, sam9m10g45ek and sam9n12ek boards]
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> Cc: linux@arm.linux.org.uk
> ---
> arch/arm/boot/dts/at91sam9263ek.dts | 14 ++++++++++++++
> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 ++++++++++++++
> arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 ++++++++++++++
> arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++++++++++++++
> arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 ++++++++++++++
> 5 files changed, 70 insertions(+)
>
> diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
> index 1eb0872..63ba57b 100644
> --- a/arch/arm/boot/dts/at91sam9263ek.dts
> +++ b/arch/arm/boot/dts/at91sam9263ek.dts
> @@ -79,6 +79,20 @@
> };
> };
> };
> +
> + spi0: spi@fffa4000 {
> + status = "okay";
> + cs-gpios = <&pioA 5 0
> + &pioA 3 0
> + &pioA 4 0
> + &pioB 11 0
NACK
we no use that much as cs-gpios on this hw
> + >;
> + mtd_dataflash@0 {
> + compatible = "atmel,at45", "atmel,dataflash";
> + spi-max-frequency = <50000000>;
> + reg = <0>;
> + };
> + };
> };
>
> nand0: nand@40000000 {
> diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> index da15e83..49ad49e 100644
> --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> @@ -96,6 +96,20 @@
> status = "okay";
> pinctrl-0 = <&pinctrl_ssc0_tx>;
> };
> +
> + spi0: spi@fffc8000 {
> + status = "okay";
> + cs-gpios = <&pioA 3 0
> + &pioC 11 0
> + &pioC 16 0
> + &pioC 17 0
ditto and so on
you must only provife the gpio use by the hw
> + >;
> + mtd_dataflash@0 {
> + compatible = "atmel,at45", "atmel,dataflash";
> + spi-max-frequency = <50000000>;
> + reg = <1>;
> + };
> + };
> };
>
> nand0: nand@40000000 {
> diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> index 20c3191..275f22d 100644
> --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
> +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> @@ -102,6 +102,20 @@
> };
> };
> };
> +
> + spi0: spi@fffa4000{
> + status = "okay";
> + cs-gpios = <&pioB 3 0
> + &pioB 18 0
> + &pioB 19 0
> + &pioD 27 0
> + >;
> + mtd_dataflash@0 {
> + compatible = "atmel,at45", "atmel,dataflash";
> + spi-max-frequency = <13000000>;
> + reg = <0>;
> + };
> + };
> };
>
> nand0: nand@40000000 {
> diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
> index 0376bf4..4eeca7b 100644
> --- a/arch/arm/boot/dts/at91sam9n12ek.dts
> +++ b/arch/arm/boot/dts/at91sam9n12ek.dts
> @@ -67,6 +67,20 @@
> };
> };
> };
> +
> + spi0: spi@f0000000 {
> + status = "okay";
> + cs-gpios = <&pioA 14 0
> + &pioA 7 0
> + &pioA 1 0
> + &pioB 3 0
> + >;
> + m25p80@0 {
> + compatible = "atmel,at25df321a";
> + spi-max-frequency = <50000000>;
> + reg = <0>;
> + };
> + };
> };
>
> nand0: nand@40000000 {
> diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> index 8a7cf1d..ca0a056 100644
> --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
> +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> @@ -84,6 +84,20 @@
> };
> };
> };
> +
> + spi0: spi@f0000000 {
> + status = "okay";
> + cs-gpios = <&pioA 14 0
> + &pioA 7 0
> + &pioA 1 0
> + &pioB 3 0
> + >;
> + m25p80@0 {
> + compatible = "atmel,at25df321a";
> + spi-max-frequency = <50000000>;
> + reg = <0>;
> + };
> + };
> };
>
> usb0: ohci@00600000 {
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC
2013-01-14 7:34 ` [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC Wenyou Yang
@ 2013-02-05 19:51 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 1:35 ` Yang, Wenyou
0 siblings, 1 reply; 29+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-02-05 19:51 UTC (permalink / raw)
To: Wenyou Yang
Cc: linux-arm-kernel, linux-kernel, nicolas.ferre, richard.genoud,
JM.Lin, linux
On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> From: Richard Genoud <richard.genoud@gmail.com>
>
> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> [wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45 and sam9n12]
> [wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts files]
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> Cc: linux@arm.linux.org.uk
> ---
> arch/arm/boot/dts/at91sam9260.dtsi | 18 ++++++++++++++++++
> arch/arm/boot/dts/at91sam9263.dtsi | 18 ++++++++++++++++++
> arch/arm/boot/dts/at91sam9g45.dtsi | 18 ++++++++++++++++++
I alreadt have some patch in queue
Best Regards,
J.
> arch/arm/boot/dts/at91sam9n12.dtsi | 18 ++++++++++++++++++
> arch/arm/boot/dts/at91sam9x5.dtsi | 18 ++++++++++++++++++
> 5 files changed, 90 insertions(+)
>
> diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> index 68bccf4..9586fe1 100644
> --- a/arch/arm/boot/dts/at91sam9260.dtsi
> +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> @@ -453,6 +453,24 @@
> status = "disabled";
> };
>
> + spi0: spi@fffc8000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9260-spi";
> + reg = <0xfffc8000 0x200>;
> + interrupts = <12 4 3>;
> + status = "disabled";
> + };
> +
> + spi1: spi@fffcc000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9260-spi";
> + reg = <0xfffcc000 0x200>;
> + interrupts = <13 4 3>;
> + status = "disabled";
> + };
> +
> adc0: adc@fffe0000 {
> compatible = "atmel,at91sam9260-adc";
> reg = <0xfffe0000 0x100>;
> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
> index 32ec62c..636b882 100644
> --- a/arch/arm/boot/dts/at91sam9263.dtsi
> +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> @@ -426,6 +426,24 @@
> reg = <0xfffffd40 0x10>;
> status = "disabled";
> };
> +
> + spi0: spi@fffa4000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9260-spi";
> + reg = <0xfffa4000 0x200>;
> + interrupts = <14 4 3>;
> + status = "disabled";
> + };
> +
> + spi1: spi@fffa8000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9260-spi";
> + reg = <0xfffa8000 0x200>;
> + interrupts = <15 4 3>;
> + status = "disabled";
> + };
> };
>
> nand0: nand@40000000 {
> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
> index 231858f..0100b80 100644
> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> @@ -495,6 +495,24 @@
> reg = <0xfffffd40 0x10>;
> status = "disabled";
> };
> +
> + spi0: spi@fffa4000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9g45-spi";
> + reg = <0xfffa4000 0x200>;
> + interrupts = <14 4 3>;
> + status = "disabled";
> + };
> +
> + spi1: spi@fffa8000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9g45-spi";
> + reg = <0xfffa8000 0x200>;
> + interrupts = <15 4 3>;
> + status = "disabled";
> + };
> };
>
> nand0: nand@40000000 {
> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
> index e9efb34..86d5357 100644
> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> @@ -355,6 +355,24 @@
> #size-cells = <0>;
> status = "disabled";
> };
> +
> + spi0: spi@f0000000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9x5-spi";
> + reg = <0xf0000000 0x100>;
> + interrupts = <13 4 3>;
> + status = "disabled";
> + };
> +
> + spi1: spi@f0004000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9x5-spi";
> + reg = <0xf0004000 0x100>;
> + interrupts = <14 4 3>;
> + status = "disabled";
> + };
> };
>
> nand0: nand@40000000 {
> diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
> index 40ac3a4..8ea2f7d 100644
> --- a/arch/arm/boot/dts/at91sam9x5.dtsi
> +++ b/arch/arm/boot/dts/at91sam9x5.dtsi
> @@ -473,6 +473,24 @@
> trigger-value = <0x6>;
> };
> };
> +
> + spi0: spi@f0000000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9x5-spi";
> + reg = <0xf0000000 0x100>;
> + interrupts = <13 4 3>;
> + status = "disabled";
> + };
> +
> + spi1: spi@f0004000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91sam9x5-spi";
> + reg = <0xf0004000 0x100>;
> + interrupts = <14 4 3>;
> + status = "disabled";
> + };
> };
>
> nand0: nand@40000000 {
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 05/12] spi/atmel_spi: update the dt support
2013-01-14 7:34 ` [v4 PATCH 05/12] spi/atmel_spi: update the dt support Wenyou Yang
@ 2013-02-05 20:04 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 1:19 ` Yang, Wenyou
0 siblings, 1 reply; 29+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-02-05 20:04 UTC (permalink / raw)
To: Wenyou Yang
Cc: linux-arm-kernel, linux-kernel, nicolas.ferre, richard.genoud, JM.Lin
On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> To meet the different spi IP version of atmel SoC,
> add the more compatible with different config and devtype.
>
> The "has_dma_support" is used to select the dma engine transfer mode.
>
> The "has_wdrbt" indicate if there is the "WDRBT" bit in the Mode Register,
> WDRBT (Wait Data Read Before Transfer),if WDRBT is set,
> a transfer can start only if the Receive Data Register is empty,i.e. does not
> contain any unread data, to prevent overrun error in reception
>
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> ---
> drivers/spi/spi-atmel.c | 134 ++++++++++++++++++++++++++++++++++++++++-------
> 1 file changed, 115 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
> index 8f6f0a0..43c1f63 100644
> --- a/drivers/spi/spi-atmel.c
> +++ b/drivers/spi/spi-atmel.c
> @@ -71,6 +71,8 @@
> #define SPI_FDIV_SIZE 1
> #define SPI_MODFDIS_OFFSET 4
> #define SPI_MODFDIS_SIZE 1
> +#define SPI_WDRBT_OFFSET 5
> +#define SPI_WDRBT_SIZE 1
> #define SPI_LLB_OFFSET 7
> #define SPI_LLB_SIZE 1
> #define SPI_PCS_OFFSET 16
> @@ -186,6 +188,12 @@
> * DMA transfers; transfer queue progress is driven by IRQs. The clock
> * framework provides the base clock, subdivided for each spi_device.
> */
> +struct atmel_spi_pdata {
> + u8 version;
> + bool has_dma_support;
> + bool has_wdrbt;
> +};
> +
> struct atmel_spi {
> spinlock_t lock;
> unsigned long flags;
> @@ -204,6 +212,7 @@ struct atmel_spi {
> struct spi_transfer *next_transfer;
> unsigned long next_remaining_bytes;
> int done_status;
> + struct atmel_spi_pdata *pdata;
>
> void *buffer;
> dma_addr_t buffer_dma;
> @@ -218,6 +227,69 @@ struct atmel_spi_device {
> #define BUFFER_SIZE PAGE_SIZE
> #define INVALID_DMA_ADDRESS 0xffffffff
>
> +static struct atmel_spi_pdata at91rm9200_config = {
> + .version = 1,
> + .has_dma_support = false,
> + .has_wdrbt = false,
> +};
> +
> +static struct atmel_spi_pdata at91sam9260_config = {
> + .version = 2,
> + .has_dma_support = false,
> + .has_wdrbt = false,
> +};
> +
> +static struct atmel_spi_pdata at91sam9g45_config = {
> + .version = 2,
> + .has_dma_support = false,
> + .has_wdrbt = true,
> +};
> +
> +static struct atmel_spi_pdata at91sam9x5_config = {
> + .version = 2,
> + .has_dma_support = true,
> + .has_wdrbt = true,
> +};
> +
> +static const struct platform_device_id atmel_spi_devtypes[] = {
> + {
> + .name = "spi-at91rm9200",
> + .driver_data = (unsigned long) &at91rm9200_config,
> + }, {
> + .name = "spi-at91sam9260",
> + .driver_data = (unsigned long) &at91sam9260_config,
> + }, {
> + .name = "spi-at91sam9g45",
> + .driver_data = (unsigned long) &at91sam9g45_config,
> + }, {
> + .name = "spi-at91sam9x5",
> + .driver_data = (unsigned long) &at91sam9x5_config,
> + }, {
> + /* sentinel */
> + }
> +};
> +
> +#if defined(CONFIG_OF)
> +static const struct of_device_id atmel_spi_dt_ids[] = {
> + {
> + .compatible = "atmel,at91rm9200-spi",
> + .data = &at91rm9200_config,
> + } , {
> + .compatible = "atmel,at91sam9260-spi",
> + .data = &at91sam9260_config,
> + } , {
> + .compatible = "atmel,at91sam9g45-spi",
> + .data = &at91sam9g45_config,
> + } , {
> + .compatible = "atmel,at91sam9x5-spi",
> + .data = &at91sam9x5_config,
> + }, {
> + /* sentinel */
use the IP revision register to detect it
IIRC 0xfc
Best Regards,
J.
> + }
> +};
> +MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids);
> +#endif
> +
> /*
> * Version 2 of the SPI controller has
> * - CR.LASTXFER
> @@ -230,11 +302,12 @@ struct atmel_spi_device {
> * register, but I haven't checked that it exists on all chips, and
> * this is cheaper anyway.
> */
> -static bool atmel_spi_is_v2(void)
> +static bool atmel_spi_is_v2(struct atmel_spi *as)
> {
> - return !cpu_is_at91rm9200();
> + return as->pdata->version == 2;
> }
>
> +
> /*
> * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
> * they assume that spi slave device state will not change on deselect, so
> @@ -266,15 +339,21 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
> unsigned active = spi->mode & SPI_CS_HIGH;
> u32 mr;
>
> - if (atmel_spi_is_v2()) {
> + if (atmel_spi_is_v2(as)) {
> /*
> * Always use CSR0. This ensures that the clock
> * switches to the correct idle polarity before we
> * toggle the CS.
> */
> spi_writel(as, CSR0, asd->csr);
> - spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS)
> - | SPI_BIT(MSTR));
> +
> + if (as->pdata->has_wdrbt)
> + spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MSTR)
> + | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
> + else
> + spi_writel(as, MR, SPI_BF(PCS, 0x0e)
> + | SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
> +
> mr = spi_readl(as, MR);
> gpio_set_value(asd->npcs_pin, active);
> } else {
> @@ -321,7 +400,7 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
> asd->npcs_pin, active ? " (low)" : "",
> mr);
>
> - if (atmel_spi_is_v2() || spi->chip_select != 0)
> + if (atmel_spi_is_v2(as) || spi->chip_select != 0)
> gpio_set_value(asd->npcs_pin, !active);
> }
>
> @@ -734,7 +813,7 @@ static int atmel_spi_setup(struct spi_device *spi)
> }
>
> /* see notes above re chipselect */
> - if (!atmel_spi_is_v2()
> + if (!atmel_spi_is_v2(as)
> && spi->chip_select == 0
> && (spi->mode & SPI_CS_HIGH)) {
> dev_dbg(&spi->dev, "setup: can't be active-high\n");
> @@ -743,7 +822,7 @@ static int atmel_spi_setup(struct spi_device *spi)
>
> /* v1 chips start out at half the peripheral bus speed. */
> bus_hz = clk_get_rate(as->clk);
> - if (!atmel_spi_is_v2())
> + if (!atmel_spi_is_v2(as))
> bus_hz /= 2;
>
> if (spi->max_speed_hz) {
> @@ -817,7 +896,7 @@ static int atmel_spi_setup(struct spi_device *spi)
> "setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
> bus_hz / scbr, bits, spi->mode, spi->chip_select, csr);
>
> - if (!atmel_spi_is_v2())
> + if (!atmel_spi_is_v2(as))
> spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
>
> return 0;
> @@ -921,6 +1000,21 @@ static void atmel_spi_cleanup(struct spi_device *spi)
> kfree(asd);
> }
>
> +static struct atmel_spi_pdata * __devinit atmel_spi_get_driver_data(
> + struct platform_device *pdev)
> +{
> + if (pdev->dev.of_node) {
> + const struct of_device_id *match;
> + match = of_match_node(atmel_spi_dt_ids, pdev->dev.of_node);
> + if (!match)
> + return NULL;
> + return (struct atmel_spi_pdata *) match->data;
> + }
> +
> + return (struct atmel_spi_pdata *)
> + platform_get_device_id(pdev)->driver_data;
> +}
> +
> /*-------------------------------------------------------------------------*/
>
> static int atmel_spi_probe(struct platform_device *pdev)
> @@ -987,11 +1081,21 @@ static int atmel_spi_probe(struct platform_device *pdev)
> if (ret)
> goto out_unmap_regs;
>
> + as->pdata = atmel_spi_get_driver_data(pdev);
> + if (!as->pdata)
> + goto out_unmap_regs;
> +
> /* Initialize the hardware */
> clk_enable(clk);
> spi_writel(as, CR, SPI_BIT(SWRST));
> spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
> - spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
> +
> + if (as->pdata->has_wdrbt)
> + spi_writel(as, MR,
> + SPI_BIT(MSTR) | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
> + else
> + spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
> +
> spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> spi_writel(as, CR, SPI_BIT(SPIEN));
>
> @@ -1084,21 +1188,13 @@ static int atmel_spi_resume(struct platform_device *pdev)
> #define atmel_spi_resume NULL
> #endif
>
> -#if defined(CONFIG_OF)
> -static const struct of_device_id atmel_spi_dt_ids[] = {
> - { .compatible = "atmel,at91rm9200-spi" },
> - { /* sentinel */ }
> -};
> -
> -MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids);
> -#endif
> -
> static struct platform_driver atmel_spi_driver = {
> .driver = {
> .name = "atmel_spi",
> .owner = THIS_MODULE,
> .of_match_table = of_match_ptr(atmel_spi_dt_ids),
> },
> + .id_table = atmel_spi_devtypes,
> .suspend = atmel_spi_suspend,
> .resume = atmel_spi_resume,
> .probe = atmel_spi_probe,
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support
2013-02-05 14:14 ` Grant Likely
@ 2013-02-05 20:06 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 8:33 ` Yang, Wenyou
1 sibling, 0 replies; 29+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-02-05 20:06 UTC (permalink / raw)
To: Grant Likely
Cc: Wenyou Yang, linux-arm-kernel, richard.genoud, JM.Lin,
nicolas.ferre, linux-kernel
On 14:14 Tue 05 Feb , Grant Likely wrote:
> On Mon, 14 Jan 2013 15:34:25 +0800, Wenyou Yang <wenyou.yang@atmel.com> wrote:
> > Hi All,
> >
> > This set of patches is to add dmaengine and device tree support for atmel spi.
> > The work is based on Nicolas and Richard's work.
> > It is tested on at91sam9x5ek, at91sam9m10g45ek, at91sam9263ek and at91sam9g20ek.
> >
> > It is based on v3.8-rc3.
>
> Hi Wenyou,
>
> The patches look fine on a quick look, but I cannot apply them without a
> Signed-off-by line from you since you are the person posting the
> patches. Please read section 12 of Documentation/SubmittingPatches
> (about line #288) and then reply confirming what your signed-off-by line
> should be.
grant if it's ok with you I prefer this go via arm-soc
Best Regards,
J.
>
> >
> > Changelog:
> > v4:
> > 1./ Take Joe Perches's advance, rewrite atmel_spi_is_v2(struct atmel_spi *as)
> > and atmel_spi_use_dma(struct atmel_spi *as),
> > and remove atmel_spi_use_pdc(struct atmel_spi *as).
> >
> > 2./ Rebase on v3.8-rc3.
> >
> > V3:
> > 1./ Rebase on v3.8-rc2.
> >
> > 2./ Remove some Jean-Christophe's patches which has been
> > applied on v3.8-rc2.
> >
> > 3./ Remove spi property "cs-gpios" from the SoC dtsi files
> > to the board dts files to avoid some useless pin conflicts.
> >
> > v2:
> > 1./ Remove the patch :PATCH]mtd: m25p80: change the m25p80_read to reading page to page
> > which purpose to fix the BUG: when run "flashcp /bin/busybox /dev/mtdX" in
> > the at91sam9g25ek with DMA mode, it arises a OOPS.
> > Now fix it in this patch:
> > [PATHC] spi/atmel_spi: add dmaengine support changing to fix the [BUG].
> >
> > 2./ Remove two patches:
> > which purpose to read dts property to select SPI IP version and DMA mode
> > Now they will be gat from device tree different compatile.
> >
> > 3./ Fix DMA: when enable both spi0 AND spi1, the spi0 doesn't work BUG.
> >
> > 4./ Rebase v3.7-rc8.
> >
> > Best Regards,
> > Wenyou Yang.
> >
> > Nicolas Ferre (5):
> > spi/atmel_spi: add physical base address
> > spi/atmel_spi: call unmapping on transfers buffers
> > spi/atmel_spi: status information passed through controller data
> > spi/atmel_spi: add flag to controller data for lock operations
> > spi/atmel_spi: add dmaengine support
> >
> > Richard Genoud (6):
> > spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes
> > spi/atmel_spi: correct 16 bits transfers using PIO
> > spi/atmel_spi: correct 16 bits transfer with DMA
> > ARM: at91: add clocks for spi dt entries
> > ARM: dts: add spi nodes for atmel SoC
> > ARM: dts: add spi nodes for the atmel boards
> >
> > Wenyou Yang (1):
> > spi/atmel_spi: update the dt support
> >
> > arch/arm/boot/dts/at91sam9260.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9263.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9263ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 +
> > arch/arm/boot/dts/at91sam9g45.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9n12.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9n12ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9x5.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 +
> > arch/arm/mach-at91/at91sam9260.c | 2 +
> > arch/arm/mach-at91/at91sam9g45.c | 2 +
> > arch/arm/mach-at91/at91sam9n12.c | 2 +
> > arch/arm/mach-at91/at91sam9x5.c | 2 +
> > drivers/spi/spi-atmel.c | 809 ++++++++++++++++++++++++---
> > 15 files changed, 908 insertions(+), 69 deletions(-)
> >
> > --
> > 1.7.9.5
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> Grant Likely, B.Sc, P.Eng.
> Secret Lab Technologies, Ltd.
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [v4 PATCH 05/12] spi/atmel_spi: update the dt support
2013-02-05 20:04 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2013-02-06 1:19 ` Yang, Wenyou
0 siblings, 0 replies; 29+ messages in thread
From: Yang, Wenyou @ 2013-02-06 1:19 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: linux-arm-kernel, linux-kernel, Ferre, Nicolas, richard.genoud, Lin, JM
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="gb2312", Size: 9406 bytes --]
> -----Original Message-----
> From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com]
> Sent: 2013Äê2ÔÂ6ÈÕ 4:05
> To: Yang, Wenyou
> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
> Nicolas; richard.genoud@gmail.com; Lin, JM
> Subject: Re: [v4 PATCH 05/12] spi/atmel_spi: update the dt support
>
> On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> > To meet the different spi IP version of atmel SoC,
> > add the more compatible with different config and devtype.
> >
> > The "has_dma_support" is used to select the dma engine transfer mode.
> >
> > The "has_wdrbt" indicate if there is the "WDRBT" bit in the Mode Register,
> > WDRBT (Wait Data Read Before Transfer),if WDRBT is set,
> > a transfer can start only if the Receive Data Register is empty,i.e. does not
> > contain any unread data, to prevent overrun error in reception
> >
> > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > ---
> > drivers/spi/spi-atmel.c | 134
> ++++++++++++++++++++++++++++++++++++++++-------
> > 1 file changed, 115 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
> > index 8f6f0a0..43c1f63 100644
> > --- a/drivers/spi/spi-atmel.c
> > +++ b/drivers/spi/spi-atmel.c
> > @@ -71,6 +71,8 @@
> > #define SPI_FDIV_SIZE 1
> > #define SPI_MODFDIS_OFFSET 4
> > #define SPI_MODFDIS_SIZE 1
> > +#define SPI_WDRBT_OFFSET 5
> > +#define SPI_WDRBT_SIZE 1
> > #define SPI_LLB_OFFSET 7
> > #define SPI_LLB_SIZE 1
> > #define SPI_PCS_OFFSET 16
> > @@ -186,6 +188,12 @@
> > * DMA transfers; transfer queue progress is driven by IRQs. The clock
> > * framework provides the base clock, subdivided for each spi_device.
> > */
> > +struct atmel_spi_pdata {
> > + u8 version;
> > + bool has_dma_support;
> > + bool has_wdrbt;
> > +};
> > +
> > struct atmel_spi {
> > spinlock_t lock;
> > unsigned long flags;
> > @@ -204,6 +212,7 @@ struct atmel_spi {
> > struct spi_transfer *next_transfer;
> > unsigned long next_remaining_bytes;
> > int done_status;
> > + struct atmel_spi_pdata *pdata;
> >
> > void *buffer;
> > dma_addr_t buffer_dma;
> > @@ -218,6 +227,69 @@ struct atmel_spi_device {
> > #define BUFFER_SIZE PAGE_SIZE
> > #define INVALID_DMA_ADDRESS 0xffffffff
> >
> > +static struct atmel_spi_pdata at91rm9200_config = {
> > + .version = 1,
> > + .has_dma_support = false,
> > + .has_wdrbt = false,
> > +};
> > +
> > +static struct atmel_spi_pdata at91sam9260_config = {
> > + .version = 2,
> > + .has_dma_support = false,
> > + .has_wdrbt = false,
> > +};
> > +
> > +static struct atmel_spi_pdata at91sam9g45_config = {
> > + .version = 2,
> > + .has_dma_support = false,
> > + .has_wdrbt = true,
> > +};
> > +
> > +static struct atmel_spi_pdata at91sam9x5_config = {
> > + .version = 2,
> > + .has_dma_support = true,
> > + .has_wdrbt = true,
> > +};
> > +
> > +static const struct platform_device_id atmel_spi_devtypes[] = {
> > + {
> > + .name = "spi-at91rm9200",
> > + .driver_data = (unsigned long) &at91rm9200_config,
> > + }, {
> > + .name = "spi-at91sam9260",
> > + .driver_data = (unsigned long) &at91sam9260_config,
> > + }, {
> > + .name = "spi-at91sam9g45",
> > + .driver_data = (unsigned long) &at91sam9g45_config,
> > + }, {
> > + .name = "spi-at91sam9x5",
> > + .driver_data = (unsigned long) &at91sam9x5_config,
> > + }, {
> > + /* sentinel */
> > + }
> > +};
> > +
> > +#if defined(CONFIG_OF)
> > +static const struct of_device_id atmel_spi_dt_ids[] = {
> > + {
> > + .compatible = "atmel,at91rm9200-spi",
> > + .data = &at91rm9200_config,
> > + } , {
> > + .compatible = "atmel,at91sam9260-spi",
> > + .data = &at91sam9260_config,
> > + } , {
> > + .compatible = "atmel,at91sam9g45-spi",
> > + .data = &at91sam9g45_config,
> > + } , {
> > + .compatible = "atmel,at91sam9x5-spi",
> > + .data = &at91sam9x5_config,
> > + }, {
> > + /* sentinel */
> use the IP revision register to detect it
>
> IIRC 0xfc
>
Thanks for your feedback.
As the original comments, I need to check if this register exists on all chips.
> Best Regards,
> J.
> > + }
> > +};
> > +MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids);
> > +#endif
> > +
> > /*
> > * Version 2 of the SPI controller has
> > * - CR.LASTXFER
> > @@ -230,11 +302,12 @@ struct atmel_spi_device {
> > * register, but I haven't checked that it exists on all chips, and
> > * this is cheaper anyway.
> > */
> > -static bool atmel_spi_is_v2(void)
> > +static bool atmel_spi_is_v2(struct atmel_spi *as)
> > {
> > - return !cpu_is_at91rm9200();
> > + return as->pdata->version == 2;
> > }
> >
> > +
> > /*
> > * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
> > * they assume that spi slave device state will not change on deselect, so
> > @@ -266,15 +339,21 @@ static void cs_activate(struct atmel_spi *as,
> struct spi_device *spi)
> > unsigned active = spi->mode & SPI_CS_HIGH;
> > u32 mr;
> >
> > - if (atmel_spi_is_v2()) {
> > + if (atmel_spi_is_v2(as)) {
> > /*
> > * Always use CSR0. This ensures that the clock
> > * switches to the correct idle polarity before we
> > * toggle the CS.
> > */
> > spi_writel(as, CSR0, asd->csr);
> > - spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS)
> > - | SPI_BIT(MSTR));
> > +
> > + if (as->pdata->has_wdrbt)
> > + spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MSTR)
> > + | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
> > + else
> > + spi_writel(as, MR, SPI_BF(PCS, 0x0e)
> > + | SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
> > +
> > mr = spi_readl(as, MR);
> > gpio_set_value(asd->npcs_pin, active);
> > } else {
> > @@ -321,7 +400,7 @@ static void cs_deactivate(struct atmel_spi *as,
> struct spi_device *spi)
> > asd->npcs_pin, active ? " (low)" : "",
> > mr);
> >
> > - if (atmel_spi_is_v2() || spi->chip_select != 0)
> > + if (atmel_spi_is_v2(as) || spi->chip_select != 0)
> > gpio_set_value(asd->npcs_pin, !active);
> > }
> >
> > @@ -734,7 +813,7 @@ static int atmel_spi_setup(struct spi_device *spi)
> > }
> >
> > /* see notes above re chipselect */
> > - if (!atmel_spi_is_v2()
> > + if (!atmel_spi_is_v2(as)
> > && spi->chip_select == 0
> > && (spi->mode & SPI_CS_HIGH)) {
> > dev_dbg(&spi->dev, "setup: can't be active-high\n");
> > @@ -743,7 +822,7 @@ static int atmel_spi_setup(struct spi_device *spi)
> >
> > /* v1 chips start out at half the peripheral bus speed. */
> > bus_hz = clk_get_rate(as->clk);
> > - if (!atmel_spi_is_v2())
> > + if (!atmel_spi_is_v2(as))
> > bus_hz /= 2;
> >
> > if (spi->max_speed_hz) {
> > @@ -817,7 +896,7 @@ static int atmel_spi_setup(struct spi_device *spi)
> > "setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
> > bus_hz / scbr, bits, spi->mode, spi->chip_select, csr);
> >
> > - if (!atmel_spi_is_v2())
> > + if (!atmel_spi_is_v2(as))
> > spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
> >
> > return 0;
> > @@ -921,6 +1000,21 @@ static void atmel_spi_cleanup(struct spi_device
> *spi)
> > kfree(asd);
> > }
> >
> > +static struct atmel_spi_pdata * __devinit atmel_spi_get_driver_data(
> > + struct platform_device *pdev)
> > +{
> > + if (pdev->dev.of_node) {
> > + const struct of_device_id *match;
> > + match = of_match_node(atmel_spi_dt_ids, pdev->dev.of_node);
> > + if (!match)
> > + return NULL;
> > + return (struct atmel_spi_pdata *) match->data;
> > + }
> > +
> > + return (struct atmel_spi_pdata *)
> > + platform_get_device_id(pdev)->driver_data;
> > +}
> > +
> > /*-------------------------------------------------------------------------*/
> >
> > static int atmel_spi_probe(struct platform_device *pdev)
> > @@ -987,11 +1081,21 @@ static int atmel_spi_probe(struct
> platform_device *pdev)
> > if (ret)
> > goto out_unmap_regs;
> >
> > + as->pdata = atmel_spi_get_driver_data(pdev);
> > + if (!as->pdata)
> > + goto out_unmap_regs;
> > +
> > /* Initialize the hardware */
> > clk_enable(clk);
> > spi_writel(as, CR, SPI_BIT(SWRST));
> > spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround
> */
> > - spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
> > +
> > + if (as->pdata->has_wdrbt)
> > + spi_writel(as, MR,
> > + SPI_BIT(MSTR) | SPI_BIT(MODFDIS) | SPI_BIT(WDRBT));
> > + else
> > + spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
> > +
> > spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
> > spi_writel(as, CR, SPI_BIT(SPIEN));
> >
> > @@ -1084,21 +1188,13 @@ static int atmel_spi_resume(struct
> platform_device *pdev)
> > #define atmel_spi_resume NULL
> > #endif
> >
> > -#if defined(CONFIG_OF)
> > -static const struct of_device_id atmel_spi_dt_ids[] = {
> > - { .compatible = "atmel,at91rm9200-spi" },
> > - { /* sentinel */ }
> > -};
> > -
> > -MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids);
> > -#endif
> > -
> > static struct platform_driver atmel_spi_driver = {
> > .driver = {
> > .name = "atmel_spi",
> > .owner = THIS_MODULE,
> > .of_match_table = of_match_ptr(atmel_spi_dt_ids),
> > },
> > + .id_table = atmel_spi_devtypes,
> > .suspend = atmel_spi_suspend,
> > .resume = atmel_spi_resume,
> > .probe = atmel_spi_probe,
> > --
> > 1.7.9.5
> >
Best Regards,
Wenyou Yang
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
2013-02-05 19:50 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2013-02-06 1:34 ` Yang, Wenyou
2013-02-08 1:51 ` Yang, Wenyou
1 sibling, 0 replies; 29+ messages in thread
From: Yang, Wenyou @ 2013-02-06 1:34 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: linux-arm-kernel, linux-kernel, Ferre, Nicolas, richard.genoud,
Lin, JM, linux
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="gb2312", Size: 5107 bytes --]
> -----Original Message-----
> From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com]
> Sent: 2013Äê2ÔÂ6ÈÕ 3:50
> To: Yang, Wenyou
> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
> Nicolas; richard.genoud@gmail.com; Lin, JM; linux@arm.linux.org.uk
> Subject: Re: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
>
> On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> > From: Richard Genoud <richard.genoud@gmail.com>
> >
> > Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> > [wenyou.yang@atmel.com: added spi nodes for the sam9263ek, sam9g20ek,
> sam9m10g45ek and sam9n12ek boards]
> > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > Cc: linux@arm.linux.org.uk
> > ---
> > arch/arm/boot/dts/at91sam9263ek.dts | 14
> ++++++++++++++
> > arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14
> ++++++++++++++
> > arch/arm/boot/dts/at91sam9m10g45ek.dts | 14
> ++++++++++++++
> > arch/arm/boot/dts/at91sam9n12ek.dts | 14
> ++++++++++++++
> > arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 ++++++++++++++
> > 5 files changed, 70 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/at91sam9263ek.dts
> b/arch/arm/boot/dts/at91sam9263ek.dts
> > index 1eb0872..63ba57b 100644
> > --- a/arch/arm/boot/dts/at91sam9263ek.dts
> > +++ b/arch/arm/boot/dts/at91sam9263ek.dts
> > @@ -79,6 +79,20 @@
> > };
> > };
> > };
> > +
> > + spi0: spi@fffa4000 {
> > + status = "okay";
> > + cs-gpios = <&pioA 5 0
> > + &pioA 3 0
> > + &pioA 4 0
> > + &pioB 11 0
> NACK
>
> we no use that much as cs-gpios on this hw
Thanks for your feedback.
Listing the all choices for cs-gpios, one cs-gpio is selected by reg value.
Maybe listing one cs-gpio is OK.
I will try it.
I am going to dig the feasibility of removing cs-gpios.
> > + >;
> > + mtd_dataflash@0 {
> > + compatible = "atmel,at45", "atmel,dataflash";
> > + spi-max-frequency = <50000000>;
> > + reg = <0>;
> > + };
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > index da15e83..49ad49e 100644
> > --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > @@ -96,6 +96,20 @@
> > status = "okay";
> > pinctrl-0 = <&pinctrl_ssc0_tx>;
> > };
> > +
> > + spi0: spi@fffc8000 {
> > + status = "okay";
> > + cs-gpios = <&pioA 3 0
> > + &pioC 11 0
> > + &pioC 16 0
> > + &pioC 17 0
> ditto and so on
>
> you must only provife the gpio use by the hw
> > + >;
> > + mtd_dataflash@0 {
> > + compatible = "atmel,at45", "atmel,dataflash";
> > + spi-max-frequency = <50000000>;
> > + reg = <1>;
> > + };
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts
> b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > index 20c3191..275f22d 100644
> > --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > @@ -102,6 +102,20 @@
> > };
> > };
> > };
> > +
> > + spi0: spi@fffa4000{
> > + status = "okay";
> > + cs-gpios = <&pioB 3 0
> > + &pioB 18 0
> > + &pioB 19 0
> > + &pioD 27 0
> > + >;
> > + mtd_dataflash@0 {
> > + compatible = "atmel,at45", "atmel,dataflash";
> > + spi-max-frequency = <13000000>;
> > + reg = <0>;
> > + };
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts
> b/arch/arm/boot/dts/at91sam9n12ek.dts
> > index 0376bf4..4eeca7b 100644
> > --- a/arch/arm/boot/dts/at91sam9n12ek.dts
> > +++ b/arch/arm/boot/dts/at91sam9n12ek.dts
> > @@ -67,6 +67,20 @@
> > };
> > };
> > };
> > +
> > + spi0: spi@f0000000 {
> > + status = "okay";
> > + cs-gpios = <&pioA 14 0
> > + &pioA 7 0
> > + &pioA 1 0
> > + &pioB 3 0
> > + >;
> > + m25p80@0 {
> > + compatible = "atmel,at25df321a";
> > + spi-max-frequency = <50000000>;
> > + reg = <0>;
> > + };
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi
> b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > index 8a7cf1d..ca0a056 100644
> > --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > @@ -84,6 +84,20 @@
> > };
> > };
> > };
> > +
> > + spi0: spi@f0000000 {
> > + status = "okay";
> > + cs-gpios = <&pioA 14 0
> > + &pioA 7 0
> > + &pioA 1 0
> > + &pioB 3 0
> > + >;
> > + m25p80@0 {
> > + compatible = "atmel,at25df321a";
> > + spi-max-frequency = <50000000>;
> > + reg = <0>;
> > + };
> > + };
> > };
> >
> > usb0: ohci@00600000 {
> > --
> > 1.7.9.5
> >
Best Regards,
Wenyou Yang
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC
2013-02-05 19:51 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2013-02-06 1:35 ` Yang, Wenyou
2013-02-06 9:40 ` Nicolas Ferre
0 siblings, 1 reply; 29+ messages in thread
From: Yang, Wenyou @ 2013-02-06 1:35 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: linux-arm-kernel, linux-kernel, Ferre, Nicolas, richard.genoud,
Lin, JM, linux
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="gb2312", Size: 5788 bytes --]
> -----Original Message-----
> From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com]
> Sent: 2013Äê2ÔÂ6ÈÕ 3:51
> To: Yang, Wenyou
> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
> Nicolas; richard.genoud@gmail.com; Lin, JM; linux@arm.linux.org.uk
> Subject: Re: [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC
>
> On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> > From: Richard Genoud <richard.genoud@gmail.com>
> >
> > Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> > [wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45
> and sam9n12]
> > [wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts
> files]
> > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > Cc: linux@arm.linux.org.uk
> > ---
> > arch/arm/boot/dts/at91sam9260.dtsi | 18 ++++++++++++++++++
> > arch/arm/boot/dts/at91sam9263.dtsi | 18 ++++++++++++++++++
> > arch/arm/boot/dts/at91sam9g45.dtsi | 18 ++++++++++++++++++
> I alreadt have some patch in queue
>
Thanks
I will remove this patch in the next version.
> Best Regards,
> J.
> > arch/arm/boot/dts/at91sam9n12.dtsi | 18 ++++++++++++++++++
> > arch/arm/boot/dts/at91sam9x5.dtsi | 18 ++++++++++++++++++
> > 5 files changed, 90 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/at91sam9260.dtsi
> b/arch/arm/boot/dts/at91sam9260.dtsi
> > index 68bccf4..9586fe1 100644
> > --- a/arch/arm/boot/dts/at91sam9260.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> > @@ -453,6 +453,24 @@
> > status = "disabled";
> > };
> >
> > + spi0: spi@fffc8000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9260-spi";
> > + reg = <0xfffc8000 0x200>;
> > + interrupts = <12 4 3>;
> > + status = "disabled";
> > + };
> > +
> > + spi1: spi@fffcc000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9260-spi";
> > + reg = <0xfffcc000 0x200>;
> > + interrupts = <13 4 3>;
> > + status = "disabled";
> > + };
> > +
> > adc0: adc@fffe0000 {
> > compatible = "atmel,at91sam9260-adc";
> > reg = <0xfffe0000 0x100>;
> > diff --git a/arch/arm/boot/dts/at91sam9263.dtsi
> b/arch/arm/boot/dts/at91sam9263.dtsi
> > index 32ec62c..636b882 100644
> > --- a/arch/arm/boot/dts/at91sam9263.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> > @@ -426,6 +426,24 @@
> > reg = <0xfffffd40 0x10>;
> > status = "disabled";
> > };
> > +
> > + spi0: spi@fffa4000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9260-spi";
> > + reg = <0xfffa4000 0x200>;
> > + interrupts = <14 4 3>;
> > + status = "disabled";
> > + };
> > +
> > + spi1: spi@fffa8000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9260-spi";
> > + reg = <0xfffa8000 0x200>;
> > + interrupts = <15 4 3>;
> > + status = "disabled";
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
> b/arch/arm/boot/dts/at91sam9g45.dtsi
> > index 231858f..0100b80 100644
> > --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> > @@ -495,6 +495,24 @@
> > reg = <0xfffffd40 0x10>;
> > status = "disabled";
> > };
> > +
> > + spi0: spi@fffa4000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9g45-spi";
> > + reg = <0xfffa4000 0x200>;
> > + interrupts = <14 4 3>;
> > + status = "disabled";
> > + };
> > +
> > + spi1: spi@fffa8000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9g45-spi";
> > + reg = <0xfffa8000 0x200>;
> > + interrupts = <15 4 3>;
> > + status = "disabled";
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
> b/arch/arm/boot/dts/at91sam9n12.dtsi
> > index e9efb34..86d5357 100644
> > --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> > @@ -355,6 +355,24 @@
> > #size-cells = <0>;
> > status = "disabled";
> > };
> > +
> > + spi0: spi@f0000000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9x5-spi";
> > + reg = <0xf0000000 0x100>;
> > + interrupts = <13 4 3>;
> > + status = "disabled";
> > + };
> > +
> > + spi1: spi@f0004000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9x5-spi";
> > + reg = <0xf0004000 0x100>;
> > + interrupts = <14 4 3>;
> > + status = "disabled";
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
> b/arch/arm/boot/dts/at91sam9x5.dtsi
> > index 40ac3a4..8ea2f7d 100644
> > --- a/arch/arm/boot/dts/at91sam9x5.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9x5.dtsi
> > @@ -473,6 +473,24 @@
> > trigger-value = <0x6>;
> > };
> > };
> > +
> > + spi0: spi@f0000000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9x5-spi";
> > + reg = <0xf0000000 0x100>;
> > + interrupts = <13 4 3>;
> > + status = "disabled";
> > + };
> > +
> > + spi1: spi@f0004000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "atmel,at91sam9x5-spi";
> > + reg = <0xf0004000 0x100>;
> > + interrupts = <14 4 3>;
> > + status = "disabled";
> > + };
> > };
> >
> > nand0: nand@40000000 {
> > --
> > 1.7.9.5
> >
Best Regards,
Wenyou Yang
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support
2013-02-05 14:14 ` Grant Likely
2013-02-05 20:06 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2013-02-06 8:33 ` Yang, Wenyou
1 sibling, 0 replies; 29+ messages in thread
From: Yang, Wenyou @ 2013-02-06 8:33 UTC (permalink / raw)
To: Grant Likely, linux-arm-kernel
Cc: richard.genoud, Lin, JM, Ferre, Nicolas, linux-kernel, plagnioj
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="gb2312", Size: 4691 bytes --]
Hello, Grant
Thanks a lot for your feedback.
> -----Original Message-----
> From: Grant Likely [mailto:glikely@secretlab.ca] On Behalf Of Grant Likely
> Sent: 2013Äê2ÔÂ5ÈÕ 22:14
> To: Yang, Wenyou; linux-arm-kernel@lists.infradead.org
> Cc: richard.genoud@gmail.com; Lin, JM; Ferre, Nicolas;
> linux-kernel@vger.kernel.org; Yang, Wenyou; plagnioj@jcrosoft.com
> Subject: Re: [v4 PATCH 00/12] atmel spi controller with dmaengine and device
> tree support
>
> On Mon, 14 Jan 2013 15:34:25 +0800, Wenyou Yang
> <wenyou.yang@atmel.com> wrote:
> > Hi All,
> >
> > This set of patches is to add dmaengine and device tree support for atmel spi.
> > The work is based on Nicolas and Richard's work.
> > It is tested on at91sam9x5ek, at91sam9m10g45ek, at91sam9263ek and
> at91sam9g20ek.
> >
> > It is based on v3.8-rc3.
>
> Hi Wenyou,
>
> The patches look fine on a quick look, but I cannot apply them without a
> Signed-off-by line from you since you are the person posting the
> patches. Please read section 12 of Documentation/SubmittingPatches
> (about line #288) and then reply confirming what your signed-off-by line
> should be.
Yes, I should add the below lines:
[wenyou.yang@atmel.com: Submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
>
> >
> > Changelog:
> > v4:
> > 1./ Take Joe Perches's advance, rewrite atmel_spi_is_v2(struct atmel_spi
> *as)
> > and atmel_spi_use_dma(struct atmel_spi *as),
> > and remove atmel_spi_use_pdc(struct atmel_spi *as).
> >
> > 2./ Rebase on v3.8-rc3.
> >
> > V3:
> > 1./ Rebase on v3.8-rc2.
> >
> > 2./ Remove some Jean-Christophe's patches which has been
> > applied on v3.8-rc2.
> >
> > 3./ Remove spi property "cs-gpios" from the SoC dtsi files
> > to the board dts files to avoid some useless pin conflicts.
> >
> > v2:
> > 1./ Remove the patch :PATCH]mtd: m25p80: change the
> m25p80_read to reading page to page
> > which purpose to fix the BUG: when run "flashcp /bin/busybox
> /dev/mtdX" in
> > the at91sam9g25ek with DMA mode, it arises a OOPS.
> > Now fix it in this patch:
> > [PATHC] spi/atmel_spi: add dmaengine support changing to fix the
> [BUG].
> >
> > 2./ Remove two patches:
> > which purpose to read dts property to select SPI IP version and
> DMA mode
> > Now they will be gat from device tree different compatile.
> >
> > 3./ Fix DMA: when enable both spi0 AND spi1, the spi0 doesn't work BUG.
> >
> > 4./ Rebase v3.7-rc8.
> >
> > Best Regards,
> > Wenyou Yang.
> >
> > Nicolas Ferre (5):
> > spi/atmel_spi: add physical base address
> > spi/atmel_spi: call unmapping on transfers buffers
> > spi/atmel_spi: status information passed through controller data
> > spi/atmel_spi: add flag to controller data for lock operations
> > spi/atmel_spi: add dmaengine support
> >
> > Richard Genoud (6):
> > spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes
> > spi/atmel_spi: correct 16 bits transfers using PIO
> > spi/atmel_spi: correct 16 bits transfer with DMA
> > ARM: at91: add clocks for spi dt entries
> > ARM: dts: add spi nodes for atmel SoC
> > ARM: dts: add spi nodes for the atmel boards
> >
> > Wenyou Yang (1):
> > spi/atmel_spi: update the dt support
> >
> > arch/arm/boot/dts/at91sam9260.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9263.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9263ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14 +
> > arch/arm/boot/dts/at91sam9g45.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9m10g45ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9n12.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9n12ek.dts | 14 +
> > arch/arm/boot/dts/at91sam9x5.dtsi | 18 +
> > arch/arm/boot/dts/at91sam9x5ek.dtsi | 14 +
> > arch/arm/mach-at91/at91sam9260.c | 2 +
> > arch/arm/mach-at91/at91sam9g45.c | 2 +
> > arch/arm/mach-at91/at91sam9n12.c | 2 +
> > arch/arm/mach-at91/at91sam9x5.c | 2 +
> > drivers/spi/spi-atmel.c | 809
> ++++++++++++++++++++++++---
> > 15 files changed, 908 insertions(+), 69 deletions(-)
> >
> > --
> > 1.7.9.5
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> Grant Likely, B.Sc, P.Eng.
> Secret Lab Technologies, Ltd.
Best Regards,
Wenyou Yang
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC
2013-02-06 1:35 ` Yang, Wenyou
@ 2013-02-06 9:40 ` Nicolas Ferre
0 siblings, 0 replies; 29+ messages in thread
From: Nicolas Ferre @ 2013-02-06 9:40 UTC (permalink / raw)
To: Yang, Wenyou, Jean-Christophe PLAGNIOL-VILLARD
Cc: linux-arm-kernel, linux-kernel, richard.genoud, Lin, JM, linux
On 02/06/2013 02:35 AM, Yang, Wenyou :
>
>
>> -----Original Message-----
>> From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com]
>> Sent: 2013年2月6日 3:51
>> To: Yang, Wenyou
>> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
>> Nicolas; richard.genoud@gmail.com; Lin, JM; linux@arm.linux.org.uk
>> Subject: Re: [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC
>>
>> On 15:34 Mon 14 Jan , Wenyou Yang wrote:
>>> From: Richard Genoud <richard.genoud@gmail.com>
>>>
>>> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
>>> [wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45
>> and sam9n12]
>>> [wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts
>> files]
>>> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
>>> Cc: linux@arm.linux.org.uk
>>> ---
>>> arch/arm/boot/dts/at91sam9260.dtsi | 18 ++++++++++++++++++
>>> arch/arm/boot/dts/at91sam9263.dtsi | 18 ++++++++++++++++++
>>> arch/arm/boot/dts/at91sam9g45.dtsi | 18 ++++++++++++++++++
>> I alreadt have some patch in queue
>>
> Thanks
> I will remove this patch in the next version.
Well, I am not sure:
Jean Christophe, if the patches are in your own queue, I do not see why
this series has to be modified.
The "I already have a patch to address this" type of comment is not a
proper comment:
1/ either you already have submitted the patch (and the new series has
to take it into
account, obviously)
2/ or the patch is not public yet and you now have to deal with this
series posted before
your own one.
There is no a third way...
Best regards,
>>> arch/arm/boot/dts/at91sam9n12.dtsi | 18 ++++++++++++++++++
>>> arch/arm/boot/dts/at91sam9x5.dtsi | 18 ++++++++++++++++++
>>> 5 files changed, 90 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/at91sam9260.dtsi
>> b/arch/arm/boot/dts/at91sam9260.dtsi
>>> index 68bccf4..9586fe1 100644
>>> --- a/arch/arm/boot/dts/at91sam9260.dtsi
>>> +++ b/arch/arm/boot/dts/at91sam9260.dtsi
>>> @@ -453,6 +453,24 @@
>>> status = "disabled";
>>> };
>>>
>>> + spi0: spi@fffc8000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9260-spi";
>>> + reg = <0xfffc8000 0x200>;
>>> + interrupts = <12 4 3>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi@fffcc000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9260-spi";
>>> + reg = <0xfffcc000 0x200>;
>>> + interrupts = <13 4 3>;
>>> + status = "disabled";
>>> + };
>>> +
>>> adc0: adc@fffe0000 {
>>> compatible = "atmel,at91sam9260-adc";
>>> reg = <0xfffe0000 0x100>;
>>> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi
>> b/arch/arm/boot/dts/at91sam9263.dtsi
>>> index 32ec62c..636b882 100644
>>> --- a/arch/arm/boot/dts/at91sam9263.dtsi
>>> +++ b/arch/arm/boot/dts/at91sam9263.dtsi
>>> @@ -426,6 +426,24 @@
>>> reg = <0xfffffd40 0x10>;
>>> status = "disabled";
>>> };
>>> +
>>> + spi0: spi@fffa4000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9260-spi";
>>> + reg = <0xfffa4000 0x200>;
>>> + interrupts = <14 4 3>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi@fffa8000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9260-spi";
>>> + reg = <0xfffa8000 0x200>;
>>> + interrupts = <15 4 3>;
>>> + status = "disabled";
>>> + };
>>> };
>>>
>>> nand0: nand@40000000 {
>>> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
>> b/arch/arm/boot/dts/at91sam9g45.dtsi
>>> index 231858f..0100b80 100644
>>> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
>>> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
>>> @@ -495,6 +495,24 @@
>>> reg = <0xfffffd40 0x10>;
>>> status = "disabled";
>>> };
>>> +
>>> + spi0: spi@fffa4000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9g45-spi";
>>> + reg = <0xfffa4000 0x200>;
>>> + interrupts = <14 4 3>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi@fffa8000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9g45-spi";
>>> + reg = <0xfffa8000 0x200>;
>>> + interrupts = <15 4 3>;
>>> + status = "disabled";
>>> + };
>>> };
>>>
>>> nand0: nand@40000000 {
>>> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
>> b/arch/arm/boot/dts/at91sam9n12.dtsi
>>> index e9efb34..86d5357 100644
>>> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
>>> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
>>> @@ -355,6 +355,24 @@
>>> #size-cells = <0>;
>>> status = "disabled";
>>> };
>>> +
>>> + spi0: spi@f0000000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9x5-spi";
>>> + reg = <0xf0000000 0x100>;
>>> + interrupts = <13 4 3>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi@f0004000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9x5-spi";
>>> + reg = <0xf0004000 0x100>;
>>> + interrupts = <14 4 3>;
>>> + status = "disabled";
>>> + };
>>> };
>>>
>>> nand0: nand@40000000 {
>>> diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
>> b/arch/arm/boot/dts/at91sam9x5.dtsi
>>> index 40ac3a4..8ea2f7d 100644
>>> --- a/arch/arm/boot/dts/at91sam9x5.dtsi
>>> +++ b/arch/arm/boot/dts/at91sam9x5.dtsi
>>> @@ -473,6 +473,24 @@
>>> trigger-value = <0x6>;
>>> };
>>> };
>>> +
>>> + spi0: spi@f0000000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9x5-spi";
>>> + reg = <0xf0000000 0x100>;
>>> + interrupts = <13 4 3>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi@f0004000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91sam9x5-spi";
>>> + reg = <0xf0004000 0x100>;
>>> + interrupts = <14 4 3>;
>>> + status = "disabled";
>>> + };
>>> };
>>>
>>> nand0: nand@40000000 {
>>> --
>>> 1.7.9.5
>>>
>
> Best Regards,
> Wenyou Yang
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
2013-02-05 19:50 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 1:34 ` Yang, Wenyou
@ 2013-02-08 1:51 ` Yang, Wenyou
2013-02-08 16:55 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 1 reply; 29+ messages in thread
From: Yang, Wenyou @ 2013-02-08 1:51 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: linux-arm-kernel, linux-kernel, Ferre, Nicolas, richard.genoud,
Lin, JM, linux
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="gb2312", Size: 6182 bytes --]
Hello, JC
> -----Original Message-----
> From: Yang, Wenyou
> Sent: 2013Äê2ÔÂ6ÈÕ 9:35
> To: 'Jean-Christophe PLAGNIOL-VILLARD'
> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
> Nicolas; richard.genoud@gmail.com; Lin, JM; linux@arm.linux.org.uk
> Subject: RE: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
>
>
>
> > -----Original Message-----
> > From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com]
> > Sent: 2013Äê2ÔÂ6ÈÕ 3:50
> > To: Yang, Wenyou
> > Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> Ferre,
> > Nicolas; richard.genoud@gmail.com; Lin, JM; linux@arm.linux.org.uk
> > Subject: Re: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
> >
> > On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> > > From: Richard Genoud <richard.genoud@gmail.com>
> > >
> > > Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> > > [wenyou.yang@atmel.com: added spi nodes for the sam9263ek,
> sam9g20ek,
> > sam9m10g45ek and sam9n12ek boards]
> > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > > Cc: linux@arm.linux.org.uk
> > > ---
> > > arch/arm/boot/dts/at91sam9263ek.dts | 14
> > ++++++++++++++
> > > arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14
> > ++++++++++++++
> > > arch/arm/boot/dts/at91sam9m10g45ek.dts | 14
> > ++++++++++++++
> > > arch/arm/boot/dts/at91sam9n12ek.dts | 14
> > ++++++++++++++
> > > arch/arm/boot/dts/at91sam9x5ek.dtsi | 14
> ++++++++++++++
> > > 5 files changed, 70 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/at91sam9263ek.dts
> > b/arch/arm/boot/dts/at91sam9263ek.dts
> > > index 1eb0872..63ba57b 100644
> > > --- a/arch/arm/boot/dts/at91sam9263ek.dts
> > > +++ b/arch/arm/boot/dts/at91sam9263ek.dts
> > > @@ -79,6 +79,20 @@
> > > };
> > > };
> > > };
> > > +
> > > + spi0: spi@fffa4000 {
> > > + status = "okay";
> > > + cs-gpios = <&pioA 5 0
> > > + &pioA 3 0
> > > + &pioA 4 0
> > > + &pioB 11 0
> > NACK
> >
> > we no use that much as cs-gpios on this hw
>
> Thanks for your feedback.
>
> Listing the all choices for cs-gpios, one cs-gpio is selected by reg value.
> Maybe listing one cs-gpio is OK.
> I will try it.
>
> I am going to dig the feasibility of removing cs-gpios.
I need remain the list of cs-gpios, because "master->num_chipselect" is got from the number of item of this list.
If this list is removed, only the cs-gpio for used chip-select is provided , it works for CS0 chip-select, but it fails to work for other than CS0, e.g. CS1.
Could you give me some idea?
Thank you in advance.
>
> > > + >;
> > > + mtd_dataflash@0 {
> > > + compatible = "atmel,at45", "atmel,dataflash";
> > > + spi-max-frequency = <50000000>;
> > > + reg = <0>;
> > > + };
> > > + };
> > > };
> > >
> > > nand0: nand@40000000 {
> > > diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > > index da15e83..49ad49e 100644
> > > --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > > +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > > @@ -96,6 +96,20 @@
> > > status = "okay";
> > > pinctrl-0 = <&pinctrl_ssc0_tx>;
> > > };
> > > +
> > > + spi0: spi@fffc8000 {
> > > + status = "okay";
> > > + cs-gpios = <&pioA 3 0
> > > + &pioC 11 0
> > > + &pioC 16 0
> > > + &pioC 17 0
> > ditto and so on
> >
> > you must only provife the gpio use by the hw
> > > + >;
> > > + mtd_dataflash@0 {
> > > + compatible = "atmel,at45", "atmel,dataflash";
> > > + spi-max-frequency = <50000000>;
> > > + reg = <1>;
> > > + };
> > > + };
> > > };
> > >
> > > nand0: nand@40000000 {
> > > diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > > index 20c3191..275f22d 100644
> > > --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > > +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > > @@ -102,6 +102,20 @@
> > > };
> > > };
> > > };
> > > +
> > > + spi0: spi@fffa4000{
> > > + status = "okay";
> > > + cs-gpios = <&pioB 3 0
> > > + &pioB 18 0
> > > + &pioB 19 0
> > > + &pioD 27 0
> > > + >;
> > > + mtd_dataflash@0 {
> > > + compatible = "atmel,at45", "atmel,dataflash";
> > > + spi-max-frequency = <13000000>;
> > > + reg = <0>;
> > > + };
> > > + };
> > > };
> > >
> > > nand0: nand@40000000 {
> > > diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts
> > b/arch/arm/boot/dts/at91sam9n12ek.dts
> > > index 0376bf4..4eeca7b 100644
> > > --- a/arch/arm/boot/dts/at91sam9n12ek.dts
> > > +++ b/arch/arm/boot/dts/at91sam9n12ek.dts
> > > @@ -67,6 +67,20 @@
> > > };
> > > };
> > > };
> > > +
> > > + spi0: spi@f0000000 {
> > > + status = "okay";
> > > + cs-gpios = <&pioA 14 0
> > > + &pioA 7 0
> > > + &pioA 1 0
> > > + &pioB 3 0
> > > + >;
> > > + m25p80@0 {
> > > + compatible = "atmel,at25df321a";
> > > + spi-max-frequency = <50000000>;
> > > + reg = <0>;
> > > + };
> > > + };
> > > };
> > >
> > > nand0: nand@40000000 {
> > > diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > > index 8a7cf1d..ca0a056 100644
> > > --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > > +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > > @@ -84,6 +84,20 @@
> > > };
> > > };
> > > };
> > > +
> > > + spi0: spi@f0000000 {
> > > + status = "okay";
> > > + cs-gpios = <&pioA 14 0
> > > + &pioA 7 0
> > > + &pioA 1 0
> > > + &pioB 3 0
> > > + >;
> > > + m25p80@0 {
> > > + compatible = "atmel,at25df321a";
> > > + spi-max-frequency = <50000000>;
> > > + reg = <0>;
> > > + };
> > > + };
> > > };
> > >
> > > usb0: ohci@00600000 {
> > > --
> > > 1.7.9.5
> > >
>
> Best Regards,
> Wenyou Yang
Best Regards,
Wenyou Yang
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
2013-02-08 1:51 ` Yang, Wenyou
@ 2013-02-08 16:55 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 29+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-02-08 16:55 UTC (permalink / raw)
To: Yang, Wenyou
Cc: linux-arm-kernel, linux-kernel, Ferre, Nicolas, richard.genoud,
Lin, JM, linux
On 01:51 Fri 08 Feb , Yang, Wenyou wrote:
> Hello, JC
>
> > -----Original Message-----
> > From: Yang, Wenyou
> > Sent: 2013年2月6日 9:35
> > To: 'Jean-Christophe PLAGNIOL-VILLARD'
> > Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ferre,
> > Nicolas; richard.genoud@gmail.com; Lin, JM; linux@arm.linux.org.uk
> > Subject: RE: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
> >
> >
> >
> > > -----Original Message-----
> > > From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com]
> > > Sent: 2013年2月6日 3:50
> > > To: Yang, Wenyou
> > > Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> > Ferre,
> > > Nicolas; richard.genoud@gmail.com; Lin, JM; linux@arm.linux.org.uk
> > > Subject: Re: [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards
> > >
> > > On 15:34 Mon 14 Jan , Wenyou Yang wrote:
> > > > From: Richard Genoud <richard.genoud@gmail.com>
> > > >
> > > > Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> > > > [wenyou.yang@atmel.com: added spi nodes for the sam9263ek,
> > sam9g20ek,
> > > sam9m10g45ek and sam9n12ek boards]
> > > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > > > Cc: linux@arm.linux.org.uk
> > > > ---
> > > > arch/arm/boot/dts/at91sam9263ek.dts | 14
> > > ++++++++++++++
> > > > arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 14
> > > ++++++++++++++
> > > > arch/arm/boot/dts/at91sam9m10g45ek.dts | 14
> > > ++++++++++++++
> > > > arch/arm/boot/dts/at91sam9n12ek.dts | 14
> > > ++++++++++++++
> > > > arch/arm/boot/dts/at91sam9x5ek.dtsi | 14
> > ++++++++++++++
> > > > 5 files changed, 70 insertions(+)
> > > >
> > > > diff --git a/arch/arm/boot/dts/at91sam9263ek.dts
> > > b/arch/arm/boot/dts/at91sam9263ek.dts
> > > > index 1eb0872..63ba57b 100644
> > > > --- a/arch/arm/boot/dts/at91sam9263ek.dts
> > > > +++ b/arch/arm/boot/dts/at91sam9263ek.dts
> > > > @@ -79,6 +79,20 @@
> > > > };
> > > > };
> > > > };
> > > > +
> > > > + spi0: spi@fffa4000 {
> > > > + status = "okay";
> > > > + cs-gpios = <&pioA 5 0
> > > > + &pioA 3 0
> > > > + &pioA 4 0
> > > > + &pioB 11 0
> > > NACK
> > >
> > > we no use that much as cs-gpios on this hw
> >
> > Thanks for your feedback.
> >
> > Listing the all choices for cs-gpios, one cs-gpio is selected by reg value.
> > Maybe listing one cs-gpio is OK.
> > I will try it.
> >
> > I am going to dig the feasibility of removing cs-gpios.
>
> I need remain the list of cs-gpios, because "master->num_chipselect" is got from the number of item of this list.
> If this list is removed, only the cs-gpio for used chip-select is provided , it works for CS0 chip-select, but it fails to work for other than CS0, e.g. CS1.
>
I did the cs-gpios support you can not expect to do not have it on at91
but you need to ONLY provide the used gpio not ALL
Best Regards,
J.
> Could you give me some idea?
> Thank you in advance.
>
> >
> > > > + >;
> > > > + mtd_dataflash@0 {
> > > > + compatible = "atmel,at45", "atmel,dataflash";
> > > > + spi-max-frequency = <50000000>;
> > > > + reg = <0>;
> > > > + };
> > > > + };
> > > > };
> > > >
> > > > nand0: nand@40000000 {
> > > > diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > > b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > > > index da15e83..49ad49e 100644
> > > > --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > > > +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> > > > @@ -96,6 +96,20 @@
> > > > status = "okay";
> > > > pinctrl-0 = <&pinctrl_ssc0_tx>;
> > > > };
> > > > +
> > > > + spi0: spi@fffc8000 {
> > > > + status = "okay";
> > > > + cs-gpios = <&pioA 3 0
> > > > + &pioC 11 0
> > > > + &pioC 16 0
> > > > + &pioC 17 0
> > > ditto and so on
> > >
> > > you must only provife the gpio use by the hw
> > > > + >;
> > > > + mtd_dataflash@0 {
> > > > + compatible = "atmel,at45", "atmel,dataflash";
> > > > + spi-max-frequency = <50000000>;
> > > > + reg = <1>;
> > > > + };
> > > > + };
> > > > };
> > > >
> > > > nand0: nand@40000000 {
> > > > diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > > b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > > > index 20c3191..275f22d 100644
> > > > --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > > > +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
> > > > @@ -102,6 +102,20 @@
> > > > };
> > > > };
> > > > };
> > > > +
> > > > + spi0: spi@fffa4000{
> > > > + status = "okay";
> > > > + cs-gpios = <&pioB 3 0
> > > > + &pioB 18 0
> > > > + &pioB 19 0
> > > > + &pioD 27 0
> > > > + >;
> > > > + mtd_dataflash@0 {
> > > > + compatible = "atmel,at45", "atmel,dataflash";
> > > > + spi-max-frequency = <13000000>;
> > > > + reg = <0>;
> > > > + };
> > > > + };
> > > > };
> > > >
> > > > nand0: nand@40000000 {
> > > > diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts
> > > b/arch/arm/boot/dts/at91sam9n12ek.dts
> > > > index 0376bf4..4eeca7b 100644
> > > > --- a/arch/arm/boot/dts/at91sam9n12ek.dts
> > > > +++ b/arch/arm/boot/dts/at91sam9n12ek.dts
> > > > @@ -67,6 +67,20 @@
> > > > };
> > > > };
> > > > };
> > > > +
> > > > + spi0: spi@f0000000 {
> > > > + status = "okay";
> > > > + cs-gpios = <&pioA 14 0
> > > > + &pioA 7 0
> > > > + &pioA 1 0
> > > > + &pioB 3 0
> > > > + >;
> > > > + m25p80@0 {
> > > > + compatible = "atmel,at25df321a";
> > > > + spi-max-frequency = <50000000>;
> > > > + reg = <0>;
> > > > + };
> > > > + };
> > > > };
> > > >
> > > > nand0: nand@40000000 {
> > > > diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > > b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > > > index 8a7cf1d..ca0a056 100644
> > > > --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > > > +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
> > > > @@ -84,6 +84,20 @@
> > > > };
> > > > };
> > > > };
> > > > +
> > > > + spi0: spi@f0000000 {
> > > > + status = "okay";
> > > > + cs-gpios = <&pioA 14 0
> > > > + &pioA 7 0
> > > > + &pioA 1 0
> > > > + &pioB 3 0
> > > > + >;
> > > > + m25p80@0 {
> > > > + compatible = "atmel,at25df321a";
> > > > + spi-max-frequency = <50000000>;
> > > > + reg = <0>;
> > > > + };
> > > > + };
> > > > };
> > > >
> > > > usb0: ohci@00600000 {
> > > > --
> > > > 1.7.9.5
> > > >
> >
> > Best Regards,
> > Wenyou Yang
>
> Best Regards,
> Wenyou Yang
^ permalink raw reply [flat|nested] 29+ messages in thread
end of thread, other threads:[~2013-02-08 16:56 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-01-14 7:34 [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 01/12] spi/atmel_spi: add physical base address Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 02/12] spi/atmel_spi: call unmapping on transfers buffers Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 03/12] spi/atmel_spi: status information passed through controller data Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 04/12] spi/atmel_spi: add flag to controller data for lock operations Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 05/12] spi/atmel_spi: update the dt support Wenyou Yang
2013-02-05 20:04 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 1:19 ` Yang, Wenyou
2013-01-14 7:34 ` [v4 PATCH 06/12] spi/atmel_spi: add dmaengine support Wenyou Yang
2013-01-23 16:25 ` Richard Genoud
2013-01-24 0:44 ` Yang, Wenyou
2013-01-14 7:34 ` [v4 PATCH 07/12] spi/atmel_spi: fix spi-atmel driver to adapt to slave_config changes Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 08/12] spi/atmel_spi: correct 16 bits transfers using PIO Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 09/12] spi/atmel_spi: correct 16 bits transfer with DMA Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 10/12] ARM: at91: add clocks for spi dt entries Wenyou Yang
2013-01-14 7:34 ` [v4 PATCH 11/12] ARM: dts: add spi nodes for atmel SoC Wenyou Yang
2013-02-05 19:51 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 1:35 ` Yang, Wenyou
2013-02-06 9:40 ` Nicolas Ferre
2013-01-14 7:34 ` [v4 PATCH 12/12] ARM: dts: add spi nodes for the atmel boards Wenyou Yang
2013-02-05 19:50 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 1:34 ` Yang, Wenyou
2013-02-08 1:51 ` Yang, Wenyou
2013-02-08 16:55 ` Jean-Christophe PLAGNIOL-VILLARD
2013-01-18 8:46 ` [v4 PATCH 00/12] atmel spi controller with dmaengine and device tree support Richard Genoud
2013-01-18 9:31 ` Yang, Wenyou
2013-02-05 14:14 ` Grant Likely
2013-02-05 20:06 ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-06 8:33 ` Yang, Wenyou
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).