[PATCH] Use correct byte-sized register constraint in __xchg_op()

[PATCH] Use correct byte-sized register constraint in __xchg_op()

[Jeremy Fitzhardinge]

x86-64 can access the low half of any register, but i386 can only do
it with a subset of registers.  'r' causes compilation failures on i386,
but 'q' expresses the constraint properly.

Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Reported-by: Leigh Scott <leigh123linux@googlemail.com>
Tested-by: Thomas Reitmayr <treitmayr@devbase.at>

diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index b3b7332..bc18d0e 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
 		switch (sizeof(*(ptr))) {				\
 		case __X86_CASE_B:					\
 			asm volatile (lock #op "b %b0, %1\n"		\
-				      : "+r" (__ret), "+m" (*(ptr))	\
+				      : "+q" (__ret), "+m" (*(ptr))	\
 				      : : "memory", "cc");		\
 			break;						\
 		case __X86_CASE_W:					\

Re: [PATCH] Use correct byte-sized register constraint in __xchg_op()

[Josh Boyer]

On Mon, Apr 2, 2012 at 7:15 PM, Jeremy Fitzhardinge <jeremy@goop.org> wrote:
> x86-64 can access the low half of any register, but i386 can only do
> it with a subset of registers.  'r' causes compilation failures on i386,
> but 'q' expresses the constraint properly.
>
> Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
> Reported-by: Leigh Scott <leigh123linux@googlemail.com>
> Tested-by: Thomas Reitmayr <treitmayr@devbase.at>

This should be CC'd to stable, given the bug shows up in 3.3, right?

josh

Re: [PATCH] Use correct byte-sized register constraint in __xchg_op()

[Josh Boyer]

On Tue, Apr 3, 2012 at 8:37 PM, Josh Boyer <jwboyer@gmail.com> wrote:
> On Mon, Apr 2, 2012 at 7:15 PM, Jeremy Fitzhardinge <jeremy@goop.org> wrote:
>> x86-64 can access the low half of any register, but i386 can only do
>> it with a subset of registers.  'r' causes compilation failures on i386,
>> but 'q' expresses the constraint properly.
>>
>> Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
>> Reported-by: Leigh Scott <leigh123linux@googlemail.com>
>> Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
>
> This should be CC'd to stable, given the bug shows up in 3.3, right?

Er.. this patch seems to have been lost in limbo.  Is anyone following
up on it?

josh

Re: [PATCH] Use correct byte-sized register constraint in __xchg_op()

[Thomas Reitmayr]

Hi Josh,
You are right, this bug also affects 3.3 and IMO should be fixed there,
too!
-Thomas

Am Donnerstag, den 05.04.2012, 16:27 -0400 schrieb Josh Boyer:
> On Tue, Apr 3, 2012 at 8:37 PM, Josh Boyer <jwboyer@gmail.com> wrote:
> > On Mon, Apr 2, 2012 at 7:15 PM, Jeremy Fitzhardinge <jeremy@goop.org> wrote:
> >> x86-64 can access the low half of any register, but i386 can only do
> >> it with a subset of registers.  'r' causes compilation failures on i386,
> >> but 'q' expresses the constraint properly.
> >>
> >> Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
> >> Reported-by: Leigh Scott <leigh123linux@googlemail.com>
> >> Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
> >
> > This should be CC'd to stable, given the bug shows up in 3.3, right?
> 
> Er.. this patch seems to have been lost in limbo.  Is anyone following
> up on it?
> 
> josh
> 

Re: [PATCH] Use correct byte-sized register constraint in __xchg_op()

[Jeremy Fitzhardinge]

PIng?

On 04/02/2012 04:15 PM, Jeremy Fitzhardinge wrote:
> x86-64 can access the low half of any register, but i386 can only do
> it with a subset of registers.  'r' causes compilation failures on i386,
> but 'q' expresses the constraint properly.
>
> Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
> Reported-by: Leigh Scott <leigh123linux@googlemail.com>
> Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
>
> diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
> index b3b7332..bc18d0e 100644
> --- a/arch/x86/include/asm/cmpxchg.h
> +++ b/arch/x86/include/asm/cmpxchg.h
> @@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
>  		switch (sizeof(*(ptr))) {				\
>  		case __X86_CASE_B:					\
>  			asm volatile (lock #op "b %b0, %1\n"		\
> -				      : "+r" (__ret), "+m" (*(ptr))	\
> +				      : "+q" (__ret), "+m" (*(ptr))	\
>  				      : : "memory", "cc");		\
>  			break;						\
>  		case __X86_CASE_W:					\
>
>
> --
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>

[tip:x86/urgent] x86: Use correct byte-sized register constraint in __xchg_op()

[tip-bot for Jeremy Fitzhardinge]

Commit-ID:  2ca052a3710fac208eee690faefdeb8bbd4586a1
Gitweb:     http://git.kernel.org/tip/2ca052a3710fac208eee690faefdeb8bbd4586a1
Author:     Jeremy Fitzhardinge <jeremy@goop.org>
AuthorDate: Mon, 2 Apr 2012 16:15:33 -0700
Committer:  H. Peter Anvin <hpa@zytor.com>
CommitDate: Fri, 6 Apr 2012 09:39:39 -0700

x86: Use correct byte-sized register constraint in __xchg_op()

x86-64 can access the low half of any register, but i386 can only do
it with a subset of registers.  'r' causes compilation failures on i386,
but 'q' expresses the constraint properly.

Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
Reported-by: Leigh Scott <leigh123linux@googlemail.com>
Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: <stable@vger.kernel.org> v3.3
---
 arch/x86/include/asm/cmpxchg.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index b3b7332..bc18d0e 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
 		switch (sizeof(*(ptr))) {				\
 		case __X86_CASE_B:					\
 			asm volatile (lock #op "b %b0, %1\n"		\
-				      : "+r" (__ret), "+m" (*(ptr))	\
+				      : "+q" (__ret), "+m" (*(ptr))	\
 				      : : "memory", "cc");		\
 			break;						\
 		case __X86_CASE_W:					\

[tip:x86/urgent] x86: Use correct byte-sized register constraint in __add()

[tip-bot for H. Peter Anvin]

Commit-ID:  8c91c5325e107ec17e40a59a47c6517387d64eb7
Gitweb:     http://git.kernel.org/tip/8c91c5325e107ec17e40a59a47c6517387d64eb7
Author:     H. Peter Anvin <hpa@zytor.com>
AuthorDate: Fri, 6 Apr 2012 09:30:57 -0700
Committer:  H. Peter Anvin <hpa@zytor.com>
CommitDate: Fri, 6 Apr 2012 09:40:07 -0700

x86: Use correct byte-sized register constraint in __add()

Similar to:

 2ca052a x86: Use correct byte-sized register constraint in __xchg_op()

... the __add() macro also needs to use a "q" constraint in the
byte-sized case, lest we try to generate an illegal register.

Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Leigh Scott <leigh123linux@googlemail.com>
Cc: Thomas Reitmayr <treitmayr@devbase.at>
Cc: <stable@vger.kernel.org> v3.3
---
 arch/x86/include/asm/cmpxchg.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index bc18d0e..99480e5 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -173,7 +173,7 @@ extern void __add_wrong_size(void)
 		switch (sizeof(*(ptr))) {				\
 		case __X86_CASE_B:					\
 			asm volatile (lock "addb %b1, %0\n"		\
-				      : "+m" (*(ptr)) : "ri" (inc)	\
+				      : "+m" (*(ptr)) : "qi" (inc)	\
 				      : "memory", "cc");		\
 			break;						\
 		case __X86_CASE_W:					\