From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Linus Walleij <linus.walleij@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Philipp Zabel <p.zabel@pengutronix.de>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Phil Edworthy <phil.edworthy@renesas.com>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH v3 4/5] gpio: gpiolib: Add ngirq member to struct gpio_irq_chip
Date: Wed, 18 May 2022 19:30:02 +0100 [thread overview]
Message-ID: <CA+V-a8uzaHr=gQ+b8JeqdsibKqQtiqGqVaxkeauu+6o-V3ki6g@mail.gmail.com> (raw)
In-Reply-To: <CAMuHMdUiq3svPa+OMmG70HP-3h4gKV6puoT8QUm3WgPw+e4i=A@mail.gmail.com>
Hi Geert,
Thank you for the review.
On Thu, May 12, 2022 at 8:29 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, May 11, 2022 at 8:32 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > Supported GPIO IRQs by the chip is not always equal to the number of GPIO
> > pins. For example on Renesas RZ/G2L SoC where it has GPIO0-122 pins but at
> > a give point a maximum of only 32 GPIO pins can be used as IRQ lines in
> > the IRQC domain.
> >
> > This patch adds ngirq member to struct gpio_irq_chip and passes this as a
> > size to irq_domain_create_hierarchy()/irq_domain_create_simple() if it is
> > being set in the driver otherwise fallbacks to using ngpio.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/gpio/gpiolib.c
> > +++ b/drivers/gpio/gpiolib.c
> > @@ -1221,7 +1221,7 @@ static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
> > gc->irq.domain = irq_domain_create_hierarchy(
> > gc->irq.parent_domain,
> > 0,
> > - gc->ngpio,
> > + gc->irq.ngirq ?: gc->ngpio,
> > gc->irq.fwnode,
> > &gc->irq.child_irq_domain_ops,
> > gc);
> > @@ -1574,7 +1574,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc,
> > } else {
> > /* Some drivers provide custom irqdomain ops */
> > gc->irq.domain = irq_domain_create_simple(fwnode,
> > - gc->ngpio,
> > + gc->irq.ngirq ?: gc->ngpio,
> > gc->irq.first,
> > gc->irq.domain_ops ?: &gpiochip_domain_ops,
> > gc);
>
> OK.
>
> gpiochip_irqchip_remove() does:
>
> /* Remove all IRQ mappings and delete the domain */
> if (gc->irq.domain) {
> unsigned int irq;
>
> for (offset = 0; offset < gc->ngpio; offset++) {
> if (!gpiochip_irqchip_irq_valid(gc, offset))
>
> Hence it relies on gc->irq.valid_mask, which I think is OK in general.
>
Agreed.
> continue;
>
> irq = irq_find_mapping(gc->irq.domain, offset);
> irq_dispose_mapping(irq);
> }
>
> irq_domain_remove(gc->irq.domain);
>
> }
>
> > --- a/include/linux/gpio/driver.h
> > +++ b/include/linux/gpio/driver.h
> > @@ -51,6 +51,14 @@ struct gpio_irq_chip {
> > */
> > const struct irq_domain_ops *domain_ops;
> >
> > + /**
> > + * @ngirq:
> > + *
> > + * The number of GPIO IRQ's handled by this IRQ domain; usually is
> > + * equal to ngpio.
>
> "If not set, ngpio will be used."
>
sure will update the comment.
Cheers,
Prabhakar
> > + */
> > + u16 ngirq;
> > +
> > #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
> > /**
> > * @fwnode:
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
next prev parent reply other threads:[~2022-05-18 18:30 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-11 18:32 [PATCH v3 0/5] Renesas RZ/G2L IRQC support Lad Prabhakar
2022-05-11 18:32 ` [PATCH v3 1/5] dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt Controller Lad Prabhakar
2022-05-12 6:14 ` Biju Das
2022-05-12 6:43 ` Geert Uytterhoeven
2022-05-12 17:58 ` Lad, Prabhakar
2022-05-11 18:32 ` [PATCH v3 2/5] irqchip: Add RZ/G2L IA55 Interrupt Controller driver Lad Prabhakar
2022-05-11 19:25 ` Biju Das
2022-05-12 18:01 ` Lad, Prabhakar
2022-05-12 7:05 ` Geert Uytterhoeven
2022-05-12 7:23 ` Marc Zyngier
2022-05-12 7:26 ` Geert Uytterhoeven
2022-05-12 18:08 ` Lad, Prabhakar
2022-05-11 18:32 ` [PATCH v3 3/5] gpio: gpiolib: Allow free() callback to be overridden Lad Prabhakar
2022-05-12 7:06 ` Geert Uytterhoeven
2022-05-12 11:19 ` Marc Zyngier
2022-05-12 12:48 ` Lad, Prabhakar
2022-05-12 13:24 ` Marc Zyngier
2022-05-12 13:50 ` Lad, Prabhakar
2022-05-12 16:26 ` Marc Zyngier
2022-05-12 17:55 ` Lad, Prabhakar
2022-05-12 22:24 ` Marc Zyngier
2022-05-11 18:32 ` [PATCH v3 4/5] gpio: gpiolib: Add ngirq member to struct gpio_irq_chip Lad Prabhakar
2022-05-12 7:29 ` Geert Uytterhoeven
2022-05-18 18:30 ` Lad, Prabhakar [this message]
2022-05-13 20:47 ` Linus Walleij
2022-05-18 18:36 ` Lad, Prabhakar
2022-05-19 13:21 ` Linus Walleij
2022-05-11 18:32 ` [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt Lad Prabhakar
2022-05-12 5:35 ` Biju Das
2022-05-12 17:43 ` Lad, Prabhakar
2022-05-12 17:59 ` Biju Das
2022-05-13 6:12 ` Biju Das
2022-05-13 13:42 ` Lad, Prabhakar
2022-05-12 7:39 ` Geert Uytterhoeven
2022-05-12 17:36 ` Lad, Prabhakar
2022-05-13 6:53 ` Geert Uytterhoeven
2022-05-13 13:55 ` Lad, Prabhakar
2022-05-13 14:29 ` Geert Uytterhoeven
2022-05-13 18:13 ` Lad, Prabhakar
2022-05-15 5:13 ` Biju Das
[not found] ` <87pmkfm0v3.wl-maz@kernel.org>
2022-05-16 7:20 ` Biju Das
[not found] ` <87pmkd6gda.wl-maz@kernel.org>
2022-05-16 8:33 ` Biju Das
[not found] ` <87o7zx6ckp.wl-maz@kernel.org>
2022-05-16 9:56 ` Biju Das
2022-05-16 7:13 ` Geert Uytterhoeven
2022-05-18 19:04 ` Lad, Prabhakar
2022-05-12 11:15 ` Marc Zyngier
2022-05-12 17:46 ` Lad, Prabhakar
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