From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Sibi Sankar <quic_sibis@quicinc.com>
Cc: sudeep.holla@arm.com, cristian.marussi@arm.com,
andersson@kernel.org, konrad.dybcio@linaro.org,
jassisinghbrar@gmail.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
quic_rgottimu@quicinc.com, quic_kshivnan@quicinc.com,
conor+dt@kernel.org
Subject: Re: [RFC 7/7] arm64: dts: qcom: x1e80100: Enable LLCC/DDR dvfs
Date: Wed, 17 Jan 2024 22:47:59 +0200 [thread overview]
Message-ID: <CAA8EJpo5F==whKMVFgPAM+=DpB+=KzPhKt-poGXuHxy-KSxe8Q@mail.gmail.com> (raw)
In-Reply-To: <20240117173458.2312669-8-quic_sibis@quicinc.com>
On Wed, 17 Jan 2024 at 19:37, Sibi Sankar <quic_sibis@quicinc.com> wrote:
>
> Enable LLCC/DDR dvfs through the Qualcomm's SCMI vendor protocol.
Could you please post DT bindings?
>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 48 ++++++++++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index 6856a206f7fc..3dc6f32fbb4c 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -329,6 +329,54 @@ scmi_dvfs: protocol@13 {
> reg = <0x13>;
> #clock-cells = <1>;
> };
> +
> + scmi_vendor: protocol@80 {
> + reg = <0x80>;
> +
> + memlat {
This doesn't look like a generic node name.
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + memory@0 {
> + reg = <0x0>; /* Memory Type DDR */
> + freq-table-khz = <200000 4224000>;
> +
> + monitor-0 {
> + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5 &CPU6 &CPU7 &CPU8 &CPU9 &CPU10 &CPU11>;
> + qcom,cpufreq-memfreq-tbl = < 999000 547000 >,
> + < 1440000 768000 >,
> + < 1671000 1555000 >,
> + < 2189000 2092000 >,
> + < 2156000 3187000 >,
> + < 3860000 4224000 >;
These tables should be rewritten as OPP tables.
> + };
> +
> + monitor-1 {
> + qcom,compute-mon;
> + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5 &CPU6 &CPU7 &CPU8 &CPU9 &CPU10 &CPU11>;
> + qcom,cpufreq-memfreq-tbl = < 1440000 200000 >,
> + < 2189000 768000 >,
> + < 2156000 1555000 >,
> + < 3860000 2092000 >;
> + };
> + };
> +
> + memory@1 {
> + reg = <0x1>; /* Memory Type LLCC */
> + freq-table-khz = <300000 1067000>;
> +
> + monitor-0 {
> + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5 &CPU6 &CPU7 &CPU8 &CPU9 &CPU10 &CPU11>;
> + qcom,cpufreq-memfreq-tbl = < 999000 300000 >,
> + < 1440000 466000 >,
> + < 1671000 600000 >,
> + < 2189000 806000 >,
> + < 2156000 933000 >,
> + < 3860000 1066000 >;
> + };
> + };
> + };
> + };
> };
> };
>
> --
> 2.34.1
>
>
--
With best wishes
Dmitry
next prev parent reply other threads:[~2024-01-17 20:48 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-17 17:34 [RFC 0/7] firmware: arm_scmi: Qualcomm Vendor Protocol Sibi Sankar
2024-01-17 17:34 ` [RFC 1/7] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings Sibi Sankar
2024-01-17 19:53 ` Konrad Dybcio
2024-02-08 10:22 ` Sibi Sankar
2024-02-08 23:14 ` Konrad Dybcio
2024-02-12 5:48 ` Sibi Sankar
2024-01-30 17:12 ` Rob Herring
2024-02-08 10:28 ` Sibi Sankar
2024-02-08 15:58 ` Krzysztof Kozlowski
2024-02-28 17:37 ` Konrad Dybcio
2024-01-17 17:34 ` [RFC 2/7] mailbox: Add support for QTI CPUCP mailbox controller Sibi Sankar
2024-01-17 19:03 ` Dmitry Baryshkov
2024-01-17 17:34 ` [RFC 3/7] firmware: arm_scmi: Add QCOM vendor protocol Sibi Sankar
2024-01-17 19:09 ` Dmitry Baryshkov
2024-02-12 8:31 ` Sibi Sankar
2024-01-17 20:15 ` Konrad Dybcio
2024-01-17 20:31 ` Cristian Marussi
2024-02-08 11:44 ` Sibi Sankar
2024-02-09 22:45 ` Konrad Dybcio
2024-02-12 8:56 ` Sibi Sankar
2024-01-17 20:15 ` Konrad Dybcio
2024-01-18 17:22 ` Sudeep Holla
2024-02-12 9:14 ` Sibi Sankar
2024-02-12 17:39 ` Cristian Marussi
2024-02-29 14:16 ` Sudeep Holla
2024-02-29 14:24 ` Sudeep Holla
2024-01-17 17:34 ` [RFC 4/7] soc: qcom: Utilize qcom scmi vendor protocol for bus dvfs Sibi Sankar
2024-01-17 20:28 ` Konrad Dybcio
2024-02-12 10:33 ` Sibi Sankar
2024-01-17 20:41 ` Dmitry Baryshkov
2024-02-12 10:24 ` Sibi Sankar
2024-02-12 13:22 ` Dmitry Baryshkov
2024-02-20 15:07 ` Cristian Marussi
2024-02-28 17:31 ` Sibi Sankar
2024-02-29 14:27 ` Sudeep Holla
2024-02-20 16:19 ` Cristian Marussi
2024-02-29 14:41 ` Sudeep Holla
2024-01-17 17:34 ` [RFC 5/7] arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes Sibi Sankar
2024-01-17 17:34 ` [RFC 6/7] arm64: dts: qcom: x1e80100: Enable cpufreq Sibi Sankar
2024-01-18 15:25 ` Sudeep Holla
2024-02-12 9:28 ` Sibi Sankar
2024-01-17 17:34 ` [RFC 7/7] arm64: dts: qcom: x1e80100: Enable LLCC/DDR dvfs Sibi Sankar
2024-01-17 20:38 ` Konrad Dybcio
2024-02-12 10:05 ` Sibi Sankar
2024-01-17 20:47 ` Dmitry Baryshkov [this message]
2024-02-12 9:47 ` Sibi Sankar
2024-02-12 18:11 ` [RFC 0/7] firmware: arm_scmi: Qualcomm Vendor Protocol Cristian Marussi
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