* [PATCH v6 1/4] dt-bindings: clock: add pcm reset for ipq806x lcc
@ 2022-07-23 14:55 Christian Marangi
2022-07-23 14:55 ` [PATCH v6 2/4] clk: qcom: lcc-ipq806x: add reset definition Christian Marangi
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Christian Marangi @ 2022-07-23 14:55 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
linux-clk, linux-kernel, devicetree
Cc: Christian Marangi, Dmitry Baryshkov, Rob Herring
Add pcm reset define for ipq806x lcc.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
v3:
- Added review tag
- Added ack tag
v2:
- Fix Sob tag
include/dt-bindings/clock/qcom,lcc-ipq806x.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,lcc-ipq806x.h b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
index 25b92bbf0ab4..e0fb4acf4ba8 100644
--- a/include/dt-bindings/clock/qcom,lcc-ipq806x.h
+++ b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
@@ -19,4 +19,6 @@
#define SPDIF_CLK 10
#define AHBIX_CLK 11
+#define LCC_PCM_RESET 0
+
#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v6 2/4] clk: qcom: lcc-ipq806x: add reset definition
2022-07-23 14:55 [PATCH v6 1/4] dt-bindings: clock: add pcm reset for ipq806x lcc Christian Marangi
@ 2022-07-23 14:55 ` Christian Marangi
2022-07-23 14:55 ` [PATCH v6 3/4] clk: qcom: lcc-ipq806x: convert to parent data Christian Marangi
2022-07-23 14:55 ` [PATCH v6 4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents Christian Marangi
2 siblings, 0 replies; 6+ messages in thread
From: Christian Marangi @ 2022-07-23 14:55 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
linux-clk, linux-kernel, devicetree
Cc: Christian Marangi, Dmitry Baryshkov
Add reset definition for lcc-ipq806x.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v3:
- Added review tag
v2:
- Fix Sob tag
drivers/clk/qcom/lcc-ipq806x.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
index 1a2be4aeb31d..ba90bebba597 100644
--- a/drivers/clk/qcom/lcc-ipq806x.c
+++ b/drivers/clk/qcom/lcc-ipq806x.c
@@ -22,6 +22,7 @@
#include "clk-branch.h"
#include "clk-regmap-divider.h"
#include "clk-regmap-mux.h"
+#include "reset.h"
static struct clk_pll pll4 = {
.l_reg = 0x4,
@@ -405,6 +406,10 @@ static struct clk_regmap *lcc_ipq806x_clks[] = {
[AHBIX_CLK] = &ahbix_clk.clkr,
};
+static const struct qcom_reset_map lcc_ipq806x_resets[] = {
+ [LCC_PCM_RESET] = { 0x54, 13 },
+};
+
static const struct regmap_config lcc_ipq806x_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
@@ -417,6 +422,8 @@ static const struct qcom_cc_desc lcc_ipq806x_desc = {
.config = &lcc_ipq806x_regmap_config,
.clks = lcc_ipq806x_clks,
.num_clks = ARRAY_SIZE(lcc_ipq806x_clks),
+ .resets = lcc_ipq806x_resets,
+ .num_resets = ARRAY_SIZE(lcc_ipq806x_resets),
};
static const struct of_device_id lcc_ipq806x_match_table[] = {
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v6 3/4] clk: qcom: lcc-ipq806x: convert to parent data
2022-07-23 14:55 [PATCH v6 1/4] dt-bindings: clock: add pcm reset for ipq806x lcc Christian Marangi
2022-07-23 14:55 ` [PATCH v6 2/4] clk: qcom: lcc-ipq806x: add reset definition Christian Marangi
@ 2022-07-23 14:55 ` Christian Marangi
2022-07-23 15:17 ` Dmitry Baryshkov
2022-07-23 14:55 ` [PATCH v6 4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents Christian Marangi
2 siblings, 1 reply; 6+ messages in thread
From: Christian Marangi @ 2022-07-23 14:55 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
linux-clk, linux-kernel, devicetree
Cc: Christian Marangi
Convert lcc-ipq806x driver to parent_data API.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
v6:
- Split to separate patch for ARRAY_SIZE
- Rename .name to pxo_board
- Drop _clk from .fw_name
v5:
- Fix the same compilation error (don't know what the hell happen
to my buildroot)
v4:
- Fix compilation error
v3:
- Inline pxo pll4 parent
- Change .name from pxo to pxo_board
drivers/clk/qcom/lcc-ipq806x.c | 69 +++++++++++++++++++---------------
1 file changed, 38 insertions(+), 31 deletions(-)
diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
index ba90bebba597..1833e59a6434 100644
--- a/drivers/clk/qcom/lcc-ipq806x.c
+++ b/drivers/clk/qcom/lcc-ipq806x.c
@@ -34,7 +34,9 @@ static struct clk_pll pll4 = {
.status_bit = 16,
.clkr.hw.init = &(struct clk_init_data){
.name = "pll4",
- .parent_names = (const char *[]){ "pxo" },
+ .parent_data = &(const struct clk_parent_data) {
+ .fw_name = "pxo", .name = "pxo_board",
+ },
.num_parents = 1,
.ops = &clk_pll_ops,
},
@@ -64,9 +66,9 @@ static const struct parent_map lcc_pxo_pll4_map[] = {
{ P_PLL4, 2 }
};
-static const char * const lcc_pxo_pll4[] = {
- "pxo",
- "pll4_vote",
+static const struct clk_parent_data lcc_pxo_pll4[] = {
+ { .fw_name = "pxo", .name = "pxo_board" },
+ { .fw_name = "pll4_vote", .name = "pll4_vote" },
};
static struct freq_tbl clk_tbl_aif_mi2s[] = {
@@ -131,7 +133,7 @@ static struct clk_rcg mi2s_osr_src = {
.enable_mask = BIT(9),
.hw.init = &(struct clk_init_data){
.name = "mi2s_osr_src",
- .parent_names = lcc_pxo_pll4,
+ .parent_data = lcc_pxo_pll4,
.num_parents = 2,
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
@@ -139,10 +141,6 @@ static struct clk_rcg mi2s_osr_src = {
},
};
-static const char * const lcc_mi2s_parents[] = {
- "mi2s_osr_src",
-};
-
static struct clk_branch mi2s_osr_clk = {
.halt_reg = 0x50,
.halt_bit = 1,
@@ -152,7 +150,9 @@ static struct clk_branch mi2s_osr_clk = {
.enable_mask = BIT(17),
.hw.init = &(struct clk_init_data){
.name = "mi2s_osr_clk",
- .parent_names = lcc_mi2s_parents,
+ .parent_hws = (const struct clk_hw*[]) {
+ &mi2s_osr_src.clkr.hw,
+ },
.num_parents = 1,
.ops = &clk_branch_ops,
.flags = CLK_SET_RATE_PARENT,
@@ -167,7 +167,9 @@ static struct clk_regmap_div mi2s_div_clk = {
.clkr = {
.hw.init = &(struct clk_init_data){
.name = "mi2s_div_clk",
- .parent_names = lcc_mi2s_parents,
+ .parent_hws = (const struct clk_hw*[]) {
+ &mi2s_osr_src.clkr.hw,
+ },
.num_parents = 1,
.ops = &clk_regmap_div_ops,
},
@@ -183,7 +185,9 @@ static struct clk_branch mi2s_bit_div_clk = {
.enable_mask = BIT(15),
.hw.init = &(struct clk_init_data){
.name = "mi2s_bit_div_clk",
- .parent_names = (const char *[]){ "mi2s_div_clk" },
+ .parent_hws = (const struct clk_hw*[]) {
+ &mi2s_div_clk.clkr.hw,
+ },
.num_parents = 1,
.ops = &clk_branch_ops,
.flags = CLK_SET_RATE_PARENT,
@@ -191,6 +195,10 @@ static struct clk_branch mi2s_bit_div_clk = {
},
};
+static const struct clk_parent_data lcc_mi2s_bit_div_codec_clk[] = {
+ { .hw = &mi2s_bit_div_clk.clkr.hw, },
+ { .fw_name = "mi2s_codec", .name = "mi2s_codec_clk" },
+};
static struct clk_regmap_mux mi2s_bit_clk = {
.reg = 0x48,
@@ -199,11 +207,8 @@ static struct clk_regmap_mux mi2s_bit_clk = {
.clkr = {
.hw.init = &(struct clk_init_data){
.name = "mi2s_bit_clk",
- .parent_names = (const char *[]){
- "mi2s_bit_div_clk",
- "mi2s_codec_clk",
- },
- .num_parents = 2,
+ .parent_data = lcc_mi2s_bit_div_codec_clk,
+ .num_parents = ARRAY_SIZE(lcc_mi2s_bit_div_codec_clk),
.ops = &clk_regmap_mux_closest_ops,
.flags = CLK_SET_RATE_PARENT,
},
@@ -245,7 +250,7 @@ static struct clk_rcg pcm_src = {
.enable_mask = BIT(9),
.hw.init = &(struct clk_init_data){
.name = "pcm_src",
- .parent_names = lcc_pxo_pll4,
+ .parent_data = lcc_pxo_pll4,
.num_parents = 2,
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
@@ -262,7 +267,9 @@ static struct clk_branch pcm_clk_out = {
.enable_mask = BIT(11),
.hw.init = &(struct clk_init_data){
.name = "pcm_clk_out",
- .parent_names = (const char *[]){ "pcm_src" },
+ .parent_hws = (const struct clk_hw*[]) {
+ &pcm_src.clkr.hw,
+ },
.num_parents = 1,
.ops = &clk_branch_ops,
.flags = CLK_SET_RATE_PARENT,
@@ -270,6 +277,11 @@ static struct clk_branch pcm_clk_out = {
},
};
+static const struct clk_parent_data lcc_pcm_clk_out_codec_clk[] = {
+ { .hw = &pcm_clk_out.clkr.hw, },
+ { .fw_name = "pcm_codec_clk", .name = "pcm_codec_clk" },
+};
+
static struct clk_regmap_mux pcm_clk = {
.reg = 0x54,
.shift = 10,
@@ -277,11 +289,8 @@ static struct clk_regmap_mux pcm_clk = {
.clkr = {
.hw.init = &(struct clk_init_data){
.name = "pcm_clk",
- .parent_names = (const char *[]){
- "pcm_clk_out",
- "pcm_codec_clk",
- },
- .num_parents = 2,
+ .parent_data = lcc_pcm_clk_out_codec_clk,
+ .num_parents = ARRAY_SIZE(lcc_pcm_clk_out_codec_clk),
.ops = &clk_regmap_mux_closest_ops,
.flags = CLK_SET_RATE_PARENT,
},
@@ -325,7 +334,7 @@ static struct clk_rcg spdif_src = {
.enable_mask = BIT(9),
.hw.init = &(struct clk_init_data){
.name = "spdif_src",
- .parent_names = lcc_pxo_pll4,
+ .parent_data = lcc_pxo_pll4,
.num_parents = 2,
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
@@ -333,10 +342,6 @@ static struct clk_rcg spdif_src = {
},
};
-static const char * const lcc_spdif_parents[] = {
- "spdif_src",
-};
-
static struct clk_branch spdif_clk = {
.halt_reg = 0xd4,
.halt_bit = 1,
@@ -346,7 +351,9 @@ static struct clk_branch spdif_clk = {
.enable_mask = BIT(12),
.hw.init = &(struct clk_init_data){
.name = "spdif_clk",
- .parent_names = lcc_spdif_parents,
+ .parent_hws = (const struct clk_hw*[]) {
+ &spdif_src.clkr.hw,
+ },
.num_parents = 1,
.ops = &clk_branch_ops,
.flags = CLK_SET_RATE_PARENT,
@@ -384,7 +391,7 @@ static struct clk_rcg ahbix_clk = {
.enable_mask = BIT(11),
.hw.init = &(struct clk_init_data){
.name = "ahbix",
- .parent_names = lcc_pxo_pll4,
+ .parent_data = lcc_pxo_pll4,
.num_parents = 2,
.ops = &clk_rcg_lcc_ops,
},
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v6 4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents
2022-07-23 14:55 [PATCH v6 1/4] dt-bindings: clock: add pcm reset for ipq806x lcc Christian Marangi
2022-07-23 14:55 ` [PATCH v6 2/4] clk: qcom: lcc-ipq806x: add reset definition Christian Marangi
2022-07-23 14:55 ` [PATCH v6 3/4] clk: qcom: lcc-ipq806x: convert to parent data Christian Marangi
@ 2022-07-23 14:55 ` Christian Marangi
2022-07-23 15:16 ` Dmitry Baryshkov
2 siblings, 1 reply; 6+ messages in thread
From: Christian Marangi @ 2022-07-23 14:55 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
linux-clk, linux-kernel, devicetree
Cc: Christian Marangi
Use ARRAY_SIZE for num_parents instead of raw number to prevent any
confusion/mistake.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/clk/qcom/lcc-ipq806x.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
index 1833e59a6434..81a44a9a9abc 100644
--- a/drivers/clk/qcom/lcc-ipq806x.c
+++ b/drivers/clk/qcom/lcc-ipq806x.c
@@ -134,7 +134,7 @@ static struct clk_rcg mi2s_osr_src = {
.hw.init = &(struct clk_init_data){
.name = "mi2s_osr_src",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
},
@@ -251,7 +251,7 @@ static struct clk_rcg pcm_src = {
.hw.init = &(struct clk_init_data){
.name = "pcm_src",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
},
@@ -335,7 +335,7 @@ static struct clk_rcg spdif_src = {
.hw.init = &(struct clk_init_data){
.name = "spdif_src",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
},
@@ -392,7 +392,7 @@ static struct clk_rcg ahbix_clk = {
.hw.init = &(struct clk_init_data){
.name = "ahbix",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_lcc_ops,
},
},
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v6 4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents
2022-07-23 14:55 ` [PATCH v6 4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents Christian Marangi
@ 2022-07-23 15:16 ` Dmitry Baryshkov
0 siblings, 0 replies; 6+ messages in thread
From: Dmitry Baryshkov @ 2022-07-23 15:16 UTC (permalink / raw)
To: Christian Marangi
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
linux-clk, linux-kernel, devicetree
On Sat, 23 Jul 2022 at 17:56, Christian Marangi <ansuelsmth@gmail.com> wrote:
>
> Use ARRAY_SIZE for num_parents instead of raw number to prevent any
> confusion/mistake.
>
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 3/4] clk: qcom: lcc-ipq806x: convert to parent data
2022-07-23 14:55 ` [PATCH v6 3/4] clk: qcom: lcc-ipq806x: convert to parent data Christian Marangi
@ 2022-07-23 15:17 ` Dmitry Baryshkov
0 siblings, 0 replies; 6+ messages in thread
From: Dmitry Baryshkov @ 2022-07-23 15:17 UTC (permalink / raw)
To: Christian Marangi
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
linux-clk, linux-kernel, devicetree
On Sat, 23 Jul 2022 at 17:56, Christian Marangi <ansuelsmth@gmail.com> wrote:
>
> Convert lcc-ipq806x driver to parent_data API.
Please mention using "pxo_board" rather than "pxo".
With that fixed:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> ---
> v6:
> - Split to separate patch for ARRAY_SIZE
> - Rename .name to pxo_board
> - Drop _clk from .fw_name
> v5:
> - Fix the same compilation error (don't know what the hell happen
> to my buildroot)
> v4:
> - Fix compilation error
> v3:
> - Inline pxo pll4 parent
> - Change .name from pxo to pxo_board
>
> drivers/clk/qcom/lcc-ipq806x.c | 69 +++++++++++++++++++---------------
> 1 file changed, 38 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
> index ba90bebba597..1833e59a6434 100644
> --- a/drivers/clk/qcom/lcc-ipq806x.c
> +++ b/drivers/clk/qcom/lcc-ipq806x.c
> @@ -34,7 +34,9 @@ static struct clk_pll pll4 = {
> .status_bit = 16,
> .clkr.hw.init = &(struct clk_init_data){
> .name = "pll4",
> - .parent_names = (const char *[]){ "pxo" },
> + .parent_data = &(const struct clk_parent_data) {
> + .fw_name = "pxo", .name = "pxo_board",
> + },
> .num_parents = 1,
> .ops = &clk_pll_ops,
> },
> @@ -64,9 +66,9 @@ static const struct parent_map lcc_pxo_pll4_map[] = {
> { P_PLL4, 2 }
> };
>
> -static const char * const lcc_pxo_pll4[] = {
> - "pxo",
> - "pll4_vote",
> +static const struct clk_parent_data lcc_pxo_pll4[] = {
> + { .fw_name = "pxo", .name = "pxo_board" },
> + { .fw_name = "pll4_vote", .name = "pll4_vote" },
> };
>
> static struct freq_tbl clk_tbl_aif_mi2s[] = {
> @@ -131,7 +133,7 @@ static struct clk_rcg mi2s_osr_src = {
> .enable_mask = BIT(9),
> .hw.init = &(struct clk_init_data){
> .name = "mi2s_osr_src",
> - .parent_names = lcc_pxo_pll4,
> + .parent_data = lcc_pxo_pll4,
> .num_parents = 2,
> .ops = &clk_rcg_ops,
> .flags = CLK_SET_RATE_GATE,
> @@ -139,10 +141,6 @@ static struct clk_rcg mi2s_osr_src = {
> },
> };
>
> -static const char * const lcc_mi2s_parents[] = {
> - "mi2s_osr_src",
> -};
> -
> static struct clk_branch mi2s_osr_clk = {
> .halt_reg = 0x50,
> .halt_bit = 1,
> @@ -152,7 +150,9 @@ static struct clk_branch mi2s_osr_clk = {
> .enable_mask = BIT(17),
> .hw.init = &(struct clk_init_data){
> .name = "mi2s_osr_clk",
> - .parent_names = lcc_mi2s_parents,
> + .parent_hws = (const struct clk_hw*[]) {
> + &mi2s_osr_src.clkr.hw,
> + },
> .num_parents = 1,
> .ops = &clk_branch_ops,
> .flags = CLK_SET_RATE_PARENT,
> @@ -167,7 +167,9 @@ static struct clk_regmap_div mi2s_div_clk = {
> .clkr = {
> .hw.init = &(struct clk_init_data){
> .name = "mi2s_div_clk",
> - .parent_names = lcc_mi2s_parents,
> + .parent_hws = (const struct clk_hw*[]) {
> + &mi2s_osr_src.clkr.hw,
> + },
> .num_parents = 1,
> .ops = &clk_regmap_div_ops,
> },
> @@ -183,7 +185,9 @@ static struct clk_branch mi2s_bit_div_clk = {
> .enable_mask = BIT(15),
> .hw.init = &(struct clk_init_data){
> .name = "mi2s_bit_div_clk",
> - .parent_names = (const char *[]){ "mi2s_div_clk" },
> + .parent_hws = (const struct clk_hw*[]) {
> + &mi2s_div_clk.clkr.hw,
> + },
> .num_parents = 1,
> .ops = &clk_branch_ops,
> .flags = CLK_SET_RATE_PARENT,
> @@ -191,6 +195,10 @@ static struct clk_branch mi2s_bit_div_clk = {
> },
> };
>
> +static const struct clk_parent_data lcc_mi2s_bit_div_codec_clk[] = {
> + { .hw = &mi2s_bit_div_clk.clkr.hw, },
> + { .fw_name = "mi2s_codec", .name = "mi2s_codec_clk" },
> +};
>
> static struct clk_regmap_mux mi2s_bit_clk = {
> .reg = 0x48,
> @@ -199,11 +207,8 @@ static struct clk_regmap_mux mi2s_bit_clk = {
> .clkr = {
> .hw.init = &(struct clk_init_data){
> .name = "mi2s_bit_clk",
> - .parent_names = (const char *[]){
> - "mi2s_bit_div_clk",
> - "mi2s_codec_clk",
> - },
> - .num_parents = 2,
> + .parent_data = lcc_mi2s_bit_div_codec_clk,
> + .num_parents = ARRAY_SIZE(lcc_mi2s_bit_div_codec_clk),
> .ops = &clk_regmap_mux_closest_ops,
> .flags = CLK_SET_RATE_PARENT,
> },
> @@ -245,7 +250,7 @@ static struct clk_rcg pcm_src = {
> .enable_mask = BIT(9),
> .hw.init = &(struct clk_init_data){
> .name = "pcm_src",
> - .parent_names = lcc_pxo_pll4,
> + .parent_data = lcc_pxo_pll4,
> .num_parents = 2,
> .ops = &clk_rcg_ops,
> .flags = CLK_SET_RATE_GATE,
> @@ -262,7 +267,9 @@ static struct clk_branch pcm_clk_out = {
> .enable_mask = BIT(11),
> .hw.init = &(struct clk_init_data){
> .name = "pcm_clk_out",
> - .parent_names = (const char *[]){ "pcm_src" },
> + .parent_hws = (const struct clk_hw*[]) {
> + &pcm_src.clkr.hw,
> + },
> .num_parents = 1,
> .ops = &clk_branch_ops,
> .flags = CLK_SET_RATE_PARENT,
> @@ -270,6 +277,11 @@ static struct clk_branch pcm_clk_out = {
> },
> };
>
> +static const struct clk_parent_data lcc_pcm_clk_out_codec_clk[] = {
> + { .hw = &pcm_clk_out.clkr.hw, },
> + { .fw_name = "pcm_codec_clk", .name = "pcm_codec_clk" },
> +};
> +
> static struct clk_regmap_mux pcm_clk = {
> .reg = 0x54,
> .shift = 10,
> @@ -277,11 +289,8 @@ static struct clk_regmap_mux pcm_clk = {
> .clkr = {
> .hw.init = &(struct clk_init_data){
> .name = "pcm_clk",
> - .parent_names = (const char *[]){
> - "pcm_clk_out",
> - "pcm_codec_clk",
> - },
> - .num_parents = 2,
> + .parent_data = lcc_pcm_clk_out_codec_clk,
> + .num_parents = ARRAY_SIZE(lcc_pcm_clk_out_codec_clk),
> .ops = &clk_regmap_mux_closest_ops,
> .flags = CLK_SET_RATE_PARENT,
> },
> @@ -325,7 +334,7 @@ static struct clk_rcg spdif_src = {
> .enable_mask = BIT(9),
> .hw.init = &(struct clk_init_data){
> .name = "spdif_src",
> - .parent_names = lcc_pxo_pll4,
> + .parent_data = lcc_pxo_pll4,
> .num_parents = 2,
> .ops = &clk_rcg_ops,
> .flags = CLK_SET_RATE_GATE,
> @@ -333,10 +342,6 @@ static struct clk_rcg spdif_src = {
> },
> };
>
> -static const char * const lcc_spdif_parents[] = {
> - "spdif_src",
> -};
> -
> static struct clk_branch spdif_clk = {
> .halt_reg = 0xd4,
> .halt_bit = 1,
> @@ -346,7 +351,9 @@ static struct clk_branch spdif_clk = {
> .enable_mask = BIT(12),
> .hw.init = &(struct clk_init_data){
> .name = "spdif_clk",
> - .parent_names = lcc_spdif_parents,
> + .parent_hws = (const struct clk_hw*[]) {
> + &spdif_src.clkr.hw,
> + },
> .num_parents = 1,
> .ops = &clk_branch_ops,
> .flags = CLK_SET_RATE_PARENT,
> @@ -384,7 +391,7 @@ static struct clk_rcg ahbix_clk = {
> .enable_mask = BIT(11),
> .hw.init = &(struct clk_init_data){
> .name = "ahbix",
> - .parent_names = lcc_pxo_pll4,
> + .parent_data = lcc_pxo_pll4,
> .num_parents = 2,
> .ops = &clk_rcg_lcc_ops,
> },
> --
> 2.36.1
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-07-23 15:18 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-07-23 14:55 [PATCH v6 1/4] dt-bindings: clock: add pcm reset for ipq806x lcc Christian Marangi
2022-07-23 14:55 ` [PATCH v6 2/4] clk: qcom: lcc-ipq806x: add reset definition Christian Marangi
2022-07-23 14:55 ` [PATCH v6 3/4] clk: qcom: lcc-ipq806x: convert to parent data Christian Marangi
2022-07-23 15:17 ` Dmitry Baryshkov
2022-07-23 14:55 ` [PATCH v6 4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents Christian Marangi
2022-07-23 15:16 ` Dmitry Baryshkov
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