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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Vinod Polimera <quic_vpolimer@quicinc.com>
Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
	freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, robdclark@gmail.com,
	dianders@chromium.org, swboyd@chromium.org,
	quic_kalyant@quicinc.com
Subject: Re: [PATCH v5 5/5] drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe
Date: Tue, 8 Mar 2022 20:09:35 +0300	[thread overview]
Message-ID: <CAA8EJprgJvOGCU_PvAHCNoMvSam8QV4x9N2ZEm+oer5d7B-cPA@mail.gmail.com> (raw)
In-Reply-To: <1646758500-3776-6-git-send-email-quic_vpolimer@quicinc.com>

On Tue, 8 Mar 2022 at 19:55, Vinod Polimera <quic_vpolimer@quicinc.com> wrote:
>
> use max clock during probe/bind sequence from the opp table.
> The clock will be scaled down when framework sends an update.
>
> Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index d550f90..d9922b9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -1221,6 +1221,7 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
>         struct dpu_kms *dpu_kms;
>         struct dss_module_power *mp;
>         int ret = 0;
> +       unsigned long max_freq = ULONG_MAX;
>
>         dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
>         if (!dpu_kms)
> @@ -1243,6 +1244,8 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
>                 return ret;
>         }
>
> +       dev_pm_opp_find_freq_floor(dev, &max_freq);

You leak a reference to the opp here. The function returns a value,
which should be dev_pm_opp_put().
Moreover judging from the dev_pm_opp_set_rate() code I think you don't
have to find an exact frequency, as it will call
clk_round_rate()/_find_freq_ceil() anyway.
Could you please check that it works?

> +       dev_pm_opp_set_rate(dev, max_freq);
>         platform_set_drvdata(pdev, dpu_kms);
>
>         ret = msm_kms_init(&dpu_kms->base, &kms_funcs);
> --
> 2.7.4
>


-- 
With best wishes
Dmitry

  reply	other threads:[~2022-03-08 17:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-08 16:54 [PATCH v5 0/5] Update mdp clk to max supported value to support higher refresh rates Vinod Polimera
2022-03-08 16:54 ` [PATCH v5 1/5] arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk Vinod Polimera
2022-03-08 20:05   ` Stephen Boyd
2022-03-11  8:06     ` Vinod Polimera
2022-03-11  9:22       ` Dmitry Baryshkov
2022-03-14 13:57         ` Doug Anderson
2022-03-14 14:55           ` Vinod Polimera
2022-03-12 17:36   ` Bjorn Andersson
2022-03-08 16:54 ` [PATCH v5 2/5] arm64/dts/qcom/sc7180: " Vinod Polimera
2022-03-08 16:54 ` [PATCH v5 3/5] arm64/dts/qcom/sdm845: " Vinod Polimera
2022-03-08 16:54 ` [PATCH v5 4/5] arm64/dts/qcom/sm8250: " Vinod Polimera
2022-03-08 16:55 ` [PATCH v5 5/5] drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe Vinod Polimera
2022-03-08 17:09   ` Dmitry Baryshkov [this message]
2022-03-14 14:49     ` Vinod Polimera
2022-03-09 19:25   ` Doug Anderson
2022-03-14 14:51     ` Vinod Polimera

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