From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Vinod Polimera <quic_vpolimer@quicinc.com>
Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, robdclark@gmail.com,
dianders@chromium.org, swboyd@chromium.org,
quic_kalyant@quicinc.com
Subject: Re: [PATCH v5 1/5] arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk
Date: Sat, 12 Mar 2022 11:36:26 -0600 [thread overview]
Message-ID: <YizaGgCLxH0D9MRF@builder.lan> (raw)
In-Reply-To: <1646758500-3776-2-git-send-email-quic_vpolimer@quicinc.com>
On Tue 08 Mar 10:54 CST 2022, Vinod Polimera wrote:
Please run:
git log --oneline --no-decorate -- arch/arm64/boot/dts/qcom/sc7280.dtsi
and make sure your $subject is prefixed according to all other
sc7280-specific changes.
> Kernel clock driver assumes that initial rate is the
> max rate for that clock and was not allowing it to scale
> beyond the assigned clock value.
>
> Drop the assigned clock rate property and vote on the mdp clock as per
> calculated value during the usecase.
>
> Changes in v2:
> - Remove assigned-clock-rate property and set mdp clk during resume sequence.
> - Add fixes tag.
>
> Changes in v3:
> - Remove extra line after fixes tag.(Stephen Boyd)
It's only in drivers/drm that the changelog goes in the commit message,
so please move this below the ---.
Thanks,
Bjorn
>
> Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes")
> Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++-------
> 1 file changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index baf1653..408cf6c 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2856,9 +2856,6 @@
> "ahb",
> "core";
>
> - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
> - assigned-clock-rates = <300000000>;
> -
> interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-controller;
> #interrupt-cells = <1>;
> @@ -2892,11 +2889,9 @@
> "lut",
> "core",
> "vsync";
> - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
> - <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
> + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
> <&dispcc DISP_CC_MDSS_AHB_CLK>;
> - assigned-clock-rates = <300000000>,
> - <19200000>,
> + assigned-clock-rates = <19200000>,
> <19200000>;
> operating-points-v2 = <&mdp_opp_table>;
> power-domains = <&rpmhpd SC7280_CX>;
> --
> 2.7.4
>
next prev parent reply other threads:[~2022-03-12 17:36 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-08 16:54 [PATCH v5 0/5] Update mdp clk to max supported value to support higher refresh rates Vinod Polimera
2022-03-08 16:54 ` [PATCH v5 1/5] arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk Vinod Polimera
2022-03-08 20:05 ` Stephen Boyd
2022-03-11 8:06 ` Vinod Polimera
2022-03-11 9:22 ` Dmitry Baryshkov
2022-03-14 13:57 ` Doug Anderson
2022-03-14 14:55 ` Vinod Polimera
2022-03-12 17:36 ` Bjorn Andersson [this message]
2022-03-08 16:54 ` [PATCH v5 2/5] arm64/dts/qcom/sc7180: " Vinod Polimera
2022-03-08 16:54 ` [PATCH v5 3/5] arm64/dts/qcom/sdm845: " Vinod Polimera
2022-03-08 16:54 ` [PATCH v5 4/5] arm64/dts/qcom/sm8250: " Vinod Polimera
2022-03-08 16:55 ` [PATCH v5 5/5] drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe Vinod Polimera
2022-03-08 17:09 ` Dmitry Baryshkov
2022-03-14 14:49 ` Vinod Polimera
2022-03-09 19:25 ` Doug Anderson
2022-03-14 14:51 ` Vinod Polimera
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