* Re: [PATCH v6 06/16] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1
[not found] ` <20211004062140.29803-7-nancy.lin@mediatek.com>
@ 2021-10-14 14:52 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 6+ messages in thread
From: AngeloGioacchino Del Regno @ 2021-10-14 14:52 UTC (permalink / raw)
To: Nancy.Lin, CK Hu
Cc: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Rob Herring, Matthias Brugger, jason-jh . lin, Yongqiang Niu,
dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, singo.chang, srv_heupstream
> Add mt8195 vdosys1 clock driver name and routing table to
> the driver data of mtk-mmsys.
>
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> ---
> drivers/soc/mediatek/mt8195-mmsys.h | 136 +++++++++++++++++++++++++
> drivers/soc/mediatek/mtk-mmsys.c | 10 ++
> include/linux/soc/mediatek/mtk-mmsys.h | 2 +
> 3 files changed, 148 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h
> index 0c97a5f016c1..f19ec72c1243 100644
> --- a/drivers/soc/mediatek/mt8195-mmsys.h
> +++ b/drivers/soc/mediatek/mt8195-mmsys.h
> @@ -59,6 +59,70 @@
> #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 (2 << 16)
> #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE (3 << 16)
>
> +#define MT8195_VDO1_VPP_MERGE0_P0_SEL_IN 0xf04
> +#define MT8195_VPP_MERGE0_P0_SEL_IN_FROM_MDP_RDMA0 (1 << 0)
There is no bitshifting action here: this is simply 1.
> +
> +#define MT8195_VDO1_VPP_MERGE0_P1_SEL_IN 0xf08
> +#define MT8195_VPP_MERGE0_P1_SEL_IN_FROM_MDP_RDMA1 (1 << 0)
Same here.
> +
> +#define MT8195_VDO1_DISP_DPI1_SEL_IN 0xf10
> +#define MT8195_DISP_DPI1_SEL_IN_FROM_VPP_MERGE4_MOUT (0 << 0)
And this is 0.
> +
> +#define MT8195_VDO1_DISP_DP_INTF0_SEL_IN 0xf14
> +#define MT8195_DISP_DP_INTF0_SEL_IN_FROM_VPP_MERGE4_MOUT (0 << 0)
> +
> +#define MT8195_VDO1_MERGE4_SOUT_SEL 0xf18
> +#define MT8195_MERGE4_SOUT_TO_DPI1_SEL (2 << 0)
This is simply 0x2...
> +#define MT8195_MERGE4_SOUT_TO_DP_INTF0_SEL (3 << 0)
...and this is 0x3.
There are other occurrences of the same logic, so please fix them all.
Regards,
- Angelo
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 09/16] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1
[not found] ` <20211004062140.29803-10-nancy.lin@mediatek.com>
@ 2021-10-14 14:56 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 6+ messages in thread
From: AngeloGioacchino Del Regno @ 2021-10-14 14:56 UTC (permalink / raw)
To: Nancy.Lin, CK Hu
Cc: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Rob Herring, Matthias Brugger, jason-jh . lin, Yongqiang Niu,
dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, singo.chang, srv_heupstream
Il 04/10/21 08:21, Nancy.Lin ha scritto:
> MT8195 vdosys1 has more than 32 reset bits and a different reset base
> than other chips. Modify mmsys for support 64 bit and different reset
> base.
>
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> ---
> drivers/soc/mediatek/mt8195-mmsys.h | 1 +
> drivers/soc/mediatek/mtk-mmsys.c | 21 ++++++++++++++++-----
> drivers/soc/mediatek/mtk-mmsys.h | 2 ++
> 3 files changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h
> index 648baaec112b..f67801c42fd9 100644
> --- a/drivers/soc/mediatek/mt8195-mmsys.h
> +++ b/drivers/soc/mediatek/mt8195-mmsys.h
> @@ -123,6 +123,7 @@
> #define MT8195_VDO1_MIXER_SOUT_SEL_IN 0xf68
> #define MT8195_MIXER_SOUT_SEL_IN_FROM_DISP_MIXER (0 << 0)
>
> +#define MT8195_VDO1_SW0_RST_B 0x1d0
All other definitions are indented with tabulations, but these are spaces here.
Please, do not mix formatting.
Regards,
- Angelo
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 10/16] soc: mediatek: add mtk-mutex support for mt8195 vdosys1
[not found] ` <20211004062140.29803-11-nancy.lin@mediatek.com>
@ 2021-10-14 15:01 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 6+ messages in thread
From: AngeloGioacchino Del Regno @ 2021-10-14 15:01 UTC (permalink / raw)
To: Nancy.Lin, CK Hu
Cc: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Rob Herring, Matthias Brugger, jason-jh . lin, Yongqiang Niu,
dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, singo.chang, srv_heupstream
> Add mtk-mutex support for mt8195 vdosys1.
> The vdosys1 path component contains ovl_adaptor, merge5,
> and dp_intf1. Ovl_adaptor is composed of several sub-elements,
> so change it to support multi-bit control.
>
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-mutex.c | 296 ++++++++++++++++++-------------
> 1 file changed, 175 insertions(+), 121 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
> index 36502b27fe20..7767fedbd14f 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -29,113 +29,142 @@
>
> #define INT_MUTEX BIT(1)
>
> -#define MT8167_MUTEX_MOD_DISP_PWM 1
This patch doesn't only add support for MT8195 vdosys1, but also changes
all definitions to a different "format", and also changes the type for
"mutex_mod" from int to long.
In reality, the actual functional change is minimal, compared to the size of
this entire patch.
Please, split this patch in two parts: one patch changing the defines and
the mutex_mod type (specifying that it's a preparation for adding support for
mt8195 vdosys1 mutex) and one patch adding such support.
Thanks!
Regards,
- Angelo
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 02/16] dt-bindings: mediatek: add vdosys1 MERGE property for mt8195
[not found] ` <20211004062140.29803-3-nancy.lin@mediatek.com>
@ 2021-10-15 8:08 ` AngeloGioacchino Del Regno
2021-10-15 16:21 ` Chun-Kuang Hu
1 sibling, 0 replies; 6+ messages in thread
From: AngeloGioacchino Del Regno @ 2021-10-15 8:08 UTC (permalink / raw)
To: Nancy.Lin, CK Hu
Cc: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Rob Herring, Matthias Brugger, jason-jh . lin, Yongqiang Niu,
dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, singo.chang, srv_heupstream
> MT8195 vdosys1 merge1 to merge4 have HW mute function.
> Add MERGE additional mute property description.
>
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> ---
> .../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 02/16] dt-bindings: mediatek: add vdosys1 MERGE property for mt8195
[not found] ` <20211004062140.29803-3-nancy.lin@mediatek.com>
2021-10-15 8:08 ` [PATCH v6 02/16] dt-bindings: mediatek: add vdosys1 MERGE property for mt8195 AngeloGioacchino Del Regno
@ 2021-10-15 16:21 ` Chun-Kuang Hu
1 sibling, 0 replies; 6+ messages in thread
From: Chun-Kuang Hu @ 2021-10-15 16:21 UTC (permalink / raw)
To: Nancy.Lin
Cc: CK Hu, Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Rob Herring, Matthias Brugger, jason-jh . lin, Yongqiang Niu,
DRI Development, moderated list:ARM/Mediatek SoC support, DTML,
linux-kernel, Linux ARM, singo.chang, srv_heupstream
Hi, Nancy:
Nancy.Lin <nancy.lin@mediatek.com> 於 2021年10月4日 週一 下午2:21寫道:
>
> MT8195 vdosys1 merge1 to merge4 have HW mute function.
> Add MERGE additional mute property description.
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
>
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> ---
> .../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
> index 6007e00679a8..d7d0eda813d1 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
> @@ -54,6 +54,10 @@ properties:
> command to SMI to speed up the data rate.
> type: boolean
>
> + mediatek,merge-mute:
> + description: Support mute function. Mute the content of merge output.
> + type: boolean
> +
> mediatek,gce-client-reg:
> description:
> The register of client driver can be configured by gce with 4 arguments
> --
> 2.18.0
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 04/16] dt-bindings: reset: mt8195: add vdosys1 reset control bit
[not found] ` <20211004062140.29803-5-nancy.lin@mediatek.com>
@ 2021-10-15 23:41 ` Chun-Kuang Hu
0 siblings, 0 replies; 6+ messages in thread
From: Chun-Kuang Hu @ 2021-10-15 23:41 UTC (permalink / raw)
To: Nancy.Lin
Cc: CK Hu, Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Rob Herring, Matthias Brugger, jason-jh . lin, Yongqiang Niu,
DRI Development, moderated list:ARM/Mediatek SoC support, DTML,
linux-kernel, Linux ARM, singo.chang, srv_heupstream
Hi, Nancy:
Nancy.Lin <nancy.lin@mediatek.com> 於 2021年10月4日 週一 下午2:21寫道:
>
> Add vdosys1 reset control bit for MT8195 platform.
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
>
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> ---
> include/dt-bindings/reset/mt8195-resets.h | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
> index a26bccc8b957..aab8d74496a6 100644
> --- a/include/dt-bindings/reset/mt8195-resets.h
> +++ b/include/dt-bindings/reset/mt8195-resets.h
> @@ -26,4 +26,16 @@
>
> #define MT8195_TOPRGU_SW_RST_NUM 16
>
> +/* VDOSYS1 */
> +#define MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC 25
> +#define MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC 26
> +#define MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC 27
> +#define MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC 28
> +#define MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC 29
> +#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE0_DL_ASYNC 51
> +#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE1_DL_ASYNC 52
> +#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE0_DL_ASYNC 53
> +#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE1_DL_ASYNC 54
> +#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_BE_DL_ASYNC 55
> +
> #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
> --
> 2.18.0
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-10-15 23:42 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <20211004062140.29803-1-nancy.lin@mediatek.com>
[not found] ` <20211004062140.29803-7-nancy.lin@mediatek.com>
2021-10-14 14:52 ` [PATCH v6 06/16] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 AngeloGioacchino Del Regno
[not found] ` <20211004062140.29803-10-nancy.lin@mediatek.com>
2021-10-14 14:56 ` [PATCH v6 09/16] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 AngeloGioacchino Del Regno
[not found] ` <20211004062140.29803-11-nancy.lin@mediatek.com>
2021-10-14 15:01 ` [PATCH v6 10/16] soc: mediatek: add mtk-mutex support for mt8195 vdosys1 AngeloGioacchino Del Regno
[not found] ` <20211004062140.29803-3-nancy.lin@mediatek.com>
2021-10-15 8:08 ` [PATCH v6 02/16] dt-bindings: mediatek: add vdosys1 MERGE property for mt8195 AngeloGioacchino Del Regno
2021-10-15 16:21 ` Chun-Kuang Hu
[not found] ` <20211004062140.29803-5-nancy.lin@mediatek.com>
2021-10-15 23:41 ` [PATCH v6 04/16] dt-bindings: reset: mt8195: add vdosys1 reset control bit Chun-Kuang Hu
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).