linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Anup Patel <anup@brainfault.org>
To: Atish Patra <atish.patra@wdc.com>
Cc: palmer@sifive.com, linux-riscv@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	Christoph Hellwig <hch@infradead.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	Damien Le Moal <Damien.LeMoal@wdc.com>
Subject: Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
Date: Thu, 16 Aug 2018 09:36:04 +0530	[thread overview]
Message-ID: <CAAhSdy1Legi9jzYnkN2am3QKLw7Y8tpbUfmJVA0gBRB4nPnXjA@mail.gmail.com> (raw)
In-Reply-To: <1534377377-70108-2-git-send-email-atish.patra@wdc.com>

On Thu, Aug 16, 2018 at 5:26 AM, Atish Patra <atish.patra@wdc.com> wrote:
> Currently, both linux cpu id and hardware cpu id are same.
> This is not recommended as it will lead to discontinuous cpu
> indexing in Linux. Moreover, kdump kernel will run from CPU0
> which would be absent if we follow existing scheme.
>
> Implement a logical mapping between Linux cpu id and hardware
> cpuid to decouple these two. Always mark the boot processor as
> cpu0 and all other cpus get the logical cpu id based on their
> booting order.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  arch/riscv/include/asm/smp.h | 17 ++++++++++++++++-
>  arch/riscv/kernel/setup.c    |  2 ++
>  arch/riscv/kernel/smp.c      | 19 +++++++++++++++++++
>  3 files changed, 37 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
> index 36016845..0763337b 100644
> --- a/arch/riscv/include/asm/smp.h
> +++ b/arch/riscv/include/asm/smp.h
> @@ -22,6 +22,12 @@
>  #include <linux/cpumask.h>
>  #include <linux/irqreturn.h>
>
> +/*
> + * Mapping between linux logical cpu index and hartid.
> + */
> +extern u64 __cpu_logical_map[NR_CPUS];
> +#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
> +
>  #ifdef CONFIG_SMP
>
>  /* SMP initialization hook for setup_arch */
> @@ -33,6 +39,8 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
>  /* Hook for the generic smp_call_function_single() routine. */
>  void arch_send_call_function_single_ipi(int cpu);
>
> +int riscv_hartid_to_cpuid(int hartid);
> +void cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out);
>  /*
>   * This is particularly ugly: it appears we can't actually get the definition
>   * of task_struct here, but we need access to the CPU this task is running on.
> @@ -41,6 +49,13 @@ void arch_send_call_function_single_ipi(int cpu);
>   */
>  #define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
>
> -#endif /* CONFIG_SMP */
> +#else
> +
> +static inline int riscv_hartid_to_cpuid(int hartid) { return 0 ; }
> +static inline void cpuid_to_hartid_mask(const struct cpumask *in,
> +                                      struct cpumask *out) {
> +       cpumask_set_cpu(cpu_logical_map(0), out);
> +}
>
> +#endif /* CONFIG_SMP */
>  #endif /* _ASM_RISCV_SMP_H */
> diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
> index db20dc63..e21ed481 100644
> --- a/arch/riscv/kernel/setup.c
> +++ b/arch/riscv/kernel/setup.c
> @@ -82,6 +82,8 @@ EXPORT_SYMBOL(empty_zero_page);
>  /* The lucky hart to first increment this variable will boot the other cores */
>  atomic_t hart_lottery;
>
> +u64 __cpu_logical_map[NR_CPUS];

If hardware IDs are always machine word size then its better to use
"unsigned long" in-place of u64.

The __cpu_logical_map[] should be zero initially because zero is a
valid hardware ID. Better set all entries to -1 by assigning { -1 } to the
array.

Also, I feel  __cpu_logical_map[] should be part of smp.c instead of
setup.c. Any particular reason for having it in setup.c?

> +
>  #ifdef CONFIG_BLK_DEV_INITRD
>  static void __init setup_initrd(void)
>  {
> diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
> index 906fe21e..d55379ee 100644
> --- a/arch/riscv/kernel/smp.c
> +++ b/arch/riscv/kernel/smp.c
> @@ -38,7 +38,26 @@ enum ipi_message_type {
>         IPI_MAX
>  };
>
> +int riscv_hartid_to_cpuid(int hartid)
> +{
> +       int i = -1;
> +
> +       for (i = 0; i < NR_CPUS; i++)
> +               if (cpu_logical_map(i) == hartid)
> +                       return i;
> +
> +       pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
> +       BUG();
> +       return i;
> +}
>
> +void cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)

May be rename cpuid_to_hartid_mask() to riscv_cpuid_to_hartid_mask()
for consistency.

> +{
> +       int cpu;
> +
> +       for_each_cpu(cpu, in)
> +               cpumask_set_cpu(cpu_logical_map(cpu), out);
> +}
>  /* Unsupported */
>  int setup_profiling_timer(unsigned int multiplier)
>  {
> --
> 2.7.4
>

  reply	other threads:[~2018-08-16  4:06 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-15 23:56 [RFC PATCH 0/5] RISC-V: Improve smp functionality & support cpu hotplug Atish Patra
2018-08-15 23:56 ` [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-08-16  4:06   ` Anup Patel [this message]
2018-08-16  5:17     ` Atish Patra
2018-08-16  5:39       ` Anup Patel
2018-08-15 23:56 ` [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid Atish Patra
2018-08-16  4:24   ` Anup Patel
2018-08-16  5:23     ` Atish Patra
2018-08-16  5:45       ` Anup Patel
2018-08-16  5:52         ` Atish Patra
2018-08-16  6:03           ` Anup Patel
2018-08-16 17:26             ` Atish Patra
2018-08-15 23:56 ` [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure Atish Patra
2018-08-16  5:02   ` Anup Patel
2018-08-16  5:40     ` Atish Patra
2018-08-16  6:21       ` Anup Patel
2018-08-18  1:25         ` Atish Patra
2018-08-21  7:48         ` Christoph Hellwig
2018-08-21 17:04           ` Anup Patel
2018-08-22  6:03             ` Christoph Hellwig
2018-08-22 15:24               ` Anup Patel
2018-08-23  4:25                 ` Atish Patra
2018-08-23 13:37                 ` Christoph Hellwig
2018-08-23 15:15                   ` Anup Patel
2018-08-22 17:16               ` Palmer Dabbelt
2018-08-15 23:56 ` [RFC PATCH 4/5] RISC-V: Move interrupt cause declarations to irq.h Atish Patra
2018-08-21  7:49   ` Christoph Hellwig
2018-08-15 23:56 ` [RFC PATCH 5/5] RISC-V: Support cpu hotplug Atish Patra
2018-08-21  7:54   ` Christoph Hellwig
2018-08-21 20:23     ` Atish Patra

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAAhSdy1Legi9jzYnkN2am3QKLw7Y8tpbUfmJVA0gBRB4nPnXjA@mail.gmail.com \
    --to=anup@brainfault.org \
    --cc=Damien.LeMoal@wdc.com \
    --cc=atish.patra@wdc.com \
    --cc=hch@infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mark.rutland@arm.com \
    --cc=palmer@sifive.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).