From: Huacai Chen <chenhuacai@gmail.com>
To: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: WANG Xuerui <kernel@xen0n.name>,
Huacai Chen <chenhuacai@loongson.cn>,
Arnd Bergmann <arnd@arndb.de>, Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
David Airlie <airlied@linux.ie>, Jonathan Corbet <corbet@lwn.net>,
Linus Torvalds <torvalds@linux-foundation.org>,
"<linux-arch@vger.kernel.org>" <linux-arch@vger.kernel.org>,
"open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Xuefeng Li <lixuefeng@loongson.cn>,
Yanteng Si <siyanteng@loongson.cn>, Guo Ren <guoren@kernel.org>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Stephen Rothwell <sfr@canb.auug.org.au>,
Al Viro <viro@zeniv.linux.org.uk>
Subject: Re: [PATCH V10 14/22] LoongArch: Add signal handling support
Date: Tue, 17 May 2022 10:08:18 +0800 [thread overview]
Message-ID: <CAAhV-H7R4hioE-dHVxAnPmeJJ-eqiWkdmZWxNDfLesuvURCLcw@mail.gmail.com> (raw)
In-Reply-To: <87bkvxd12b.fsf@email.froward.int.ebiederm.org>
Hi, Eric,
On Mon, May 16, 2022 at 10:07 PM Eric W. Biederman
<ebiederm@xmission.com> wrote:
>
> WANG Xuerui <kernel@xen0n.name> writes:
>
> > Hi,
> >
> > On 5/15/22 21:48, Huacai Chen wrote:
> >> diff --git a/arch/loongarch/include/uapi/asm/sigcontext.h b/arch/loongarch/include/uapi/asm/sigcontext.h
> >> new file mode 100644
> >> index 000000000000..efeb8b3f8236
> >> --- /dev/null
> >> +++ b/arch/loongarch/include/uapi/asm/sigcontext.h
> >> @@ -0,0 +1,63 @@
> >> +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
> >> +/*
> >> + * Author: Hanlu Li <lihanlu@loongson.cn>
> >> + * Huacai Chen <chenhuacai@loongson.cn>
> >> + *
> >> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> >> + */
> >> +#ifndef _UAPI_ASM_SIGCONTEXT_H
> >> +#define _UAPI_ASM_SIGCONTEXT_H
> >> +
> >> +#include <linux/types.h>
> >> +#include <linux/posix_types.h>
> >> +
> >> +/* FP context was used */
> >> +#define USED_FP (1 << 0)
> >> +/* Load/Store access flags for address error */
> >> +#define ADRERR_RD (1 << 30)
> >> +#define ADRERR_WR (1 << 31)
> >>> I've searched GitHub globally, and my local glibc checkout, for usages
> >>> of these 3 constants, and there seems to be none; please consider
> >>> removing these if doable. We don't want cruft in uapi right from the
> >>> beginning.
> >> They will be used in our glibc, I promise.
> > Okay then. Seems simple enough, and from my quick grepping these appear to be
> > original creations -- not carried over from somewhere else, so it's already
> > highly likely that some of the userland tools need these anyway, just not
> > released yet.
>
> I can understand exporting these values but the names aren't very
> well namespaced at all. Which means they could accidentially
> conflict with things.
>
> It would probably be better to do:
> SC_USED_FP
> SC_ADDRERR_RD
> SC_ADDRERR_WR
SC_ prefix is good, but ADRERR_RD/ADRERR_WR is used together with
SIGSEGV/SIGBUS, so I want to keep the same as BUS_ADRERR (a single D)
if possible.
>
> And with two D's please. It breaks my fingers to have to
> make a typo like that on purpose.
>
> This is very much a bikeshed comment, but I think the
> bikeshed should be painted.
>
> >>>> +
> >>>> +struct sigcontext {
> >>>> + __u64 sc_pc;
> >>>> + __u64 sc_regs[32];
> >>>> + __u32 sc_flags;
> >>>> + __u64 sc_extcontext[0] __attribute__((__aligned__(16)));
> >>>> +};
> >>>> +
> >>>> +#define CONTEXT_INFO_ALIGN 16
> >>>> +struct _ctxinfo {
> >>>> + __u32 magic;
> >>>> + __u32 size;
> >>>> + __u64 padding; /* padding to 16 bytes */
> >>>> +};
> >>>> +
> >>>> +/* FPU context */
> >>>> +#define FPU_CTX_MAGIC 0x46505501
> >>>> +#define FPU_CTX_ALIGN 8
> >>>> +struct fpu_context {
> >>>> + __u64 regs[32];
> >>>> + __u64 fcc;
> >>>> + __u32 fcsr;
> >>>> +};
> >>> The 3 structs above should already see usage downstream (glibc and other
> >>> low-level friends), so they probably shouldn't be touched by now. At
> >>> least I can't see problems.
> >>>> +
> >>>> +/* LSX context */
> >>>> +#define LSX_CTX_MAGIC 0x53580001
> >>>> +#define LSX_CTX_ALIGN 16
> >>>> +struct lsx_context {
> >>>> + __u64 regs[2*32];
> >>>> + __u64 fcc;
> >>>> + __u32 fcsr;
> >>>> + __u32 vcsr;
> >>>> +};
> >>>> +
> >>>> +/* LASX context */
> >>>> +#define LASX_CTX_MAGIC 0x41535801
> >>>> +#define LASX_CTX_ALIGN 32
> >>>> +struct lasx_context {
> >>>> + __u64 regs[4*32];
> >>>> + __u64 fcc;
> >>>> + __u32 fcsr;
> >>>> + __u32 vcsr;
> >>>> +};
> >>> Do we want to freeze the LSX/LASX layout this early, before any detail
> >>> of said extension are published? We'll need to update kernel later
> >>> anyway, so I'd recommend leaving them out for the initial bring-up.
> >> Yes, they are freezed.
> > Okay too, I remember these are the same values as in the old world, so it should
> > be easy to support both worlds at least in this regard.
>
> You know. I really don't like this including code for hardware that may
> be frozen but is not publicly documented yet. Especially when the plan
> is to publicly document the hardware. It has the real problem that no
> one else can review the code.
>
> In ever design I have worked with there have been places where the
> people putting it together have had blind spots. The only way I know to
> get past blind spots is to get as many people as possible looking,
> and to listen to the feedback.
>
> Given that neither lsx_context nor lasx_context are used in the kernel
> code yet I would very much prefer that their inclusion wait until there
> is actual code that needs them.
>
> If nothing else that will put the definitions in context so people can
> more easily see the big picture and understand how the pieces fit.
OK, I will remove lsx_context/lasx_context in the next version.
Huacai
>
> Eric
next prev parent reply other threads:[~2022-05-17 2:08 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-14 8:03 [PATCH V10 00/22] arch: Add basic LoongArch support Huacai Chen
2022-05-14 8:03 ` [PATCH V10 01/22] Documentation: LoongArch: Add basic documentations Huacai Chen
2022-05-14 13:11 ` WANG Xuerui
2022-05-14 15:40 ` Huacai Chen
2022-05-15 12:41 ` Bagas Sanjaya
2022-05-15 13:14 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 02/22] Documentation/zh_CN: Add basic LoongArch documentations Huacai Chen
2022-05-14 13:26 ` WANG Xuerui
2022-05-14 14:49 ` Huacai Chen
2022-05-15 14:14 ` Wu X.C.
2022-05-14 8:03 ` [PATCH V3 03/22] LoongArch: Add elf-related definitions Huacai Chen
2022-05-14 13:29 ` WANG Xuerui
2022-05-14 14:11 ` Huacai Chen
2022-05-15 4:13 ` WANG Xuerui
2022-05-15 11:47 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 04/22] LoongArch: Add writecombine support for drm Huacai Chen
2022-05-15 4:18 ` WANG Xuerui
2022-05-15 11:50 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 05/22] LoongArch: Add build infrastructure Huacai Chen
2022-05-14 13:38 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 06/22] LoongArch: Add CPU definition headers Huacai Chen
2022-05-14 8:03 ` [PATCH V10 07/22] LoongArch: Add atomic/locking headers Huacai Chen
2022-05-14 8:03 ` [PATCH V10 08/22] LoongArch: Add other common headers Huacai Chen
2022-05-15 0:01 ` Jason A. Donenfeld
2022-05-15 11:42 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 09/22] LoongArch: Add boot and setup routines Huacai Chen
2022-05-15 8:44 ` WANG Xuerui
2022-05-15 12:38 ` Huacai Chen
2022-05-16 2:41 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 10/22] LoongArch: Add exception/interrupt handling Huacai Chen
2022-05-15 9:07 ` WANG Xuerui
2022-05-15 13:00 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 11/22] LoongArch: Add process management Huacai Chen
2022-05-15 9:20 ` WANG Xuerui
2022-05-15 13:25 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 12/22] LoongArch: Add memory management Huacai Chen
2022-05-15 9:42 ` WANG Xuerui
2022-05-15 13:38 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 13/22] LoongArch: Add system call support Huacai Chen
2022-05-14 13:53 ` WANG Xuerui
2022-05-14 14:39 ` Huacai Chen
2022-05-15 9:47 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 14/22] LoongArch: Add signal handling support Huacai Chen
2022-05-15 10:39 ` WANG Xuerui
2022-05-15 13:48 ` Huacai Chen
2022-05-16 3:51 ` WANG Xuerui
[not found] ` <87bkvxd12b.fsf@email.froward.int.ebiederm.org>
2022-05-16 15:02 ` WANG Xuerui
2022-05-17 2:08 ` Huacai Chen [this message]
2022-05-17 15:36 ` Eric W. Biederman
2022-05-14 8:03 ` [PATCH V10 15/22] LoongArch: Add ELF and module support Huacai Chen
2022-05-15 11:03 ` WANG Xuerui
2022-05-15 14:13 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 16/22] LoongArch: Add misc common routines Huacai Chen
2022-05-14 12:56 ` Alexandre Belloni
2022-05-14 14:12 ` Huacai Chen
2022-05-14 16:00 ` Alexandre Belloni
2022-05-15 13:03 ` WANG Xuerui
2022-05-15 14:21 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 17/22] LoongArch: Add some library functions Huacai Chen
2022-05-15 13:11 ` WANG Xuerui
2022-05-15 14:27 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 18/22] LoongArch: Add PCI controller support Huacai Chen
2022-05-15 13:35 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 19/22] LoongArch: Add VDSO and VSYSCALL support Huacai Chen
2022-05-15 14:47 ` WANG Xuerui
2022-05-15 14:52 ` Huacai Chen
2022-05-14 8:04 ` [PATCH V10 20/22] LoongArch: Add multi-processor (SMP) support Huacai Chen
2022-05-15 14:16 ` WANG Xuerui
2022-05-15 14:47 ` Huacai Chen
2022-05-14 8:04 ` [PATCH V10 21/22] LoongArch: Add Non-Uniform Memory Access (NUMA) support Huacai Chen
2022-05-15 14:27 ` WANG Xuerui
2022-05-15 14:49 ` Huacai Chen
2022-05-14 8:04 ` [PATCH V10 22/22] LoongArch: Add Loongson-3 default config file Huacai Chen
2022-05-15 14:30 ` WANG Xuerui
2022-05-14 20:54 ` [PATCH V10 00/22] arch: Add basic LoongArch support Arnd Bergmann
2022-05-16 7:41 ` Huacai Chen
2022-05-15 15:09 ` WANG Xuerui
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