From: Huacai Chen <chenhuacai@gmail.com>
To: WANG Xuerui <kernel@xen0n.name>
Cc: Huacai Chen <chenhuacai@loongson.cn>,
Arnd Bergmann <arnd@arndb.de>, Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
David Airlie <airlied@linux.ie>, Jonathan Corbet <corbet@lwn.net>,
Linus Torvalds <torvalds@linux-foundation.org>,
linux-arch <linux-arch@vger.kernel.org>,
"open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Xuefeng Li <lixuefeng@loongson.cn>,
Yanteng Si <siyanteng@loongson.cn>, Guo Ren <guoren@kernel.org>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Stephen Rothwell <sfr@canb.auug.org.au>
Subject: Re: [PATCH V10 17/22] LoongArch: Add some library functions
Date: Sun, 15 May 2022 22:27:22 +0800 [thread overview]
Message-ID: <CAAhV-H7bCwKpV7j5HMdhjHAive8xGFa1KVkNS+jonfExzMcYzA@mail.gmail.com> (raw)
In-Reply-To: <28828250-ced3-9b03-26fc-63323be12f3a@xen0n.name>
Hi, Xuerui,
On Sun, May 15, 2022 at 9:12 PM WANG Xuerui <kernel@xen0n.name> wrote:
>
> Hi,
>
> On 5/14/22 16:03, Huacai Chen wrote:
> > Add some library functions for LoongArch, including: delay, memset,
> > memcpy, memmove, copy_user, strncpy_user, strnlen_user and tlb dump
> > functions.
> >
> > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> > ---
> > arch/loongarch/include/asm/delay.h | 26 +++++++
> > arch/loongarch/include/asm/string.h | 12 +++
> > arch/loongarch/lib/clear_user.S | 43 +++++++++++
> > arch/loongarch/lib/copy_user.S | 47 ++++++++++++
> > arch/loongarch/lib/delay.c | 43 +++++++++++
> > arch/loongarch/lib/dump_tlb.c | 111 ++++++++++++++++++++++++++++
> > 6 files changed, 282 insertions(+)
> > create mode 100644 arch/loongarch/include/asm/delay.h
> > create mode 100644 arch/loongarch/include/asm/string.h
> > create mode 100644 arch/loongarch/lib/clear_user.S
> > create mode 100644 arch/loongarch/lib/copy_user.S
> > create mode 100644 arch/loongarch/lib/delay.c
> > create mode 100644 arch/loongarch/lib/dump_tlb.c
> >
> > diff --git a/arch/loongarch/include/asm/delay.h b/arch/loongarch/include/asm/delay.h
> > new file mode 100644
> > index 000000000000..016b3aca65cb
> > --- /dev/null
> > +++ b/arch/loongarch/include/asm/delay.h
> > @@ -0,0 +1,26 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> This file is derived from MIPS so copyright should be marked here.
> > + */
> > +#ifndef _ASM_DELAY_H
> > +#define _ASM_DELAY_H
> > +
> > +#include <linux/param.h>
> > +
> > +extern void __delay(unsigned long loops);
> Argument is called "cycles" in the .c file.
OK, thanks.
> > +extern void __ndelay(unsigned long ns);
> > +extern void __udelay(unsigned long us);
> > +
> > +#define ndelay(ns) __ndelay(ns)
> > +#define udelay(us) __udelay(us)
> > +
> > +/* make sure "usecs *= ..." in udelay do not overflow. */
> > +#if HZ >= 1000
> > +#define MAX_UDELAY_MS 1
> > +#elif HZ <= 200
> > +#define MAX_UDELAY_MS 5
> > +#else
> > +#define MAX_UDELAY_MS (1000 / HZ)
> > +#endif
> > +
> > +#endif /* _ASM_DELAY_H */
> > diff --git a/arch/loongarch/include/asm/string.h b/arch/loongarch/include/asm/string.h
> > new file mode 100644
> > index 000000000000..b07e60ded957
> > --- /dev/null
> > +++ b/arch/loongarch/include/asm/string.h
> > @@ -0,0 +1,12 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +#ifndef _ASM_STRING_H
> > +#define _ASM_STRING_H
> > +
> > +extern void *memset(void *__s, int __c, size_t __count);
> > +extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
> > +extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
> > +
> > +#endif /* _ASM_STRING_H */
> > diff --git a/arch/loongarch/lib/clear_user.S b/arch/loongarch/lib/clear_user.S
> > new file mode 100644
> > index 000000000000..b8168d22ac80
> > --- /dev/null
> > +++ b/arch/loongarch/lib/clear_user.S
> > @@ -0,0 +1,43 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +
> > +#include <asm/asm.h>
> > +#include <asm/asmmacro.h>
> > +#include <asm/export.h>
> > +#include <asm/regdef.h>
> > +
> > +.macro fixup_ex from, to, offset, fix
> > +.if \fix
> > + .section .fixup, "ax"
> > +\to: addi.d v0, a1, \offset
> > + jr ra
> > + .previous
> > +.endif
> > + .section __ex_table, "a"
> > + PTR \from\()b, \to\()b
> > + .previous
> > +.endm
> > +
> > +/*
> > + * unsigned long __clear_user(void *addr, size_t size)
> > + *
> > + * a0: addr
> > + * a1: size
> > + */
> > +SYM_FUNC_START(__clear_user)
> > + beqz a1, 2f
> > +
> > +1: st.b zero, a0, 0
> > + addi.d a0, a0, 1
> > + addi.d a1, a1, -1
> > + bgt a1, zero, 1b
> > +
> > +2: move v0, a1
> > + jr ra
> > +
> > + fixup_ex 1, 3, 0, 1
> > +SYM_FUNC_END(__clear_user)
> > +
> > +EXPORT_SYMBOL(__clear_user)
> > diff --git a/arch/loongarch/lib/copy_user.S b/arch/loongarch/lib/copy_user.S
> > new file mode 100644
> > index 000000000000..43ed26304954
> > --- /dev/null
> > +++ b/arch/loongarch/lib/copy_user.S
> > @@ -0,0 +1,47 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +
> > +#include <asm/asm.h>
> > +#include <asm/asmmacro.h>
> > +#include <asm/export.h>
> > +#include <asm/regdef.h>
> > +
> > +.macro fixup_ex from, to, offset, fix
> > +.if \fix
> > + .section .fixup, "ax"
> > +\to: addi.d v0, a2, \offset
> > + jr ra
> > + .previous
> > +.endif
> > + .section __ex_table, "a"
> > + PTR \from\()b, \to\()b
> > + .previous
> > +.endm
> > +
> > +/*
> > + * unsigned long __copy_user(void *to, const void *from, size_t n)
> > + *
> > + * a0: to
> > + * a1: from
> > + * a2: n
> > + */
> > +SYM_FUNC_START(__copy_user)
> > + beqz a2, 3f
> > +
> > +1: ld.b t0, a1, 0
> > +2: st.b t0, a0, 0
> > + addi.d a0, a0, 1
> > + addi.d a1, a1, 1
> > + addi.d a2, a2, -1
> > + bgt a2, zero, 1b
> > +
> > +3: move v0, a2
> > + jr ra
> > +
> > + fixup_ex 1, 4, 0, 1
> > + fixup_ex 2, 4, 0, 0
> > +SYM_FUNC_END(__copy_user)
> > +
> > +EXPORT_SYMBOL(__copy_user)
> > diff --git a/arch/loongarch/lib/delay.c b/arch/loongarch/lib/delay.c
> > new file mode 100644
> > index 000000000000..5d856694fcfe
> > --- /dev/null
> > +++ b/arch/loongarch/lib/delay.c
> > @@ -0,0 +1,43 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> So is this file.
> > + */
> > +#include <linux/delay.h>
> > +#include <linux/export.h>
> > +#include <linux/smp.h>
> > +#include <linux/timex.h>
> > +
> > +#include <asm/compiler.h>
> > +#include <asm/processor.h>
> > +
> > +void __delay(unsigned long cycles)
> > +{
> > + u64 t0 = get_cycles();
> > +
> > + while ((unsigned long)(get_cycles() - t0) < cycles)
> > + cpu_relax();
> > +}
> > +EXPORT_SYMBOL(__delay);
> > +
> > +/*
> > + * Division by multiplication: you don't have to worry about
> > + * loss of precision.
> > + *
> > + * Use only for very small delays ( < 1 msec). Should probably use a
> > + * lookup table, really, as the multiplications take much too long with
> > + * short delays. This is a "reasonable" implementation, though (and the
> > + * first constant multiplications gets optimized away if the delay is
> > + * a constant)
> > + */
> > +
> > +void __udelay(unsigned long us)
> > +{
> > + __delay((us * 0x000010c7ull * HZ * lpj_fine) >> 32);
> > +}
> > +EXPORT_SYMBOL(__udelay);
> > +
> > +void __ndelay(unsigned long ns)
> > +{
> > + __delay((ns * 0x00000005ull * HZ * lpj_fine) >> 32);
> > +}
> > +EXPORT_SYMBOL(__ndelay);
> > diff --git a/arch/loongarch/lib/dump_tlb.c b/arch/loongarch/lib/dump_tlb.c
> > new file mode 100644
> > index 000000000000..cda2c6bc7f09
> > --- /dev/null
> > +++ b/arch/loongarch/lib/dump_tlb.c
> > @@ -0,0 +1,111 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + *
> > + * Derived from MIPS:
> > + * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
> > + * Copyright (C) 1999 by Silicon Graphics, Inc.
> > + */
> > +#include <linux/kernel.h>
> > +#include <linux/mm.h>
> > +
> > +#include <asm/loongarch.h>
> > +#include <asm/page.h>
> > +#include <asm/pgtable.h>
> > +#include <asm/tlb.h>
> > +
> > +void dump_tlb_regs(void)
> > +{
> > + const int field = 2 * sizeof(unsigned long);
> > +
> > + pr_info("Index : %0x\n", read_csr_tlbidx());
> > + pr_info("PageSize : %0x\n", read_csr_pagesize());
> > + pr_info("EntryHi : %0*llx\n", field, read_csr_entryhi());
> > + pr_info("EntryLo0 : %0*llx\n", field, read_csr_entrylo0());
> > + pr_info("EntryLo1 : %0*llx\n", field, read_csr_entrylo1());
> > +}
> > +
> > +static void dump_tlb(int first, int last)
> > +{
> > + unsigned long s_entryhi, entryhi, asid;
> > + unsigned long long entrylo0, entrylo1, pa;
> > + unsigned int index;
> > + unsigned int s_index, s_asid;
> > + unsigned int pagesize, c0, c1, i;
> > + unsigned long asidmask = cpu_asid_mask(¤t_cpu_data);
> > + int pwidth = 11;
> > + int vwidth = 11;
> > + int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
> > +
> > + s_entryhi = read_csr_entryhi();
> > + s_index = read_csr_tlbidx();
> > + s_asid = read_csr_asid();
> > +
> > + for (i = first; i <= last; i++) {
> > + write_csr_index(i);
> > + tlb_read();
> > + pagesize = read_csr_pagesize();
> > + entryhi = read_csr_entryhi();
> > + entrylo0 = read_csr_entrylo0();
> > + entrylo1 = read_csr_entrylo1();
> > + index = read_csr_tlbidx();
> > + asid = read_csr_asid();
> > +
> > + /* EHINV bit marks entire entry as invalid */
> > + if (index & CSR_TLBIDX_EHINV)
> > + continue;
> > + /*
> > + * ASID takes effect in absence of G (global) bit.
> > + */
> > + if (!((entrylo0 | entrylo1) & ENTRYLO_G) &&
> > + asid != s_asid)
> > + continue;
> > +
> > + /*
> > + * Only print entries in use
> > + */
> > + pr_info("Index: %2d pgsize=%x ", i, (1 << pagesize));
> > +
> > + c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
> > + c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
> > +
> > + pr_cont("va=%0*lx asid=%0*lx",
> > + vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask);
> > +
> > + /* NR/NX are in awkward places, so mask them off separately */
> > + pa = entrylo0 & ~(ENTRYLO_NR | ENTRYLO_NX);
> > + pa = pa & PAGE_MASK;
> > + pr_cont("\n\t[");
> > + pr_cont("ri=%d xi=%d ",
> > + (entrylo0 & ENTRYLO_NR) ? 1 : 0,
> > + (entrylo0 & ENTRYLO_NX) ? 1 : 0);
> > + pr_cont("pa=%0*llx c=%d d=%d v=%d g=%d plv=%lld] [",
> > + pwidth, pa, c0,
> > + (entrylo0 & ENTRYLO_D) ? 1 : 0,
> > + (entrylo0 & ENTRYLO_V) ? 1 : 0,
> > + (entrylo0 & ENTRYLO_G) ? 1 : 0,
> > + (entrylo0 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
> > + /* NR/NX are in awkward places, so mask them off separately */
> > + pa = entrylo1 & ~(ENTRYLO_NR | ENTRYLO_NX);
> > + pa = pa & PAGE_MASK;
> > + pr_cont("ri=%d xi=%d ",
> > + (entrylo1 & ENTRYLO_NR) ? 1 : 0,
> > + (entrylo1 & ENTRYLO_NX) ? 1 : 0);
> > + pr_cont("pa=%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n",
> > + pwidth, pa, c1,
> > + (entrylo1 & ENTRYLO_D) ? 1 : 0,
> > + (entrylo1 & ENTRYLO_V) ? 1 : 0,
> > + (entrylo1 & ENTRYLO_G) ? 1 : 0,
> > + (entrylo1 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
> > + }
> > + pr_info("\n");
> > +
> > + write_csr_entryhi(s_entryhi);
> > + write_csr_tlbidx(s_index);
> > + write_csr_asid(s_asid);
> > +}
> > +
> > +void dump_tlb_all(void)
> > +{
> > + dump_tlb(0, current_cpu_data.tlbsize - 1);
> > +}
>
> Overall LGTM; with the copyright lines amended:
Thanks for your review.
Huacai
>
> Reviewed-by: WANG Xuerui <git@xen0n.name>
>
next prev parent reply other threads:[~2022-05-15 14:28 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-14 8:03 [PATCH V10 00/22] arch: Add basic LoongArch support Huacai Chen
2022-05-14 8:03 ` [PATCH V10 01/22] Documentation: LoongArch: Add basic documentations Huacai Chen
2022-05-14 13:11 ` WANG Xuerui
2022-05-14 15:40 ` Huacai Chen
2022-05-15 12:41 ` Bagas Sanjaya
2022-05-15 13:14 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 02/22] Documentation/zh_CN: Add basic LoongArch documentations Huacai Chen
2022-05-14 13:26 ` WANG Xuerui
2022-05-14 14:49 ` Huacai Chen
2022-05-15 14:14 ` Wu X.C.
2022-05-14 8:03 ` [PATCH V3 03/22] LoongArch: Add elf-related definitions Huacai Chen
2022-05-14 13:29 ` WANG Xuerui
2022-05-14 14:11 ` Huacai Chen
2022-05-15 4:13 ` WANG Xuerui
2022-05-15 11:47 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 04/22] LoongArch: Add writecombine support for drm Huacai Chen
2022-05-15 4:18 ` WANG Xuerui
2022-05-15 11:50 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 05/22] LoongArch: Add build infrastructure Huacai Chen
2022-05-14 13:38 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 06/22] LoongArch: Add CPU definition headers Huacai Chen
2022-05-14 8:03 ` [PATCH V10 07/22] LoongArch: Add atomic/locking headers Huacai Chen
2022-05-14 8:03 ` [PATCH V10 08/22] LoongArch: Add other common headers Huacai Chen
2022-05-15 0:01 ` Jason A. Donenfeld
2022-05-15 11:42 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 09/22] LoongArch: Add boot and setup routines Huacai Chen
2022-05-15 8:44 ` WANG Xuerui
2022-05-15 12:38 ` Huacai Chen
2022-05-16 2:41 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 10/22] LoongArch: Add exception/interrupt handling Huacai Chen
2022-05-15 9:07 ` WANG Xuerui
2022-05-15 13:00 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 11/22] LoongArch: Add process management Huacai Chen
2022-05-15 9:20 ` WANG Xuerui
2022-05-15 13:25 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 12/22] LoongArch: Add memory management Huacai Chen
2022-05-15 9:42 ` WANG Xuerui
2022-05-15 13:38 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 13/22] LoongArch: Add system call support Huacai Chen
2022-05-14 13:53 ` WANG Xuerui
2022-05-14 14:39 ` Huacai Chen
2022-05-15 9:47 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 14/22] LoongArch: Add signal handling support Huacai Chen
2022-05-15 10:39 ` WANG Xuerui
2022-05-15 13:48 ` Huacai Chen
2022-05-16 3:51 ` WANG Xuerui
[not found] ` <87bkvxd12b.fsf@email.froward.int.ebiederm.org>
2022-05-16 15:02 ` WANG Xuerui
2022-05-17 2:08 ` Huacai Chen
2022-05-17 15:36 ` Eric W. Biederman
2022-05-14 8:03 ` [PATCH V10 15/22] LoongArch: Add ELF and module support Huacai Chen
2022-05-15 11:03 ` WANG Xuerui
2022-05-15 14:13 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 16/22] LoongArch: Add misc common routines Huacai Chen
2022-05-14 12:56 ` Alexandre Belloni
2022-05-14 14:12 ` Huacai Chen
2022-05-14 16:00 ` Alexandre Belloni
2022-05-15 13:03 ` WANG Xuerui
2022-05-15 14:21 ` Huacai Chen
2022-05-14 8:03 ` [PATCH V10 17/22] LoongArch: Add some library functions Huacai Chen
2022-05-15 13:11 ` WANG Xuerui
2022-05-15 14:27 ` Huacai Chen [this message]
2022-05-14 8:03 ` [PATCH V10 18/22] LoongArch: Add PCI controller support Huacai Chen
2022-05-15 13:35 ` WANG Xuerui
2022-05-14 8:03 ` [PATCH V10 19/22] LoongArch: Add VDSO and VSYSCALL support Huacai Chen
2022-05-15 14:47 ` WANG Xuerui
2022-05-15 14:52 ` Huacai Chen
2022-05-14 8:04 ` [PATCH V10 20/22] LoongArch: Add multi-processor (SMP) support Huacai Chen
2022-05-15 14:16 ` WANG Xuerui
2022-05-15 14:47 ` Huacai Chen
2022-05-14 8:04 ` [PATCH V10 21/22] LoongArch: Add Non-Uniform Memory Access (NUMA) support Huacai Chen
2022-05-15 14:27 ` WANG Xuerui
2022-05-15 14:49 ` Huacai Chen
2022-05-14 8:04 ` [PATCH V10 22/22] LoongArch: Add Loongson-3 default config file Huacai Chen
2022-05-15 14:30 ` WANG Xuerui
2022-05-14 20:54 ` [PATCH V10 00/22] arch: Add basic LoongArch support Arnd Bergmann
2022-05-16 7:41 ` Huacai Chen
2022-05-15 15:09 ` WANG Xuerui
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