From: Stephane Eranian <eranian@google.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: David Carrillo-Cisneros <davidcc@google.com>,
LKML <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>, Ingo Molnar <mingo@redhat.com>,
"Yan, Zheng" <zheng.z.yan@intel.com>,
Kan Liang <kan.liang@intel.com>,
Peter Zijlstra <peterz@infradead.org>
Subject: Re: [PATCH 1/3] perf/x86/intel: output LBR support statement after validation
Date: Wed, 8 Jun 2016 00:27:33 -0700 [thread overview]
Message-ID: <CABPqkBTtgeX_NFS5_6bPx-ZRmYrW+zax5LQ2Wxf6-DQ7kUiRUQ@mail.gmail.com> (raw)
In-Reply-To: <20160606015935.GA9646@tassilo.jf.intel.com>
Andi,
On Sun, Jun 5, 2016 at 6:59 PM, Andi Kleen <ak@linux.intel.com> wrote:
>
> > It is not because you force LBR to ring3 only that you do not capture
> > kernel addresses in the FROM field.
> > Keep in mind that LBR priv level filtering applies to the target of
> > the branch and not the source. You might
> > still get a kernel address if returning from kernel. Now, in callstack
> > mode, I think the return branch is never
> > actually recorded in the LBR, it just causes a pop, so theoretically
> > this should not happen. I'd like to be
> > 100% sure of that, though.
>
> Far branches shouldn't be included in call stack LBR. Don't think
> there is any other situation where the ring 0 address could leak either.
>
Ok, so you're saying that syscall and int are not causing LBR callstack to
record an entry. If that is the case, then a rfi should not cause a pop of the
last LBR entry. Is that right?
>
> -Andi
> --
> ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2016-06-08 7:27 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-02 2:42 [PATCH 0/3] fix MSR_LAST_BRANCH_FROM Haswell support David Carrillo-Cisneros
2016-06-02 2:42 ` [PATCH 1/3] perf/x86/intel: output LBR support statement after validation David Carrillo-Cisneros
2016-06-02 8:21 ` Peter Zijlstra
2016-06-02 16:04 ` Andi Kleen
2016-06-02 17:28 ` Stephane Eranian
2016-06-06 1:59 ` Andi Kleen
2016-06-08 7:27 ` Stephane Eranian [this message]
2016-06-08 9:08 ` Andi Kleen
2016-06-02 2:42 ` [PATCH 2/3] perf/x86/intel: fix for MSR_LAST_BRANCH_FROM_x quirk when no TSX David Carrillo-Cisneros
2016-06-02 8:23 ` Peter Zijlstra
2016-06-02 8:37 ` Peter Zijlstra
2016-06-02 8:53 ` Peter Zijlstra
[not found] ` <CALcN6mhMsNHgRVuYmYsE+O+Neq6PcaDy1-ARzBd=Vej=0rHr0Q@mail.gmail.com>
2016-06-03 9:21 ` Peter Zijlstra
2016-06-02 8:54 ` Peter Zijlstra
2016-06-02 8:55 ` Peter Zijlstra
2016-06-02 16:07 ` Andi Kleen
2016-06-02 2:42 ` [PATCH 3/3] perf, perf/tool: trigger lbr_from signext bug David Carrillo-Cisneros
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