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* [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
@ 2019-02-08  1:16 Enrico Weigelt, metux IT consult
  2019-02-08  1:16 ` [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys " Enrico Weigelt, metux IT consult
  2019-02-08 14:25 ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio " Linus Walleij
  0 siblings, 2 replies; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-08  1:16 UTC (permalink / raw)
  To: linux-kernel
  Cc: Enrico Weigelt, metux IT consult, linux-gpio, linus.walleij,
	bgolaszewski, dvhart, andy, platform-driver-x86

From: "Enrico Weigelt, metux IT consult" <info@metux.net>

GPIO platform driver for the AMD G-series PCH (eg. on GX-412TC)

This driver doesn't registers itself automatically, as it needs to
be provided with platform specific configuration, provided by some
board driver setup code.

Didn't implement oftree probing yet, as it's rarely found on x86.

Cc: linux-gpio@vger.kernel.org
Cc: linus.walleij@linaro.org
Cc: bgolaszewski@baylibre.com
Cc: dvhart@infradead.org
Cc: andy@infradead.org
Cc: platform-driver-x86@vger.kernel.org

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
---
 MAINTAINERS                                        |   7 +
 drivers/gpio/Kconfig                               |  10 ++
 drivers/gpio/Makefile                              |   1 +
 drivers/gpio/gpio-amd-fch.c                        | 169 +++++++++++++++++++++
 .../linux/platform_data/x86/amd-fch-gpio-pdata.h   |  41 +++++
 5 files changed, 228 insertions(+)
 create mode 100644 drivers/gpio/gpio-amd-fch.c
 create mode 100644 include/linux/platform_data/x86/amd-fch-gpio-pdata.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 8c68de3c..b9bc500 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -766,6 +766,13 @@ S:	Supported
 F:	Documentation/hwmon/fam15h_power
 F:	drivers/hwmon/fam15h_power.c
 
+AMD FCH GPIO DRIVER
+M:	Enrico Weigelt, metux IT consult <info@metux.net>
+L:	linux-gpio@vger.kernel.org
+S:	Maintained
+F:	drivers/gpio/gpio-amd-fch.c
+F:	include/linux/platform_data/x86/amd-fch-gpio-pdata.h
+
 AMD GEODE CS5536 USB DEVICE CONTROLLER DRIVER
 L:	linux-geode@lists.infradead.org (moderated for non-subscribers)
 S:	Orphan
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index b5a2845..a3e47c8 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -654,6 +654,16 @@ config GPIO_LOONGSON1
 	help
 	  Say Y or M here to support GPIO on Loongson1 SoCs.
 
+config GPIO_AMD_FCH
+	tristate "GPIO support for AMD Fusion Controller Hub (G-series SOCs)"
+	select GPIO_GENERIC
+	help
+	  This option enables driver for GPIO on AMDs Fusion Controller Hub,
+	  as found on G-series SOCs (eg. GX-412TC)
+
+	  Note: This driver doesn't registers itself automatically, as it
+	  needs to be provided with platform specific configuration.
+	  (See eg. CONFIG_PCENGINES_APU2.)
 endmenu
 
 menu "Port-mapped I/O GPIO drivers"
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 37628f8..bb48fd2 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_GPIO_ADP5520)	+= gpio-adp5520.o
 obj-$(CONFIG_GPIO_ADP5588)	+= gpio-adp5588.o
 obj-$(CONFIG_GPIO_ALTERA)  	+= gpio-altera.o
 obj-$(CONFIG_GPIO_ALTERA_A10SR)	+= gpio-altera-a10sr.o
+obj-$(CONFIG_GPIO_AMD_FCH)	+= gpio-amd-fch.o
 obj-$(CONFIG_GPIO_AMD8111)	+= gpio-amd8111.o
 obj-$(CONFIG_GPIO_AMDPT)	+= gpio-amdpt.o
 obj-$(CONFIG_GPIO_ARIZONA)	+= gpio-arizona.o
diff --git a/drivers/gpio/gpio-amd-fch.c b/drivers/gpio/gpio-amd-fch.c
new file mode 100644
index 0000000..356bb21
--- /dev/null
+++ b/drivers/gpio/gpio-amd-fch.c
@@ -0,0 +1,169 @@
+/*
+ * GPIO driver for the AMD G series FCH (eg. GX-412TC)
+ *
+ * Copyright (C) 2018 metux IT consult
+ * Author: Enrico Weigelt <info@metux.net>
+ *
+ * SPDX-License-Identifier: GPL+
+ */
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/gpio/driver.h>
+#include <linux/platform_data/x86/amd-fch-gpio-pdata.h>
+
+
+#define GPIO_BIT_DIR		23
+#define GPIO_BIT_WRITE		22
+#define GPIO_BIT_READ		16
+
+
+struct amd_fch_gpio_priv {
+	struct platform_device		*pdev;
+	struct gpio_chip		gc;
+	void __iomem			*base;
+	struct amd_fch_gpio_pdata	*pdata;
+};
+
+static uint32_t *amd_fch_gpio_addr(struct gpio_chip *gc, unsigned gpio)
+{
+	struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
+
+	if (gpio > priv->pdata->gpio_num) {
+		dev_err(&priv->pdev->dev, "gpio number %d out of range\n", gpio);
+		return NULL;
+	}
+
+	return priv->base + priv->pdata->gpio_reg[gpio].reg*sizeof(u32);
+}
+
+static int amd_fch_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, offset);
+	if (!ptr) return -EINVAL;
+
+	*ptr &= ~(1 << GPIO_BIT_DIR);
+	return 0;
+}
+
+static int amd_fch_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, int value)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, gpio);
+	if (!ptr) return -EINVAL;
+
+	*ptr |= (1 << GPIO_BIT_DIR);
+	return 0;
+}
+
+static int amd_fch_gpio_get_direction(struct gpio_chip *gc, unsigned gpio)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, gpio);
+	if (!ptr) return -EINVAL;
+
+	return (*ptr >> GPIO_BIT_DIR) & 1;
+}
+
+static void amd_fch_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, gpio);
+	if (!ptr) return;
+
+	if (value)
+		*ptr |= (1 << GPIO_BIT_WRITE);
+	else
+		*ptr &= ~(1 << GPIO_BIT_WRITE);
+}
+
+static int amd_fch_gpio_get(struct gpio_chip *gc, unsigned offset)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, offset);
+	if (!ptr) return -EINVAL;
+
+	return ((*ptr) >> GPIO_BIT_READ) & 1;
+}
+
+static void amd_fch_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
+{
+	struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
+	(void)priv;
+
+	seq_printf(s, "debug info not implemented yet\n");
+}
+
+static int amd_fch_gpio_request(struct gpio_chip *chip, unsigned gpio_pin)
+{
+	if (gpio_pin < chip->ngpio)
+		return 0;
+
+	return -EINVAL;
+}
+
+static int amd_fch_gpio_probe(struct platform_device *pdev)
+{
+	struct amd_fch_gpio_priv *priv;
+	struct amd_fch_gpio_pdata *pdata = pdev->dev.platform_data;
+	int err;
+
+	if (!pdata) {
+		dev_err(&pdev->dev, "no platform_data\n");
+		return -ENOENT;
+	}
+
+	if (!(priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL))) {
+		dev_err(&pdev->dev, "failed to allocate priv struct\n");
+		return -ENOMEM;
+	}
+
+	priv->pdata	= pdata;
+	priv->pdev	= pdev;
+
+	priv->gc.owner			= THIS_MODULE;
+	priv->gc.parent			= &pdev->dev;
+	priv->gc.label			= dev_name(&pdev->dev);
+	priv->gc.base			= priv->pdata->gpio_base;
+	priv->gc.ngpio			= priv->pdata->gpio_num;
+	priv->gc.request		= amd_fch_gpio_request;
+	priv->gc.direction_input	= amd_fch_gpio_direction_input;
+	priv->gc.direction_output	= amd_fch_gpio_direction_output;
+	priv->gc.get_direction		= amd_fch_gpio_get_direction;
+	priv->gc.get			= amd_fch_gpio_get;
+	priv->gc.set			= amd_fch_gpio_set;
+
+	spin_lock_init(&priv->gc.bgpio_lock);
+
+	if (IS_ERR(priv->base = devm_ioremap_resource(&pdev->dev, &priv->pdata->res))) {
+		dev_err(&pdev->dev, "failed to map iomem\n");
+		return -ENXIO;
+	}
+
+	dev_info(&pdev->dev, "initializing on my own II\n");
+
+	if (IS_ENABLED(CONFIG_DEBUG_FS)) {
+		dev_info(&pdev->dev, "enabling debugfs\n");
+		priv->gc.dbg_show = amd_fch_gpio_dbg_show;
+	}
+
+	platform_set_drvdata(pdev, priv);
+
+	err = devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
+	dev_info(&pdev->dev, "probe finished\n");
+	return err;
+}
+
+static struct platform_driver amd_fch_gpio_driver = {
+	.driver = {
+		.name = AMD_FCH_GPIO_DRIVER_NAME,
+	},
+	.probe = amd_fch_gpio_probe,
+};
+
+module_platform_driver(amd_fch_gpio_driver);
+
+MODULE_AUTHOR("Enrico Weigelt, metux IT consult <info@metux.net>");
+MODULE_DESCRIPTION("AMD G-series FCH GPIO driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio_amd_fch");
diff --git a/include/linux/platform_data/x86/amd-fch-gpio-pdata.h b/include/linux/platform_data/x86/amd-fch-gpio-pdata.h
new file mode 100644
index 0000000..68c1730
--- /dev/null
+++ b/include/linux/platform_data/x86/amd-fch-gpio-pdata.h
@@ -0,0 +1,41 @@
+/*
+ * AMD FCH gpio driver platform-data
+ *
+ * Copyright (C) 2018 metux IT consult
+ * Author: Enrico Weigelt <info@metux.net>
+ *
+ * SPDX-License-Identifier: GPL
+ */
+
+#ifndef AMD_FCH_PDATA_H
+#define AMD_FCH_PDATA_H
+
+
+#include <linux/ioport.h>
+
+#define AMD_FCH_GPIO_DRIVER_NAME "gpio_amd_fch"
+
+/*
+ * struct amd_fch_gpio_reg - GPIO register definition
+ * @reg: register index
+ * @name: signal name
+ */
+struct amd_fch_gpio_reg {
+    int         reg;
+    const char* name;
+};
+
+/*
+ * struct amd_fch_gpio_pdata - GPIO chip platform data
+ * @resource: iomem range
+ * @gpio_reg: array of gpio registers
+ * @gpio_num: number of entries
+ */
+struct amd_fch_gpio_pdata {
+    struct resource          res;
+    int                      gpio_num;
+    struct amd_fch_gpio_reg *gpio_reg;
+    int                      gpio_base;
+};
+
+#endif /* AMD_FCH_PDATA_H */
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys platform driver
  2019-02-08  1:16 [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver Enrico Weigelt, metux IT consult
@ 2019-02-08  1:16 ` Enrico Weigelt, metux IT consult
  2019-02-08 14:30   ` Linus Walleij
  2019-02-08 14:25 ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio " Linus Walleij
  1 sibling, 1 reply; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-08  1:16 UTC (permalink / raw)
  To: linux-kernel
  Cc: Enrico Weigelt, metux IT consult, linux-gpio, linus.walleij,
	bgolaszewski, dvhart, andy, platform-driver-x86

From: "Enrico Weigelt, metux IT consult" <info@metux.net>

Driver for PCengines APUv2 board that supports GPIOs via AMD PCH
and attached LEDs and keys.

Cc: linux-gpio@vger.kernel.org
Cc: linus.walleij@linaro.org
Cc: bgolaszewski@baylibre.com
Cc: dvhart@infradead.org
Cc: andy@infradead.org
Cc: platform-driver-x86@vger.kernel.org

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
---
 MAINTAINERS                            |   5 +
 drivers/platform/x86/Kconfig           |   9 ++
 drivers/platform/x86/Makefile          |   1 +
 drivers/platform/x86/pcengines-apuv2.c | 263 +++++++++++++++++++++++++++++++++
 4 files changed, 278 insertions(+)
 create mode 100644 drivers/platform/x86/pcengines-apuv2.c

diff --git a/MAINTAINERS b/MAINTAINERS
index b9bc500..9abcc47 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11515,6 +11515,11 @@ F:	lib/parman.c
 F:	lib/test_parman.c
 F:	include/linux/parman.h
 
+PC ENGINES APU BOARD DRIVER
+M:	Enrico Weigelt, metux IT consult <info@metux.net>
+S:	Maintained
+F:	drivers/platform/x86/pcengines-apuv2.c
+
 PC87360 HARDWARE MONITORING DRIVER
 M:	Jim Cromie <jim.cromie@gmail.com>
 L:	linux-hwmon@vger.kernel.org
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index b5e9db8..a77d705 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -1303,6 +1303,15 @@ config HUAWEI_WMI
 	  To compile this driver as a module, choose M here: the module
 	  will be called huawei-wmi.
 
+config PCENGINES_APU2
+	tristate "LEDs and buttons driver for PC Engines APUv2 board"
+	depends on GPIO_AMD_FCH
+	depends on KEYBOARD_GPIO
+	depends on KEYBOARD_GPIO_POLLED
+	depends on LEDS_GPIO
+	---help---
+	  This options adds APUv2 board support for LEDs and keys
+
 endif # X86_PLATFORM_DEVICES
 
 config PMC_ATOM
diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
index ce8da26..86cb766 100644
--- a/drivers/platform/x86/Makefile
+++ b/drivers/platform/x86/Makefile
@@ -96,3 +96,4 @@ obj-$(CONFIG_INTEL_TURBO_MAX_3) += intel_turbo_max_3.o
 obj-$(CONFIG_INTEL_CHTDC_TI_PWRBTN)	+= intel_chtdc_ti_pwrbtn.o
 obj-$(CONFIG_I2C_MULTI_INSTANTIATE)	+= i2c-multi-instantiate.o
 obj-$(CONFIG_INTEL_ATOMISP2_PM)	+= intel_atomisp2_pm.o
+obj-$(CONFIG_PCENGINES_APU2)	+= pcengines-apuv2.o
diff --git a/drivers/platform/x86/pcengines-apuv2.c b/drivers/platform/x86/pcengines-apuv2.c
new file mode 100644
index 0000000..9bb89d6
--- /dev/null
+++ b/drivers/platform/x86/pcengines-apuv2.c
@@ -0,0 +1,263 @@
+/*
+ * PC-Engines APUv2 board platform driver for gpio buttons and LEDs
+ *
+ * Copyright (C) 2018 metux IT consult
+ * Author: Enrico Weigelt <info@metux.net>
+ */
+
+// SPDX-License-Identifier: GPL+
+
+#include <linux/dmi.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/platform_data/x86/amd-fch-gpio-pdata.h>
+
+/* TODO
+   * support apu1 board (different fch, different register layouts
+   * add spinlocks
+*/
+
+#define FCH_ACPI_MMIO_BASE	0xFED80000
+#define FCH_GPIO_OFFSET		0x1500
+#define FCH_GPIO_SIZE		0x300
+
+#define GPIO_BASE		100
+
+#define GPIO_LED1		(GPIO_BASE+0)
+#define GPIO_LED2		(GPIO_BASE+1)
+#define GPIO_LED3		(GPIO_BASE+2)
+#define GPIO_MODESW		(GPIO_BASE+3)
+#define GPIO_SIMSWAP		(GPIO_BASE+4)
+
+struct board_data {
+	const char		*name;
+	struct resource		res;
+	int			gpio_num;
+	int			gpio_base;
+	struct amd_fch_gpio_reg	*gpio_regs;
+};
+
+static const struct gpio_led apu2_leds[] /* __initconst */ = {
+	{ .name = "apu:green:1", .gpio = GPIO_LED1, .active_low = 1, },
+	{ .name = "apu:green:2", .gpio = GPIO_LED2, .active_low = 1, },
+	{ .name = "apu:green:3", .gpio = GPIO_LED3, .active_low = 1, }
+};
+
+static const struct gpio_led_platform_data apu2_leds_pdata /* __initconst */ = {
+	.num_leds	= ARRAY_SIZE(apu2_leds),
+	.leds		= apu2_leds,
+};
+
+static struct amd_fch_gpio_reg apu2_gpio_regs[] = {
+	{ 0x44 }, // GPIO_57 -- LED1
+	{ 0x45 }, // GPIO_58 -- LED2
+	{ 0x46 }, // GPIO_59 -- LED3
+	{ 0x59 }, // GPIO_32 -- LED4 -- GE32 -- #modesw
+	{ 0x5A }, // GPIO_33 -- LED5 -- GE33 -- simswap
+	{ 0x42 }, // GPIO_51 -- LED6
+	{ 0x43 }, // GPIO_55 -- LED7
+	{ 0x47 }, // GPIO_64 -- LED8
+	{ 0x48 }, // GPIO_68 -- LED9
+	{ 0x4C }, // GPIO_70 -- LED10
+};
+
+static struct gpio_keys_button apu2_keys_buttons[] = {
+	{
+		.code			= KEY_A,
+		.gpio			= GPIO_MODESW,
+		.active_low		= 1,
+		.desc			= "modeswitch",
+		.type			= EV_KEY, /* or EV_SW ? */
+		.debounce_interval	= 10,
+		.value			= 1,
+	}
+};
+
+static const struct gpio_keys_platform_data apu2_keys_pdata = {
+	.buttons	= apu2_keys_buttons,
+	.nbuttons	= ARRAY_SIZE(apu2_keys_buttons),
+	.poll_interval	= 100,
+	.rep		= 0,
+	.name		= "apu2-keys",
+};
+
+static const struct amd_fch_gpio_pdata board_apu2 = {
+	.res		= DEFINE_RES_MEM_NAMED(FCH_ACPI_MMIO_BASE + FCH_GPIO_OFFSET,
+					       FCH_GPIO_SIZE,
+					       "apu2-gpio-iomem"),
+	.gpio_num	= ARRAY_SIZE(apu2_gpio_regs),
+	.gpio_reg	= apu2_gpio_regs,
+	.gpio_base	= GPIO_BASE,
+};
+
+/* note: matching works on string prefix, so "apu2" must come before "apu" */
+static const struct dmi_system_id apu_gpio_dmi_table[] __initconst = {
+
+	/* APU2 w/ legacy bios < 4.0.8 */
+	{
+		.ident		= "apu2",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
+			DMI_MATCH(DMI_BOARD_NAME, "APU2")
+		},
+		.driver_data	= (void*)&board_apu2,
+	},
+	/* APU2 w/ legacy bios >= 4.0.8 */
+	{
+		.ident		= "apu2",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
+			DMI_MATCH(DMI_BOARD_NAME, "apu2")
+		},
+		.driver_data	= (void*)&board_apu2,
+	},
+	/* APU2 w/ maainline bios */
+	{
+		.ident		= "apu2",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
+			DMI_MATCH(DMI_BOARD_NAME, "PC Engines apu2")
+		},
+		.driver_data	= (void*)&board_apu2,
+	},
+
+	/* APU3 w/ legacy bios < 4.0.8 */
+	{
+		.ident		= "apu3",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
+			DMI_MATCH(DMI_BOARD_NAME, "APU3")
+		},
+		.driver_data = (void*)&board_apu2,
+	},
+	/* APU3 w/ legacy bios >= 4.0.8 */
+	{
+		.ident       = "apu3",
+		.matches     = {
+			DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
+			DMI_MATCH(DMI_BOARD_NAME, "apu3")
+		},
+		.driver_data = (void*)&board_apu2,
+	},
+	/* APU3 w/ mainline bios */
+	{
+		.ident       = "apu3",
+		.matches     = {
+			DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
+			DMI_MATCH(DMI_BOARD_NAME, "PC Engines apu3")
+		},
+		.driver_data = (void*)&board_apu2,
+	},
+
+	/* APU1 */
+	/* not supported yet - the register set is pretty different
+	{
+		.ident       = "apu",
+		.matches     = {
+			DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "APU")
+		},
+		.driver_data = (void*)&board_apu1,
+	},
+	*/
+	{}
+};
+
+static struct platform_device *apu_gpio_pdev = NULL;
+static struct platform_device *apu_leds_pdev = NULL;
+static struct platform_device *apu_keys_pdev = NULL;
+
+static int __init apu_gpio_init(void)
+{
+	int rc;
+	const struct dmi_system_id *dmi = dmi_first_match(apu_gpio_dmi_table);
+
+	if (!dmi) {
+		pr_err(KBUILD_MODNAME ": failed to detect apu board via dmi\n");
+		return -ENODEV;
+	}
+
+	pr_info(KBUILD_MODNAME ": registering gpio\n");
+	if (IS_ERR(apu_gpio_pdev = platform_device_register_resndata(
+			NULL,					/* parent */
+			AMD_FCH_GPIO_DRIVER_NAME,		/* name */
+			-1,					/* id */
+			NULL,					/* res */
+			0,					/* res_num */
+			dmi->driver_data,			/* platform_data */
+			sizeof(struct amd_fch_gpio_pdata)))) {
+		pr_err(KBUILD_MODNAME ": failed registering gpio device\n");
+		rc = PTR_ERR(apu_gpio_pdev);
+		goto fail;
+	}
+
+	pr_info(KBUILD_MODNAME ": registering leds\n");
+	if (IS_ERR(apu_leds_pdev = platform_device_register_resndata(
+			NULL,					/* parent */
+			"leds-gpio",				/* driver name */
+			-1,					/* id */
+			NULL,					/* res */
+			0,					/* ren_num */
+			&apu2_leds_pdata,			/* platform data */
+			sizeof(apu2_leds_pdata)))) {
+		pr_err(KBUILD_MODNAME ": failed registering leds device\n");
+		rc = PTR_ERR(apu_leds_pdev);
+		goto fail;
+	}
+
+	pr_info(KBUILD_MODNAME ": registering keys\n");
+	if (IS_ERR(apu_keys_pdev = platform_device_register_resndata(
+			NULL,					/* parent */
+			"gpio-keys-polled",			/* driver name */
+			-1,					/* id */
+			NULL,					/* res */
+			0,					/* res_num */
+			&apu2_keys_pdata,			/* platform_data */
+			sizeof(apu2_keys_pdata)))) {
+		pr_err(KBUILD_MODNAME ": failed registering keys device\n");
+		rc = PTR_ERR(apu_keys_pdev);
+		goto fail;
+	}
+
+	pr_info(KBUILD_MODNAME ": initialized: gpio, leds, keys\n");
+	return 0;
+
+fail:
+	if (!IS_ERR(apu_keys_pdev))
+		platform_device_unregister(apu_keys_pdev);
+	if (!IS_ERR(apu_leds_pdev))
+		platform_device_unregister(apu_leds_pdev);
+	if (!IS_ERR(apu_gpio_pdev))
+		platform_device_unregister(apu_gpio_pdev);
+
+	pr_err(KBUILD_MODNAME ": probe FAILED: %d\n", rc);
+	return rc;
+}
+
+static void __exit apu_gpio_exit(void)
+{
+	if (!IS_ERR(apu_keys_pdev))
+		platform_device_unregister(apu_keys_pdev);
+	if (!IS_ERR(apu_leds_pdev))
+		platform_device_unregister(apu_leds_pdev);
+	if (!IS_ERR(apu_gpio_pdev))
+		platform_device_unregister(apu_gpio_pdev);
+}
+
+module_init(apu_gpio_init);
+module_exit(apu_gpio_exit);
+
+MODULE_AUTHOR("Enrico Weigelt, metux IT consult <info@metux.net>");
+MODULE_DESCRIPTION("PC Engines APUv2 board GPIO/LED/keys driver");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(dmi, apu_gpio_dmi_table);
+MODULE_ALIAS("platform:apu-board");
+MODULE_SOFTDEP("pre: gpio_amd_fch");
+MODULE_SOFTDEP("pre: gpio_keys");
+MODULE_SOFTDEP("pre: gpio_keys_polled");
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-08  1:16 [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver Enrico Weigelt, metux IT consult
  2019-02-08  1:16 ` [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys " Enrico Weigelt, metux IT consult
@ 2019-02-08 14:25 ` Linus Walleij
  2019-02-08 15:20   ` Andy Shevchenko
                     ` (3 more replies)
  1 sibling, 4 replies; 21+ messages in thread
From: Linus Walleij @ 2019-02-08 14:25 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

Hi Enrico!

Thanks for your patch! I would really like Andy to have a look at it
too, he's more on top of things in the x86 world.

On Fri, Feb 8, 2019 at 2:16 AM Enrico Weigelt, metux IT consult
<lkml@metux.net> wrote:

> From: "Enrico Weigelt, metux IT consult" <info@metux.net>
>
> GPIO platform driver for the AMD G-series PCH (eg. on GX-412TC)
>
> This driver doesn't registers itself automatically, as it needs to
> be provided with platform specific configuration, provided by some
> board driver setup code.
>
> Didn't implement oftree probing yet, as it's rarely found on x86.
>
> Cc: linux-gpio@vger.kernel.org
> Cc: linus.walleij@linaro.org
> Cc: bgolaszewski@baylibre.com
> Cc: dvhart@infradead.org
> Cc: andy@infradead.org
> Cc: platform-driver-x86@vger.kernel.org
>
> Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>

(...)

> +config GPIO_AMD_FCH
> +       tristate "GPIO support for AMD Fusion Controller Hub (G-series SOCs)"
> +       select GPIO_GENERIC

You are selecting GPIO_GENERIC, is this necessary? I thought
X86 was already selecting this.

> +/*
> + * GPIO driver for the AMD G series FCH (eg. GX-412TC)
> + *
> + * Copyright (C) 2018 metux IT consult
> + * Author: Enrico Weigelt <info@metux.net>
> + *
> + * SPDX-License-Identifier: GPL+
> + */

I think checkpatch will complain on that SPDX thing.
Copy something from one of the other drivers, it should be
on the first line of the file.

> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/gpio/driver.h>
> +#include <linux/platform_data/x86/amd-fch-gpio-pdata.h>
> +
> +
> +#define GPIO_BIT_DIR           23
> +#define GPIO_BIT_WRITE         22
> +#define GPIO_BIT_READ          16
> +
> +

Cut down the excessive newlines.

> +static void amd_fch_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
> +{
> +       struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
> +       (void)priv;
> +
> +       seq_printf(s, "debug info not implemented yet\n");
> +}

I think you can just skip implementing this then.

> +static int amd_fch_gpio_request(struct gpio_chip *chip, unsigned gpio_pin)
> +{
> +       if (gpio_pin < chip->ngpio)
> +               return 0;
> +
> +       return -EINVAL;
> +}

You can probably skip this too. The core already does this check.

> +       priv->gc.owner                  = THIS_MODULE;
> +       priv->gc.parent                 = &pdev->dev;
> +       priv->gc.label                  = dev_name(&pdev->dev);
> +       priv->gc.base                   = priv->pdata->gpio_base;

No please, use priv->gc.base = -1;

> +       dev_info(&pdev->dev, "initializing on my own II\n");

Drop this.

> +       if (IS_ENABLED(CONFIG_DEBUG_FS)) {
> +               dev_info(&pdev->dev, "enabling debugfs\n");
> +               priv->gc.dbg_show = amd_fch_gpio_dbg_show;
> +       }

I think you can drop this too.

> +       platform_set_drvdata(pdev, priv);
> +
> +       err = devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
> +       dev_info(&pdev->dev, "probe finished\n");

If you keep this info, write something more helpful.

> +/*
> + * struct amd_fch_gpio_reg - GPIO register definition
> + * @reg: register index
> + * @name: signal name
> + */
> +struct amd_fch_gpio_reg {
> +    int         reg;
> +    const char* name;
> +};

Can't you put this in the driver file?

> +struct amd_fch_gpio_pdata {
> +    struct resource          res;
> +    int                      gpio_num;
> +    struct amd_fch_gpio_reg *gpio_reg;
> +    int                      gpio_base;
> +};

Drop gpio_base. We don't hardcode the GPIO base anymore.
Use the character device instead if you want it because of
userspace thingies. (See tools/gpio/*)

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys platform driver
  2019-02-08  1:16 ` [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys " Enrico Weigelt, metux IT consult
@ 2019-02-08 14:30   ` Linus Walleij
  2019-02-08 15:21     ` Andy Shevchenko
  2019-02-11 10:38     ` Enrico Weigelt, metux IT consult
  0 siblings, 2 replies; 21+ messages in thread
From: Linus Walleij @ 2019-02-08 14:30 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On Fri, Feb 8, 2019 at 2:16 AM Enrico Weigelt, metux IT consult
<lkml@metux.net> wrote:

> From: "Enrico Weigelt, metux IT consult" <info@metux.net>
>
> Driver for PCengines APUv2 board that supports GPIOs via AMD PCH
> and attached LEDs and keys.
>
> Cc: linux-gpio@vger.kernel.org
> Cc: linus.walleij@linaro.org
> Cc: bgolaszewski@baylibre.com
> Cc: dvhart@infradead.org
> Cc: andy@infradead.org
> Cc: platform-driver-x86@vger.kernel.org
>
> Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>

Andy can provide more details on this patch here are some quick
remarks:

> +#define GPIO_BASE              100
> +
> +#define GPIO_LED1              (GPIO_BASE+0)
> +#define GPIO_LED2              (GPIO_BASE+1)
> +#define GPIO_LED3              (GPIO_BASE+2)
> +#define GPIO_MODESW            (GPIO_BASE+3)
> +#define GPIO_SIMSWAP           (GPIO_BASE+4)

Instead of hardcoding the GPIO base and offsets like this, use:

#include <linux/gpio/machine.h>

and define a descriptor table using the name of your gpiochip.
There should be examples of other board quirks doing this.
I have already patched gpio-leds.c to accept LEDs from
descriptor tables, see commit
commit 45d4c6de4e497e5b0026c77044ae5fcddf8fecd8
"leds: gpio: Try to lookup gpiod from device"

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-08 14:25 ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio " Linus Walleij
@ 2019-02-08 15:20   ` Andy Shevchenko
  2019-02-08 17:47   ` Joe Perches
                     ` (2 subsequent siblings)
  3 siblings, 0 replies; 21+ messages in thread
From: Andy Shevchenko @ 2019-02-08 15:20 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Enrico Weigelt, metux IT consult, linux-kernel, Enrico Weigelt,
	metux IT consult, open list:GPIO SUBSYSTEM, Bartosz Golaszewski,
	Darren Hart, Andy Shevchenko, platform-driver-x86

On Fri, Feb 8, 2019 at 4:26 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> Hi Enrico!
>
> Thanks for your patch! I would really like Andy to have a look at it
> too, he's more on top of things in the x86 world.

Seems that is the same version sent twice. I already gave a long review on it.

-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys platform driver
  2019-02-08 14:30   ` Linus Walleij
@ 2019-02-08 15:21     ` Andy Shevchenko
  2019-02-11 10:38     ` Enrico Weigelt, metux IT consult
  1 sibling, 0 replies; 21+ messages in thread
From: Andy Shevchenko @ 2019-02-08 15:21 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Enrico Weigelt, metux IT consult, linux-kernel, Enrico Weigelt,
	metux IT consult, open list:GPIO SUBSYSTEM, Bartosz Golaszewski,
	Darren Hart, Andy Shevchenko, platform-driver-x86

On Fri, Feb 8, 2019 at 4:31 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> On Fri, Feb 8, 2019 at 2:16 AM Enrico Weigelt, metux IT consult
> <lkml@metux.net> wrote:

> Andy can provide more details on this patch here are some quick
> remarks:

Already done this on the first submission of the same patch.

-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-08 14:25 ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio " Linus Walleij
  2019-02-08 15:20   ` Andy Shevchenko
@ 2019-02-08 17:47   ` Joe Perches
  2019-02-08 20:44     ` [PATCH] checkpatch: Add test for SPDX-License-Identifier on wrong line # Joe Perches
  2019-02-11 10:46   ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver Enrico Weigelt, metux IT consult
  2019-02-14  9:56   ` Enrico Weigelt, metux IT consult
  3 siblings, 1 reply; 21+ messages in thread
From: Joe Perches @ 2019-02-08 17:47 UTC (permalink / raw)
  To: Linus Walleij, Enrico Weigelt, metux IT consult
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On Fri, 2019-02-08 at 15:25 +0100, Linus Walleij wrote:
> > +/*
> > + * GPIO driver for the AMD G series FCH (eg. GX-412TC)
> > + *
> > + * Copyright (C) 2018 metux IT consult
> > + * Author: Enrico Weigelt <info@metux.net>
> > + *
> > + * SPDX-License-Identifier: GPL+
> > + */
> 
> I think checkpatch will complain on that SPDX thing.
> Copy something from one of the other drivers, it should be
> on the first line of the file.

Actually, checkpatch will complain that there isn't
an SPDX license on line 1 but will not complain about
the existence of an SPDX license on other line numbers.

Perhaps checkpatch _should_ complain when it sees an
SPDX license identifier outside the expected line.




^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH] checkpatch: Add test for SPDX-License-Identifier on wrong line #
  2019-02-08 17:47   ` Joe Perches
@ 2019-02-08 20:44     ` Joe Perches
  2019-02-11 12:41       ` Enrico Weigelt, metux IT consult
  0 siblings, 1 reply; 21+ messages in thread
From: Joe Perches @ 2019-02-08 20:44 UTC (permalink / raw)
  To: Andrew Morton; +Cc: LKML, Linus Walleij, Enrico Weigelt, metux IT consult

Warn when any SPDX-License-Identifier: tag is not created
on the proper line number.

Signed-off-by: Joe Perches <joe@perches.com>
---
 scripts/checkpatch.pl | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 216480ae29d1..d0001fd1112d 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -3075,6 +3075,14 @@ sub process {
 # check we are in a valid source file if not then ignore this hunk
 		next if ($realfile !~ /\.(h|c|s|S|sh|dtsi|dts)$/);
 
+# check for using SPDX-License-Identifier on the wrong line number
+		if ($realline != $checklicenseline &&
+		    $rawline =~ /\bSPDX-License-Identifier:/ &&
+		    substr($line, @-, @+ - @-) eq "$;" x (@+ - @-)) {
+			WARN("SPDX_LICENSE_TAG",
+			     "Misplaced SPDX-License-Identifier tag - use line $checklicenseline instead\n" . $herecurr);
+		}
+
 # line length limit (with some exclusions)
 #
 # There are a few types of lines that may extend beyond $max_line_length:


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* Re: [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys platform driver
  2019-02-08 14:30   ` Linus Walleij
  2019-02-08 15:21     ` Andy Shevchenko
@ 2019-02-11 10:38     ` Enrico Weigelt, metux IT consult
  2019-02-13  9:35       ` Linus Walleij
  1 sibling, 1 reply; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-11 10:38 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On 08.02.19 15:30, Linus Walleij wrote:

Hi,

> Instead of hardcoding the GPIO base and offsets like this, use:
> 
> #include <linux/gpio/machine.h>
> 
> and define a descriptor table using the name of your gpiochip.
> There should be examples of other board quirks doing this.
> I have already patched gpio-leds.c to accept LEDs from
> descriptor tables, see commit
> commit 45d4c6de4e497e5b0026c77044ae5fcddf8fecd8
> "leds: gpio: Try to lookup gpiod from device"

Still trying to understand how that actually works ...

I'm now defining the leds pdata and gpio mapping this way:

static const struct gpio_led apu2_leds[] = {
    { .name = "apu:green:1" },
    { .name = "apu:green:2" },
    { .name = "apu:green:3" }
};

struct gpiod_lookup_table gpios_led_table[] = {
    .dev_id = "leds-gpio.0",
    .table = {
        GPIO_LOOKUP_IDX("gpio.0", 0, "led", 0, GPIO_ACTIVE_LOW),
        GPIO_LOOKUP_IDX("gpio.0", 1, "led", 1, GPIO_ACTIVE_LOW),
        GPIO_LOOKUP_IDX("gpio.0", 2, "led", 2, GPIO_ACTIVE_LOW),
    }
};

But unsure now to determine the correct names for dev_id (the
leds-gpio instance ?) and the gpio chip. In the example, these
seem to be autogenerated - how can I retrieve them from my
actual devices ?

By the way: does that also work with gpio-keys-polled ?


--mtx

-- 
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-08 14:25 ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio " Linus Walleij
  2019-02-08 15:20   ` Andy Shevchenko
  2019-02-08 17:47   ` Joe Perches
@ 2019-02-11 10:46   ` Enrico Weigelt, metux IT consult
  2019-02-13  9:02     ` Linus Walleij
  2019-02-14  9:56   ` Enrico Weigelt, metux IT consult
  3 siblings, 1 reply; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-11 10:46 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On 08.02.19 15:25, Linus Walleij wrote:

Hi,

<snip>

>> +/*>> + * struct amd_fch_gpio_reg - GPIO register definition>> + * @reg:
register index>> + * @name: signal name>> + */>> +struct
amd_fch_gpio_reg {>> +    int         reg;>> +    const char* name;>>
+};> > Can't you put this in the driver file?
I'm afraid, I can't. Because the board driver needs to tell the
gpio driver which gpio's we actually have. This seems to be really
board specific, and the register layout of the FCHs gpio bank seems
to be not actually linear (or maybe the pin naming is just weird)

What I really don't want is undocumented registers or lines being
exposed as gpio somewhere (not knowing what they actually do).
Therefore, I'd like to add only those gpio registers that I can
confirm being safe - at least until I've managed to get more
information.


--mtx

-- 
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH] checkpatch: Add test for SPDX-License-Identifier on wrong line #
  2019-02-08 20:44     ` [PATCH] checkpatch: Add test for SPDX-License-Identifier on wrong line # Joe Perches
@ 2019-02-11 12:41       ` Enrico Weigelt, metux IT consult
  2019-02-11 12:49         ` Joe Perches
  0 siblings, 1 reply; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-11 12:41 UTC (permalink / raw)
  To: Joe Perches, Andrew Morton; +Cc: LKML, Linus Walleij

On 08.02.19 21:44, Joe Perches wrote:
> Warn when any SPDX-License-Identifier: tag is not created
> on the proper line number.

By the way: there are corner cases, which can't have it at the first
line, eg. scripts.


--mtx

-- 
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH] checkpatch: Add test for SPDX-License-Identifier on wrong line #
  2019-02-11 12:41       ` Enrico Weigelt, metux IT consult
@ 2019-02-11 12:49         ` Joe Perches
  0 siblings, 0 replies; 21+ messages in thread
From: Joe Perches @ 2019-02-11 12:49 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult, Andrew Morton; +Cc: LKML, Linus Walleij

On Mon, 2019-02-11 at 13:41 +0100, Enrico Weigelt, metux IT consult
wrote:
> On 08.02.19 21:44, Joe Perches wrote:
> > Warn when any SPDX-License-Identifier: tag is not created
> > on the proper line number.
> 
> By the way: there are corner cases, which can't have it at the first
> line, eg. scripts.

Which I believe the patch and script handles.

Please provide a sample if the script does not
operate properly.


^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-11 10:46   ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver Enrico Weigelt, metux IT consult
@ 2019-02-13  9:02     ` Linus Walleij
  2019-02-14  9:53       ` Enrico Weigelt, metux IT consult
  0 siblings, 1 reply; 21+ messages in thread
From: Linus Walleij @ 2019-02-13  9:02 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On Mon, Feb 11, 2019 at 11:46 AM Enrico Weigelt, metux IT consult
<lkml@metux.net> wrote:
> On 08.02.19 15:25, Linus Walleij wrote:

> >> +/*>> + * struct amd_fch_gpio_reg - GPIO register definition>> + * @reg:
> register index>> + * @name: signal name>> + */>> +struct
> amd_fch_gpio_reg {>> +    int         reg;>> +    const char* name;>>
> +};> > Can't you put this in the driver file?
>
> I'm afraid, I can't. Because the board driver needs to tell the
> gpio driver which gpio's we actually have. This seems to be really
> board specific, and the register layout of the FCHs gpio bank seems
> to be not actually linear (or maybe the pin naming is just weird)
>
> What I really don't want is undocumented registers or lines being
> exposed as gpio somewhere (not knowing what they actually do).
> Therefore, I'd like to add only those gpio registers that I can
> confirm being safe - at least until I've managed to get more
> information.

What we normally do is expose all the lines from a gpio chip
as kernel abstraction.

This is because at least in theory this chip can be used by
several boards.

The chip abstraction does have facilities for masking off
unavailable lines: in struct gpio_chip there is .valid_mask
and even a callback .init_valid_mask() to set it up.

This is currently used on ACPI systems to mask off an
make unavailable lines that are handled by firmware/BIOS.

So this is what you should use to make existing lines
unavailable, do not try to hide them by not exposing
registers or line offsets. The abstraction should model
the hardware, not the usecase.

Imposing a restriction from a board is a new thing,
and would involve setting these masks somehow using
machine data from <linux/gpio/machine.h>,
I am sure we can figure something out if you absolutely
need this.

FYI there are tons of systems out there that expose a
whole range of GPIOs that the developer have no clue
where they are connected on the PCB, the most common
case is that they are not connected (sometimes not
even leaving the chip die) or go to test points. They are
very seldom dangerous, in fact I've never seen dangerous
GPIOs, just dangerous set-ups of pins already known
to be in use for something.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys platform driver
  2019-02-11 10:38     ` Enrico Weigelt, metux IT consult
@ 2019-02-13  9:35       ` Linus Walleij
  2019-02-14 10:57         ` Enrico Weigelt, metux IT consult
  0 siblings, 1 reply; 21+ messages in thread
From: Linus Walleij @ 2019-02-13  9:35 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On Mon, Feb 11, 2019 at 11:39 AM Enrico Weigelt, metux IT consult
<lkml@metux.net> wrote:

> struct gpiod_lookup_table gpios_led_table[] = {
>     .dev_id = "leds-gpio.0",
>     .table = {
>         GPIO_LOOKUP_IDX("gpio.0", 0, "led", 0, GPIO_ACTIVE_LOW),
>         GPIO_LOOKUP_IDX("gpio.0", 1, "led", 1, GPIO_ACTIVE_LOW),
>         GPIO_LOOKUP_IDX("gpio.0", 2, "led", 2, GPIO_ACTIVE_LOW),
>     }
> };
>
> But unsure now to determine the correct names for dev_id (the
> leds-gpio instance ?) and the gpio chip. In the example, these
> seem to be autogenerated - how can I retrieve them from my
> actual devices ?

It is a bit tricky.

For the dev_id you need to be aware of the following from
<linux/platform_device.h>:
#define PLATFORM_DEVID_NONE     (-1)
#define PLATFORM_DEVID_AUTO     (-2)

If the platform device has .id set to -1 it will be just "leds-gpio",
if it is -2 it will be whatever, take a chance on .0 or ideally fix
it up. Any positive number like .id = 4 becomes "leds-gpio.4".

So figure out the .id field on the platform device.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-13  9:02     ` Linus Walleij
@ 2019-02-14  9:53       ` Enrico Weigelt, metux IT consult
  0 siblings, 0 replies; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-14  9:53 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On 13.02.19 10:02, Linus Walleij wrote:

Hi,

> What we normally do is expose all the lines from a gpio chip> as kernel abstraction.> > This is because at least in theory this chip
can be used by> several boards.
I'm afraid it's a bit more complicated. The register set doesn't
seem to be linear. I have absolutely no idea what the undocumented
registers do. For the sake of security, I would hate to see them
accessible from userland.

> The chip abstraction does have facilities for masking off
> unavailable lines: in struct gpio_chip there is .valid_mask
> and even a callback .init_valid_mask() to set it up.

Okay, but then again I'd need to pass this from the board
driver into the gpio driver. Feels much easier and safer to
just pass the registers.

What I perhaps could do: add all documented registers as gpio's
in the gpio driver and make the board driver a dummy consumer
for the unused ones.

> So this is what you should use to make existing lines
> unavailable, do not try to hide them by not exposing
> registers or line offsets. The abstraction should model
> the hardware, not the usecase.

According to my information, it is the hardware who dictates that
non-linear layout. Even the PIN naming is non-linear. And I don't
like to see this passed to upper layers, or even userland. So,
at least the gpio driver should only serve the documented gpios
and present them lineary.

Maybe the holes in the register set are technically also gpios,
but used by some internal logic and not properly masked out in
hw - really weird things (possibly damage) could happen.

> FYI there are tons of systems out there that expose a
> whole range of GPIOs that the developer have no clue
> where they are connected on the PCB, the most common
> case is that they are not connected (sometimes not
> even leaving the chip die) or go to test points. They are
> very seldom dangerous, in fact I've never seen dangerous
> GPIOs, just dangerous set-ups of pins already known
> to be in use for something.

Can't speak about standard ICs/SoCs, but i've seen such things
in some of my client's fpga designs. For example incomplete
decoders, gpios attached to internal state machines, etc, etc
So, I've learned to be *very* cautious with undocumented registers.


--mtx

-- 
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-08 14:25 ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio " Linus Walleij
                     ` (2 preceding siblings ...)
  2019-02-11 10:46   ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver Enrico Weigelt, metux IT consult
@ 2019-02-14  9:56   ` Enrico Weigelt, metux IT consult
  2019-02-20  9:37     ` Linus Walleij
  3 siblings, 1 reply; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-14  9:56 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On 08.02.19 15:25, Linus Walleij wrote:

Hi,

>> +config GPIO_AMD_FCH
>> +       tristate "GPIO support for AMD Fusion Controller Hub (G-series SOCs)"
>> +       select GPIO_GENERIC
> 
> You are selecting GPIO_GENERIC, is this necessary? I thought
> X86 was already selecting this.

Doesn't look so - at least haven't found anything where it's
automatically selected on x86. OTOH, that wouldn't make much
sense to me  - I somewhat doubt that x86 can't run w/o that.

Maybe ACPI selects it (haven't checked yet), but my driver is
completely independent from ACPI (the board's BIOS doesn't
provide any useful entries here), ACPI isn't x86 specific
(anymore), and I'd guess x86 boards can run w/o ACPI.
(actually, I'm considering hacking up a completely oftree
based bootup on x86 ;-)).

IMHO, dependencies should always be direct - indirect ones could
suddenly change in subtle ways.

> I think checkpatch will complain on that SPDX thing.
> Copy something from one of the other drivers, it should be
> on the first line of the file.

Yeah, that's a really helpful tool. Maybe I should do some more
automatisation on handling/editing whole patch queues ...
(unless somebody else already did it).

> Cut down the excessive newlines.

Is there some standard rule on this ? Maybe something that checkpatch.pl
could automatically catch ?

>> +static void amd_fch_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
>> +{
>> +       struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
>> +       (void)priv;
>> +
>> +       seq_printf(s, "debug info not implemented yet\n");
>> +}
> 
> I think you can just skip implementing this then.

Yep, forgot to clean that up.

>> +static int amd_fch_gpio_request(struct gpio_chip *chip, unsigned gpio_pin)
>> +{
>> +       if (gpio_pin < chip->ngpio)
>> +               return 0;
>> +
>> +       return -EINVAL;
>> +}
> 
> You can probably skip this too. The core already does this check.

Okay, wasn't sure about that, so I preferred defensive programming.

>> +       priv->gc.owner                  = THIS_MODULE;
>> +       priv->gc.parent                 = &pdev->dev;
>> +       priv->gc.label                  = dev_name(&pdev->dev);
>> +       priv->gc.base                   = priv->pdata->gpio_base;
> 
> No please, use priv->gc.base = -1;

Could I also leave that field untouched (IOW: =0) ?

>> +/*
>> + * struct amd_fch_gpio_reg - GPIO register definition
>> + * @reg: register index
>> + * @name: signal name
>> + */
>> +struct amd_fch_gpio_reg {
>> +    int         reg;
>> +    const char* name;
>> +};
> 
> Can't you put this in the driver file?

See other mails.
Need to pass in the board specific register assignments.

>> +struct amd_fch_gpio_pdata {
>> +    struct resource          res;
>> +    int                      gpio_num;
>> +    struct amd_fch_gpio_reg *gpio_reg;
>> +    int                      gpio_base;
>> +};
> 
> Drop gpio_base. We don't hardcode the GPIO base anymore.

Done. I had to patch gpio-keys-polled driver first.


--mtx

-- 
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys platform driver
  2019-02-13  9:35       ` Linus Walleij
@ 2019-02-14 10:57         ` Enrico Weigelt, metux IT consult
  0 siblings, 0 replies; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-14 10:57 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On 13.02.19 10:35, Linus Walleij wrote:

> For the dev_id you need to be aware of the following from> <linux/platform_device.h>:> #define PLATFORM_DEVID_NONE     (-1)>
#define PLATFORM_DEVID_AUTO     (-2)>> If the platform device has .id
set to -1 it will be just "leds-gpio",> if it is -2 it will be whatever,
take a chance on .0 or ideally fix> it up. Any positive number like .id
= 4 becomes "leds-gpio.4".> > So figure out the .id field on the
platform device.

Hacked up some debuging into the lookup code and found that it's
just "leds-gpio" and "gpio-keys-polled" in my case. I've just got one
instance of each right now and used PLATFORM_DEVID_NONE.

--mtx

-- 
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-14  9:56   ` Enrico Weigelt, metux IT consult
@ 2019-02-20  9:37     ` Linus Walleij
  0 siblings, 0 replies; 21+ messages in thread
From: Linus Walleij @ 2019-02-20  9:37 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult
  Cc: linux-kernel, Enrico Weigelt, metux IT consult,
	open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Darren Hart,
	Andy Shevchenko, platform-driver-x86

On Thu, Feb 14, 2019 at 10:56 AM Enrico Weigelt, metux IT consult
<lkml@metux.net> wrote:
> On 08.02.19 15:25, Linus Walleij wrote:
>
> >> +config GPIO_AMD_FCH
> >> +       tristate "GPIO support for AMD Fusion Controller Hub (G-series SOCs)"
> >> +       select GPIO_GENERIC
> >
> > You are selecting GPIO_GENERIC, is this necessary? I thought
> > X86 was already selecting this.
>
> Doesn't look so - at least haven't found anything where it's
> automatically selected on x86. OTOH, that wouldn't make much
> sense to me  - I somewhat doubt that x86 can't run w/o that.

Sorry my bad. You should select this if you use it, but are you
using the GPIO MMIO abstractions?
The hallmark of those implementations are that they
call bgpio_init() and this driver does not, and it seems
with the funny layout of the registers it can't even use
it anyway.

> IMHO, dependencies should always be direct - indirect ones could
> suddenly change in subtle ways.

Agreed.

> >> +       priv->gc.owner                  = THIS_MODULE;
> >> +       priv->gc.parent                 = &pdev->dev;
> >> +       priv->gc.label                  = dev_name(&pdev->dev);
> >> +       priv->gc.base                   = priv->pdata->gpio_base;
> >
> > No please, use priv->gc.base = -1;
>
> Could I also leave that field untouched (IOW: =0) ?

No unfortunately not, because 0 is a valid GPIO base.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-07 18:06 ` Andy Shevchenko
@ 2019-02-08 13:50   ` Enrico Weigelt, metux IT consult
  0 siblings, 0 replies; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-08 13:50 UTC (permalink / raw)
  To: Andy Shevchenko, Enrico Weigelt, metux IT consult
  Cc: Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	Bartosz Golaszewski, Linus Walleij, Platform Driver,
	Andy Shevchenko, Darren Hart

On 07.02.19 19:06, Andy Shevchenko wrote:

Hi,

> Overall I have a feeling that this driver can be replaced with> existing generic one where one register per pin is allocated.>
Unfortunately, I didn't look deep into this and hope Linus will help> to
figure this out.
this also was my first thought, but i recall the generic one copes w/
devices that have per-flag- instead of per channel-registers
(IOW: all direction flags in one register, all level flags in another).
correct me if I'm wrong ..

I actually considered writing a generic per-register driver, where one
just configures which bit does what. But it didn't feel worth the extra
effort yet. OTOH, if we would have lots of consumers, the situation
would be different.

>> @@ -0,0 +1,171 @@
>> +/*
>> + * GPIO driver for the AMD G series FCH (eg. GX-412TC)
>> + *
>> + * Copyright (C) 2018 metux IT consult
>> + * Author: Enrico Weigelt <info@metux.net>
>> + *
> 
>> + * SPDX-License-Identifier: GPL+
> 
> SPDX should go as a separate first line in a proper format.

Fixed.
Maybe I should write an automatic check for that ;-)

By the way: are there already some tools that actually operate on that ?

>> +#define GPIO_BIT_DIR           23
>> +#define GPIO_BIT_WRITE         22
>> +#define GPIO_BIT_READ          16
> 
> Oh, namespace issues.
> What about using BIT() macro?

Ah, thanks, forgot that.

By the way: would it be a good idea to define a struct w/ bitfields
for the registers, instead of directly doing bitmask operations ?


>> +static uint32_t *amd_fch_gpio_addr(struct gpio_chip *gc, unsigned gpio)
>> +{
>> +       struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
>> +
> 
>> +       if (gpio > priv->pdata->gpio_num) {
>> +               dev_err(&priv->pdev->dev, "gpio number %d out of range\n", gpio);
>> +               return NULL;
>> +       }
> 
> On which circumstances it may happen?

hopefully never, but I'm a bit paranoid ;-)
Shall I kick out that check ?

>> +       return priv->base + priv->pdata->gpio_reg[gpio].reg*sizeof(u32);
>> +}
>> +
>> +static int amd_fch_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
>> +{
> 
>> +       volatile uint32_t *ptr = amd_fch_gpio_addr(gc, offset);
> 
> volatile?!
> 
> I think you need to use readl()/writel() (or their _relaxed variants) instead.

I assumed the compiler would already emit the correct code (and not try
any optimizations) if the field is declared volatile. But I'll change it
to readl()/writel().

By the way: do we already have helpers for doing such bit operations on
mmapped registers ? (eg. similar to those in bitops.h)

> Same applies for entire code.
> 
>> +       if (!ptr) return -EINVAL;
> 
> This code has style issues.
> Check your entire file.

Should it be written in two lines - like that ?

    if (!ptr)
        return -EINVAL;

>> +static int amd_fch_gpio_request(struct gpio_chip *chip, unsigned gpio_pin)
>> +{
> 
>> +       if (gpio_pin < chip->ngpio)
>> +               return 0;
> 
> Is it even possible?

Not sure. AFAIK, this function should check whether the requested pin is
available. Feels safer to me having this check.

>> +static int amd_fch_gpio_probe(struct platform_device *pdev)
>> +{
>> +       struct amd_fch_gpio_priv *priv;
> 
>> +       struct amd_fch_gpio_pdata *pdata = pdev->dev.platform_data;
> 
> We have a helper to get this. platform_get_data() IIRC.

found dev_get_platdata(const struct device *dev).

but nothing for working on struct platform_device directly - should we
introduce one ?

>> +       if (IS_ERR(priv->base = devm_ioremap_resource(&pdev->dev, &priv->pdata->res))) {
> 
>> +               dev_err(&pdev->dev, "failed to map iomem\n");
> 
> Noise (that function will print a message)
> 
>> +               return -ENXIO;
> 
> Shadowed error code.

Which one shall I use instead ?

>> +MODULE_LICENSE("GPL");
> 
> License mismatch. I really don't look what 'GPL+' means. OTOH I know
> this one corresponds to GPL-2.0+.

Typo, should have been GPL-2.0+.

>> + * struct amd_fch_gpio_reg - GPIO register definition
>> + * @reg: register index
>> + * @name: signal name
>> + */
>> +struct amd_fch_gpio_reg {
>> +    int         reg;
>> +    const char* name;
>> +};
> 
> Isn't this provided by GPIO library? We have so called labels.

hmm, haven't found a proper struct yet.

struct gpio indeed has a label and two int fields. but it doesn't seem
to be designed for holding register addresses ... using this one here
feels quite abusive. (and a waste of memory, too).

for consistency, I could rename 'name' to 'label', if you wish.


thanks for your review.


--mtx

-- 
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
  2019-02-07 17:13 Enrico Weigelt, metux IT consult
@ 2019-02-07 18:06 ` Andy Shevchenko
  2019-02-08 13:50   ` Enrico Weigelt, metux IT consult
  0 siblings, 1 reply; 21+ messages in thread
From: Andy Shevchenko @ 2019-02-07 18:06 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult
  Cc: Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	Bartosz Golaszewski, Linus Walleij, Platform Driver,
	Andy Shevchenko, Darren Hart

On Thu, Feb 7, 2019 at 7:14 PM Enrico Weigelt, metux IT consult
<info@metux.net> wrote:
>
> GPIO platform driver for the AMD G-series PCH (eg. on GX-412TC)
>
> This driver doesn't registers itself automatically, as it needs to
> be provided with platform specific configuration, provided by some
> board driver setup code.
>
> Didn't implement oftree probing yet, as it's rarely found on x86.

Thanks for the patch, see my comments below.

Overall I have a feeling that this driver can be replaced with
existing generic one where one register per pin is allocated.
Unfortunately, I didn't look deep into this and hope Linus will help
to figure this out.

> @@ -0,0 +1,171 @@
> +/*
> + * GPIO driver for the AMD G series FCH (eg. GX-412TC)
> + *
> + * Copyright (C) 2018 metux IT consult
> + * Author: Enrico Weigelt <info@metux.net>
> + *

> + * SPDX-License-Identifier: GPL+

SPDX should go as a separate first line in a proper format.

> + */

> +// FIXME: add spinlocks

Then fix them and come again.

> +#include <linux/init.h>
> +#include <linux/module.h>

One of them should be present, another one dropped.

> +#define GPIO_BIT_DIR           23
> +#define GPIO_BIT_WRITE         22
> +#define GPIO_BIT_READ          16

Oh, namespace issues.
What about using BIT() macro?

> +
> +

Why two blank lines?

> +static uint32_t *amd_fch_gpio_addr(struct gpio_chip *gc, unsigned gpio)
> +{
> +       struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
> +

> +       if (gpio > priv->pdata->gpio_num) {
> +               dev_err(&priv->pdev->dev, "gpio number %d out of range\n", gpio);
> +               return NULL;
> +       }

On which circumstances it may happen?

> +
> +       return priv->base + priv->pdata->gpio_reg[gpio].reg*sizeof(u32);
> +}
> +
> +static int amd_fch_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
> +{

> +       volatile uint32_t *ptr = amd_fch_gpio_addr(gc, offset);

volatile?!

I think you need to use readl()/writel() (or their _relaxed variants) instead.
Same applies for entire code.

> +       if (!ptr) return -EINVAL;

This code has style issues.
Check your entire file.

> +
> +       *ptr &= ~(1 << GPIO_BIT_DIR);
> +       return 0;
> +}

> +static void amd_fch_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
> +{
> +       struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
> +       (void)priv;
> +
> +       seq_printf(s, "debug info not implemented yet\n");
> +}

Remove whatever is not implemented and not required to have a stub.

> +static int amd_fch_gpio_request(struct gpio_chip *chip, unsigned gpio_pin)
> +{

> +       if (gpio_pin < chip->ngpio)
> +               return 0;

Is it even possible?

> +
> +       return -EINVAL;
> +}


> +
> +static int amd_fch_gpio_probe(struct platform_device *pdev)
> +{
> +       struct amd_fch_gpio_priv *priv;

> +       struct amd_fch_gpio_pdata *pdata = pdev->dev.platform_data;

We have a helper to get this. platform_get_data() IIRC.

> +       int err;
> +
> +       if (!pdata) {
> +               dev_err(&pdev->dev, "no platform_data\n");
> +               return -ENOENT;
> +       }
> +

> +       if (!(priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL))) {

Should be two lines.

> +               dev_err(&pdev->dev, "failed to allocate priv struct\n");

Noise.

> +               return -ENOMEM;
> +       }
> +

> +       if (IS_ERR(priv->base = devm_ioremap_resource(&pdev->dev, &priv->pdata->res))) {

> +               dev_err(&pdev->dev, "failed to map iomem\n");

Noise (that function will print a message)

> +               return -ENXIO;

Shadowed error code.

> +       }
> +

> +       dev_info(&pdev->dev, "initializing on my own II\n");

Noise.

> +

> +       if (IS_ENABLED(CONFIG_DEBUG_FS)) {

Do you really care?

> +               dev_info(&pdev->dev, "enabling debugfs\n");

Noise.

> +               priv->gc.dbg_show = amd_fch_gpio_dbg_show;
> +       }
> +
> +       platform_set_drvdata(pdev, priv);
> +

> +       err = devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
> +       dev_info(&pdev->dev, "probe finished\n");
> +       return err;

return devm_gpiochip_add_data(...);

> +}

> +MODULE_LICENSE("GPL");

License mismatch. I really don't look what 'GPL+' means. OTOH I know
this one corresponds to GPL-2.0+.

> +++ b/include/linux/platform_data/x86/amd-fch-gpio-pdata.h
> @@ -0,0 +1,41 @@
> +/*
> + * AMD FCH gpio driver platform-data
> + *
> + * Copyright (C) 2018 metux IT consult
> + * Author: Enrico Weigelt <info@metux.net>
> + *

> + * SPDX-License-Identifier: GPL

Same comments.

> + */

> +/*

It's not marked as kernel doc.

> + * struct amd_fch_gpio_reg - GPIO register definition
> + * @reg: register index
> + * @name: signal name
> + */
> +struct amd_fch_gpio_reg {
> +    int         reg;
> +    const char* name;
> +};

Isn't this provided by GPIO library? We have so called labels.

> +/*
> + * struct amd_fch_gpio_pdata - GPIO chip platform data
> + * @resource: iomem range
> + * @gpio_reg: array of gpio registers
> + * @gpio_num: number of entries
> + */
> +struct amd_fch_gpio_pdata {
> +    struct resource          res;
> +    int                      gpio_num;
> +    struct amd_fch_gpio_reg *gpio_reg;
> +    int                      gpio_base;
> +};

-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver
@ 2019-02-07 17:13 Enrico Weigelt, metux IT consult
  2019-02-07 18:06 ` Andy Shevchenko
  0 siblings, 1 reply; 21+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2019-02-07 17:13 UTC (permalink / raw)
  To: linux-kernel
  Cc: linux-gpio, bgolaszewski, linus.walleij, platform-driver-x86,
	andy, dvhart

GPIO platform driver for the AMD G-series PCH (eg. on GX-412TC)

This driver doesn't registers itself automatically, as it needs to
be provided with platform specific configuration, provided by some
board driver setup code.

Didn't implement oftree probing yet, as it's rarely found on x86.

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
---
 MAINTAINERS                                        |   7 +
 drivers/gpio/Kconfig                               |  10 ++
 drivers/gpio/Makefile                              |   1 +
 drivers/gpio/gpio-amd-fch.c                        | 171 +++++++++++++++++++++
 .../linux/platform_data/x86/amd-fch-gpio-pdata.h   |  41 +++++
 5 files changed, 230 insertions(+)
 create mode 100644 drivers/gpio/gpio-amd-fch.c
 create mode 100644 include/linux/platform_data/x86/amd-fch-gpio-pdata.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 8c68de3c..a693f39 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -766,6 +766,13 @@ S:	Supported
 F:	Documentation/hwmon/fam15h_power
 F:	drivers/hwmon/fam15h_power.c
 
+AMD FCH GPIO DRIVER
+M:	Enrico Weigelt, metux IT consult <info@metux.net>
+L:	linux-gpio@vger.kernel.org
+S:	Maintanced
+F:	drivers/gpio/gpio-amd-fch.c
+F:	include/linux/platform_data/x86/amd-fch-gpio-pdata.h
+
 AMD GEODE CS5536 USB DEVICE CONTROLLER DRIVER
 L:	linux-geode@lists.infradead.org (moderated for non-subscribers)
 S:	Orphan
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index b5a2845..a3e47c8 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -654,6 +654,16 @@ config GPIO_LOONGSON1
 	help
 	  Say Y or M here to support GPIO on Loongson1 SoCs.
 
+config GPIO_AMD_FCH
+	tristate "GPIO support for AMD Fusion Controller Hub (G-series SOCs)"
+	select GPIO_GENERIC
+	help
+	  This option enables driver for GPIO on AMDs Fusion Controller Hub,
+	  as found on G-series SOCs (eg. GX-412TC)
+
+	  Note: This driver doesn't registers itself automatically, as it
+	  needs to be provided with platform specific configuration.
+	  (See eg. CONFIG_PCENGINES_APU2.)
 endmenu
 
 menu "Port-mapped I/O GPIO drivers"
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 37628f8..bb48fd2 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_GPIO_ADP5520)	+= gpio-adp5520.o
 obj-$(CONFIG_GPIO_ADP5588)	+= gpio-adp5588.o
 obj-$(CONFIG_GPIO_ALTERA)  	+= gpio-altera.o
 obj-$(CONFIG_GPIO_ALTERA_A10SR)	+= gpio-altera-a10sr.o
+obj-$(CONFIG_GPIO_AMD_FCH)	+= gpio-amd-fch.o
 obj-$(CONFIG_GPIO_AMD8111)	+= gpio-amd8111.o
 obj-$(CONFIG_GPIO_AMDPT)	+= gpio-amdpt.o
 obj-$(CONFIG_GPIO_ARIZONA)	+= gpio-arizona.o
diff --git a/drivers/gpio/gpio-amd-fch.c b/drivers/gpio/gpio-amd-fch.c
new file mode 100644
index 0000000..8a002453
--- /dev/null
+++ b/drivers/gpio/gpio-amd-fch.c
@@ -0,0 +1,171 @@
+/*
+ * GPIO driver for the AMD G series FCH (eg. GX-412TC)
+ *
+ * Copyright (C) 2018 metux IT consult
+ * Author: Enrico Weigelt <info@metux.net>
+ *
+ * SPDX-License-Identifier: GPL+
+ */
+
+// FIXME: add spinlocks
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/gpio/driver.h>
+#include <linux/platform_data/x86/amd-fch-gpio-pdata.h>
+
+
+#define GPIO_BIT_DIR		23
+#define GPIO_BIT_WRITE		22
+#define GPIO_BIT_READ		16
+
+
+struct amd_fch_gpio_priv {
+	struct platform_device		*pdev;
+	struct gpio_chip		gc;
+	void __iomem			*base;
+	struct amd_fch_gpio_pdata	*pdata;
+};
+
+static uint32_t *amd_fch_gpio_addr(struct gpio_chip *gc, unsigned gpio)
+{
+	struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
+
+	if (gpio > priv->pdata->gpio_num) {
+		dev_err(&priv->pdev->dev, "gpio number %d out of range\n", gpio);
+		return NULL;
+	}
+
+	return priv->base + priv->pdata->gpio_reg[gpio].reg*sizeof(u32);
+}
+
+static int amd_fch_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, offset);
+	if (!ptr) return -EINVAL;
+
+	*ptr &= ~(1 << GPIO_BIT_DIR);
+	return 0;
+}
+
+static int amd_fch_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, int value)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, gpio);
+	if (!ptr) return -EINVAL;
+
+	*ptr |= (1 << GPIO_BIT_DIR);
+	return 0;
+}
+
+static int amd_fch_gpio_get_direction(struct gpio_chip *gc, unsigned gpio)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, gpio);
+	if (!ptr) return -EINVAL;
+
+	return (*ptr >> GPIO_BIT_DIR) & 1;
+}
+
+static void amd_fch_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, gpio);
+	if (!ptr) return;
+
+	if (value)
+		*ptr |= (1 << GPIO_BIT_WRITE);
+	else
+		*ptr &= ~(1 << GPIO_BIT_WRITE);
+}
+
+static int amd_fch_gpio_get(struct gpio_chip *gc, unsigned offset)
+{
+	volatile uint32_t *ptr = amd_fch_gpio_addr(gc, offset);
+	if (!ptr) return -EINVAL;
+
+	return ((*ptr) >> GPIO_BIT_READ) & 1;
+}
+
+static void amd_fch_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
+{
+	struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
+	(void)priv;
+
+	seq_printf(s, "debug info not implemented yet\n");
+}
+
+static int amd_fch_gpio_request(struct gpio_chip *chip, unsigned gpio_pin)
+{
+	if (gpio_pin < chip->ngpio)
+		return 0;
+
+	return -EINVAL;
+}
+
+static int amd_fch_gpio_probe(struct platform_device *pdev)
+{
+	struct amd_fch_gpio_priv *priv;
+	struct amd_fch_gpio_pdata *pdata = pdev->dev.platform_data;
+	int err;
+
+	if (!pdata) {
+		dev_err(&pdev->dev, "no platform_data\n");
+		return -ENOENT;
+	}
+
+	if (!(priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL))) {
+		dev_err(&pdev->dev, "failed to allocate priv struct\n");
+		return -ENOMEM;
+	}
+
+	priv->pdata	= pdata;
+	priv->pdev	= pdev;
+
+	priv->gc.owner			= THIS_MODULE;
+	priv->gc.parent			= &pdev->dev;
+	priv->gc.label			= dev_name(&pdev->dev);
+	priv->gc.base			= priv->pdata->gpio_base;
+	priv->gc.ngpio			= priv->pdata->gpio_num;
+	priv->gc.request		= amd_fch_gpio_request;
+	priv->gc.direction_input	= amd_fch_gpio_direction_input;
+	priv->gc.direction_output	= amd_fch_gpio_direction_output;
+	priv->gc.get_direction		= amd_fch_gpio_get_direction;
+	priv->gc.get			= amd_fch_gpio_get;
+	priv->gc.set			= amd_fch_gpio_set;
+
+	spin_lock_init(&priv->gc.bgpio_lock);
+
+	if (IS_ERR(priv->base = devm_ioremap_resource(&pdev->dev, &priv->pdata->res))) {
+		dev_err(&pdev->dev, "failed to map iomem\n");
+		return -ENXIO;
+	}
+
+	dev_info(&pdev->dev, "initializing on my own II\n");
+
+	if (IS_ENABLED(CONFIG_DEBUG_FS)) {
+		dev_info(&pdev->dev, "enabling debugfs\n");
+		priv->gc.dbg_show = amd_fch_gpio_dbg_show;
+	}
+
+	platform_set_drvdata(pdev, priv);
+
+	err = devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
+	dev_info(&pdev->dev, "probe finished\n");
+	return err;
+}
+
+static struct platform_driver amd_fch_gpio_driver = {
+	.driver = {
+		.name = AMD_FCH_GPIO_DRIVER_NAME,
+	},
+	.probe = amd_fch_gpio_probe,
+};
+
+module_platform_driver(amd_fch_gpio_driver);
+
+MODULE_AUTHOR("Enrico Weigelt, metux IT consult <info@metux.net>");
+MODULE_DESCRIPTION("AMD G-series FCH GPIO driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio_amd_fch");
diff --git a/include/linux/platform_data/x86/amd-fch-gpio-pdata.h b/include/linux/platform_data/x86/amd-fch-gpio-pdata.h
new file mode 100644
index 0000000..68c1730
--- /dev/null
+++ b/include/linux/platform_data/x86/amd-fch-gpio-pdata.h
@@ -0,0 +1,41 @@
+/*
+ * AMD FCH gpio driver platform-data
+ *
+ * Copyright (C) 2018 metux IT consult
+ * Author: Enrico Weigelt <info@metux.net>
+ *
+ * SPDX-License-Identifier: GPL
+ */
+
+#ifndef AMD_FCH_PDATA_H
+#define AMD_FCH_PDATA_H
+
+
+#include <linux/ioport.h>
+
+#define AMD_FCH_GPIO_DRIVER_NAME "gpio_amd_fch"
+
+/*
+ * struct amd_fch_gpio_reg - GPIO register definition
+ * @reg: register index
+ * @name: signal name
+ */
+struct amd_fch_gpio_reg {
+    int         reg;
+    const char* name;
+};
+
+/*
+ * struct amd_fch_gpio_pdata - GPIO chip platform data
+ * @resource: iomem range
+ * @gpio_reg: array of gpio registers
+ * @gpio_num: number of entries
+ */
+struct amd_fch_gpio_pdata {
+    struct resource          res;
+    int                      gpio_num;
+    struct amd_fch_gpio_reg *gpio_reg;
+    int                      gpio_base;
+};
+
+#endif /* AMD_FCH_PDATA_H */
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 21+ messages in thread

end of thread, other threads:[~2019-02-20  9:38 UTC | newest]

Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-08  1:16 [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver Enrico Weigelt, metux IT consult
2019-02-08  1:16 ` [PATCH 2/2] x86: pcengines apuv2 gpio/leds/keys " Enrico Weigelt, metux IT consult
2019-02-08 14:30   ` Linus Walleij
2019-02-08 15:21     ` Andy Shevchenko
2019-02-11 10:38     ` Enrico Weigelt, metux IT consult
2019-02-13  9:35       ` Linus Walleij
2019-02-14 10:57         ` Enrico Weigelt, metux IT consult
2019-02-08 14:25 ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio " Linus Walleij
2019-02-08 15:20   ` Andy Shevchenko
2019-02-08 17:47   ` Joe Perches
2019-02-08 20:44     ` [PATCH] checkpatch: Add test for SPDX-License-Identifier on wrong line # Joe Perches
2019-02-11 12:41       ` Enrico Weigelt, metux IT consult
2019-02-11 12:49         ` Joe Perches
2019-02-11 10:46   ` [PATCH 1/2] x86: gpio: AMD G-Series pch gpio platform driver Enrico Weigelt, metux IT consult
2019-02-13  9:02     ` Linus Walleij
2019-02-14  9:53       ` Enrico Weigelt, metux IT consult
2019-02-14  9:56   ` Enrico Weigelt, metux IT consult
2019-02-20  9:37     ` Linus Walleij
  -- strict thread matches above, loose matches on Subject: below --
2019-02-07 17:13 Enrico Weigelt, metux IT consult
2019-02-07 18:06 ` Andy Shevchenko
2019-02-08 13:50   ` Enrico Weigelt, metux IT consult

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