* [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60
@ 2019-11-01 9:20 Codrin Ciubotariu
2019-11-01 14:26 ` Ludovic.Desroches
2019-11-03 22:35 ` Linus Walleij
0 siblings, 2 replies; 4+ messages in thread
From: Codrin Ciubotariu @ 2019-11-01 9:20 UTC (permalink / raw)
To: linux-arm-kernel, linux-gpio, linux-kernel, devicetree
Cc: ludovic.desroches, linus.walleij, nicolas.ferre,
alexandre.belloni, robh+dt, claudiu.beznea, Codrin Ciubotariu
On SAM9X60, slewrate should be enabled on pins with a switching frequency
below 50Mhz. Since most of our pins do not exceed this value, we enable
slewrate by default. Pins with a switching value that exceeds 50Mhz will
have to explicitly disable slewrate.
This patch changes the ABI. However, the slewrate macros are only used
by SAM9X60 and, at this moment, there are no device-tree files available
for this platform.
Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
Changes in v2:
- updated commit message to reflect the ABI change
drivers/pinctrl/pinctrl-at91.c | 4 ++--
include/dt-bindings/pinctrl/at91.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 117075b5798f..c135149e84e9 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -85,8 +85,8 @@ enum drive_strength_bit {
DRIVE_STRENGTH_SHIFT)
enum slewrate_bit {
- SLEWRATE_BIT_DIS,
SLEWRATE_BIT_ENA,
+ SLEWRATE_BIT_DIS,
};
#define SLEWRATE_BIT_MSK(name) (SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
@@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
{
unsigned int tmp;
- if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
+ if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
return;
tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
index 3831f91fb3ba..e8e117306b1b 100644
--- a/include/dt-bindings/pinctrl/at91.h
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -27,8 +27,8 @@
#define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
#define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
-#define AT91_PINCTRL_SLEWRATE_DIS (0x0 << 9)
-#define AT91_PINCTRL_SLEWRATE_ENA (0x1 << 9)
+#define AT91_PINCTRL_SLEWRATE_ENA (0x0 << 9)
+#define AT91_PINCTRL_SLEWRATE_DIS (0x1 << 9)
#define AT91_PIOA 0
#define AT91_PIOB 1
--
2.20.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60
2019-11-01 9:20 [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60 Codrin Ciubotariu
@ 2019-11-01 14:26 ` Ludovic.Desroches
2019-11-01 22:26 ` Claudiu.Beznea
2019-11-03 22:35 ` Linus Walleij
1 sibling, 1 reply; 4+ messages in thread
From: Ludovic.Desroches @ 2019-11-01 14:26 UTC (permalink / raw)
To: Codrin.Ciubotariu
Cc: linux-arm-kernel, linux-gpio, linux-kernel, devicetree,
linus.walleij, Nicolas.Ferre, alexandre.belloni, robh+dt,
Claudiu.Beznea
On Fri, Nov 01, 2019 at 11:20:31AM +0200, Codrin Ciubotariu wrote:
> On SAM9X60, slewrate should be enabled on pins with a switching frequency
> below 50Mhz. Since most of our pins do not exceed this value, we enable
> slewrate by default. Pins with a switching value that exceeds 50Mhz will
> have to explicitly disable slewrate.
>
> This patch changes the ABI. However, the slewrate macros are only used
> by SAM9X60 and, at this moment, there are no device-tree files available
> for this platform.
>
> Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Thanks
> ---
>
> Changes in v2:
> - updated commit message to reflect the ABI change
>
> drivers/pinctrl/pinctrl-at91.c | 4 ++--
> include/dt-bindings/pinctrl/at91.h | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
> index 117075b5798f..c135149e84e9 100644
> --- a/drivers/pinctrl/pinctrl-at91.c
> +++ b/drivers/pinctrl/pinctrl-at91.c
> @@ -85,8 +85,8 @@ enum drive_strength_bit {
> DRIVE_STRENGTH_SHIFT)
>
> enum slewrate_bit {
> - SLEWRATE_BIT_DIS,
> SLEWRATE_BIT_ENA,
> + SLEWRATE_BIT_DIS,
> };
>
> #define SLEWRATE_BIT_MSK(name) (SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
> @@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
> {
> unsigned int tmp;
>
> - if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
> + if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
> return;
>
> tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
> index 3831f91fb3ba..e8e117306b1b 100644
> --- a/include/dt-bindings/pinctrl/at91.h
> +++ b/include/dt-bindings/pinctrl/at91.h
> @@ -27,8 +27,8 @@
> #define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
> #define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
>
> -#define AT91_PINCTRL_SLEWRATE_DIS (0x0 << 9)
> -#define AT91_PINCTRL_SLEWRATE_ENA (0x1 << 9)
> +#define AT91_PINCTRL_SLEWRATE_ENA (0x0 << 9)
> +#define AT91_PINCTRL_SLEWRATE_DIS (0x1 << 9)
>
> #define AT91_PIOA 0
> #define AT91_PIOB 1
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60
2019-11-01 14:26 ` Ludovic.Desroches
@ 2019-11-01 22:26 ` Claudiu.Beznea
0 siblings, 0 replies; 4+ messages in thread
From: Claudiu.Beznea @ 2019-11-01 22:26 UTC (permalink / raw)
To: Ludovic.Desroches, Codrin.Ciubotariu
Cc: linux-arm-kernel, linux-gpio, linux-kernel, devicetree,
linus.walleij, Nicolas.Ferre, alexandre.belloni, robh+dt
On 01.11.2019 16:26, Ludovic Desroches - M43218 wrote:
> On Fri, Nov 01, 2019 at 11:20:31AM +0200, Codrin Ciubotariu wrote:
>> On SAM9X60, slewrate should be enabled on pins with a switching frequency
>> below 50Mhz. Since most of our pins do not exceed this value, we enable
>> slewrate by default. Pins with a switching value that exceeds 50Mhz will
>> have to explicitly disable slewrate.
>>
>> This patch changes the ABI. However, the slewrate macros are only used
>> by SAM9X60 and, at this moment, there are no device-tree files available
>> for this platform.
>>
>> Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>
> Thanks
>
>> ---
>>
>> Changes in v2:
>> - updated commit message to reflect the ABI change
>>
>> drivers/pinctrl/pinctrl-at91.c | 4 ++--
>> include/dt-bindings/pinctrl/at91.h | 4 ++--
>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
>> index 117075b5798f..c135149e84e9 100644
>> --- a/drivers/pinctrl/pinctrl-at91.c
>> +++ b/drivers/pinctrl/pinctrl-at91.c
>> @@ -85,8 +85,8 @@ enum drive_strength_bit {
>> DRIVE_STRENGTH_SHIFT)
>>
>> enum slewrate_bit {
>> - SLEWRATE_BIT_DIS,
>> SLEWRATE_BIT_ENA,
>> + SLEWRATE_BIT_DIS,
>> };
>>
>> #define SLEWRATE_BIT_MSK(name) (SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
>> @@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
>> {
>> unsigned int tmp;
>>
>> - if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
>> + if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
>> return;
>>
>> tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
>> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
>> index 3831f91fb3ba..e8e117306b1b 100644
>> --- a/include/dt-bindings/pinctrl/at91.h
>> +++ b/include/dt-bindings/pinctrl/at91.h
>> @@ -27,8 +27,8 @@
>> #define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
>> #define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
>>
>> -#define AT91_PINCTRL_SLEWRATE_DIS (0x0 << 9)
>> -#define AT91_PINCTRL_SLEWRATE_ENA (0x1 << 9)
>> +#define AT91_PINCTRL_SLEWRATE_ENA (0x0 << 9)
>> +#define AT91_PINCTRL_SLEWRATE_DIS (0x1 << 9)
>>
>> #define AT91_PIOA 0
>> #define AT91_PIOB 1
>> --
>> 2.20.1
>>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60
2019-11-01 9:20 [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60 Codrin Ciubotariu
2019-11-01 14:26 ` Ludovic.Desroches
@ 2019-11-03 22:35 ` Linus Walleij
1 sibling, 0 replies; 4+ messages in thread
From: Linus Walleij @ 2019-11-03 22:35 UTC (permalink / raw)
To: Codrin Ciubotariu
Cc: Linux ARM, open list:GPIO SUBSYSTEM, linux-kernel,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Ludovic Desroches, Nicolas Ferre, Alexandre Belloni, Rob Herring,
Claudiu Beznea
On Fri, Nov 1, 2019 at 10:20 AM Codrin Ciubotariu
<codrin.ciubotariu@microchip.com> wrote:
> On SAM9X60, slewrate should be enabled on pins with a switching frequency
> below 50Mhz. Since most of our pins do not exceed this value, we enable
> slewrate by default. Pins with a switching value that exceeds 50Mhz will
> have to explicitly disable slewrate.
>
> This patch changes the ABI. However, the slewrate macros are only used
> by SAM9X60 and, at this moment, there are no device-tree files available
> for this platform.
>
> Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> ---
>
> Changes in v2:
> - updated commit message to reflect the ABI change
Patch applied with the ACKs.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 4+ messages in thread
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2019-11-01 9:20 [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60 Codrin Ciubotariu
2019-11-01 14:26 ` Ludovic.Desroches
2019-11-01 22:26 ` Claudiu.Beznea
2019-11-03 22:35 ` Linus Walleij
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