[PATCH 1/3] pinctrl: sunxi: Add of_xlate function

[PATCH 1/3] pinctrl: sunxi: Add of_xlate function

[Maxime Ripard]

Since the pin controller of sunxi chips is represented as a single bank
in the driver.
Since this is neither convenient nor represented that way in the
datasheets, define a custom of_xlate function with the layout <bank pin
flag>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/pinctrl/pinctrl-sunxi.c |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c
index 353f6a8..122eeca 100644
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@ -1261,6 +1261,24 @@ static void sunxi_pinctrl_gpio_set(struct gpio_chip *chip,
 	writel((value & DATA_PINS_MASK) << index, pctl->membase + reg);
 }
 
+static int sunxi_pinctrl_gpio_of_xlate(struct gpio_chip *gc,
+				const struct of_phandle_args *gpiospec,
+				u32 *flags)
+{
+	int pin, base;
+
+	base = PINS_PER_BANK * gpiospec->args[0];
+	pin = base + gpiospec->args[1];
+
+	if (pin > (gc->base + gc->ngpio))
+		return -EINVAL;
+
+	if (flags)
+		*flags = gpiospec->args[2];
+
+	return pin;
+}
+
 static struct gpio_chip sunxi_pinctrl_gpio_chip __devinitconst = {
 	.owner			= THIS_MODULE,
 	.request		= sunxi_pinctrl_gpio_request,
@@ -1269,6 +1287,8 @@ static struct gpio_chip sunxi_pinctrl_gpio_chip __devinitconst = {
 	.direction_output	= sunxi_pinctrl_gpio_direction_output,
 	.get			= sunxi_pinctrl_gpio_get,
 	.set			= sunxi_pinctrl_gpio_set,
+	.of_xlate		= sunxi_pinctrl_gpio_of_xlate,
+	.of_gpio_n_cells	= 3,
 	.can_sleep		= 0,
 };
 
-- 
1.7.10.4

Re: [PATCH 1/3] pinctrl: sunxi: Add of_xlate function

[Linus Walleij]

On Sun, Jan 27, 2013 at 8:02 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:

> Since the pin controller of sunxi chips is represented as a single bank
> in the driver.
> Since this is neither convenient nor represented that way in the
> datasheets, define a custom of_xlate function with the layout <bank pin
> flag>
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

This does not apply and I only have 1/3 it seems?

Sorry, help me understand which order these patches go in...

Here is my allwinner branch:
http://git.kernel.org/?p=linux/kernel/git/linusw/linux-pinctrl.git;a=shortlog;h=refs/heads/allwinner-sunxi

Yours,
Linus Walleij

Re: [PATCH 1/3] pinctrl: sunxi: Add of_xlate function

[Maxime Ripard]

Le 29/01/2013 23:41, Linus Walleij a écrit :
> On Sun, Jan 27, 2013 at 8:02 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> 
>> Since the pin controller of sunxi chips is represented as a single bank
>> in the driver.
>> Since this is neither convenient nor represented that way in the
>> datasheets, define a custom of_xlate function with the layout <bank pin
>> flag>
>>
>> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> 
> This does not apply and I only have 1/3 it seems?
> 
> Sorry, help me understand which order these patches go in...

My bad, I forgot to mention the order of the patchsets, and to cc you
for the all series... Sorry about that.

This patch should come after the patch series that adds the support for
the A10 SoCs in the pinctrl driver.

Do you want me to resend this serie and cc you?

Maxime

-- 
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH 1/3] pinctrl: sunxi: Add of_xlate function

[Linus Walleij]

On Tue, Jan 29, 2013 at 11:54 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Le 29/01/2013 23:41, Linus Walleij a écrit :
>> On Sun, Jan 27, 2013 at 8:02 PM, Maxime Ripard
>> <maxime.ripard@free-electrons.com> wrote:
>>
>>> Since the pin controller of sunxi chips is represented as a single bank
>>> in the driver.
>>> Since this is neither convenient nor represented that way in the
>>> datasheets, define a custom of_xlate function with the layout <bank pin
>>> flag>
>>>
>>> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>>
>> This does not apply and I only have 1/3 it seems?
>>
>> Sorry, help me understand which order these patches go in...
>
> My bad, I forgot to mention the order of the patchsets, and to cc you
> for the all series... Sorry about that.
>
> This patch should come after the patch series that adds the support for
> the A10 SoCs in the pinctrl driver.

I now tried to apply this on top of the A10 series and it
*still* does not apply.

> Do you want me to resend this serie and cc you?

Please rebase these three on my allwinner branch:
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
allwinner-sunxi

Seen here:
http://git.kernel.org/?p=linux/kernel/git/linusw/linux-pinctrl.git;a=shortlog;h=refs/heads/allwinner-sunxi

Yours,
Linus Walleij

[PATCH 2/3] sunxi: dts: Report the pinctrl nodes as gpio-controllers

[Maxime Ripard]

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun4i-a10.dtsi |    4 +++-
 arch/arm/boot/dts/sun5i-a13.dtsi |    4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index f99f60d..03d2b53 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -18,11 +18,13 @@
 	};
 
 	soc {
-		pinctrl@01c20800 {
+		pio: pinctrl@01c20800 {
 			compatible = "allwinner,sun4i-a10-pinctrl";
 			reg = <0x01c20800 0x400>;
+			gpio-controller;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			#gpio-cells = <3>;
 
 			uart0_pins_a: uart0@0 {
 				allwinner,pins = "PB22", "PB23";
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index e112189..945bfac 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -19,11 +19,13 @@
 	};
 
 	soc {
-		pinctrl@01c20800 {
+		pio: pinctrl@01c20800 {
 			compatible = "allwinner,sun5i-a13-pinctrl";
 			reg = <0x01c20800 0x400>;
+			gpio-controller;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			#gpio-cells = <3>;
 
 			uart1_pins_a: uart1@0 {
 				allwinner,pins = "PE10", "PE11";
-- 
1.7.10.4

[PATCH 3/3] sunxi: a13-olinuxino: Add user LED to the device tree

[Maxime Ripard]

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun5i-a13-olinuxino.dts |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 4a1e45d..33d1c7e 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -23,10 +23,30 @@
 	};
 
 	soc {
+		pinctrl@01c20800 {
+			led_pins_olinuxino: led_pins@0 {
+				allwinner,pins = "PG9";
+				allwinner,function = "gpio_out";
+				allwinner,drive = <1>;
+				allwinner,pull = <0>;
+			};
+		};
+
 		uart1: uart@01c28400 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&uart1_pins_b>;
 			status = "okay";
 		};
 	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins_olinuxino>;
+
+		power {
+			gpios = <&pio 6 9 0>;
+			default-state = "on";
+		};
+	};
 };
-- 
1.7.10.4

[PATCH 1/3] pinctrl: sunxi: Add of_xlate function

[Maxime Ripard]

Since the pin controller of sunxi chips is represented as a single bank
in the driver.
Since this is neither convenient nor represented that way in the
datasheets, define a custom of_xlate function with the layout <bank pin
flag>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/pinctrl/pinctrl-sunxi.c |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c
index e4d32c6..80b11e3 100644
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@ -1261,6 +1261,24 @@ static void sunxi_pinctrl_gpio_set(struct gpio_chip *chip,
 	writel((value & DATA_PINS_MASK) << index, pctl->membase + reg);
 }
 
+static int sunxi_pinctrl_gpio_of_xlate(struct gpio_chip *gc,
+				const struct of_phandle_args *gpiospec,
+				u32 *flags)
+{
+	int pin, base;
+
+	base = PINS_PER_BANK * gpiospec->args[0];
+	pin = base + gpiospec->args[1];
+
+	if (pin > (gc->base + gc->ngpio))
+		return -EINVAL;
+
+	if (flags)
+		*flags = gpiospec->args[2];
+
+	return pin;
+}
+
 static struct gpio_chip sunxi_pinctrl_gpio_chip = {
 	.owner			= THIS_MODULE,
 	.request		= sunxi_pinctrl_gpio_request,
@@ -1269,6 +1287,8 @@ static struct gpio_chip sunxi_pinctrl_gpio_chip = {
 	.direction_output	= sunxi_pinctrl_gpio_direction_output,
 	.get			= sunxi_pinctrl_gpio_get,
 	.set			= sunxi_pinctrl_gpio_set,
+	.of_xlate		= sunxi_pinctrl_gpio_of_xlate,
+	.of_gpio_n_cells	= 3,
 	.can_sleep		= 0,
 };
 
-- 
1.7.10.4

Re: [PATCH 1/3] pinctrl: sunxi: Add of_xlate function

[Linus Walleij]

On Sun, Feb 3, 2013 at 12:10 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:

> Since the pin controller of sunxi chips is represented as a single bank
> in the driver.
> Since this is neither convenient nor represented that way in the
> datasheets, define a custom of_xlate function with the layout <bank pin
> flag>
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Applied to my allwinner branch. I will soon lock down this branch
and merge it into devel so I mature my devel branch for the
merge window.

Yours,
Linus Walleij