* [PATCH] pinctrl: tegra: Use correct offset for pin group
@ 2021-10-25 11:09 Prathamesh Shete
2021-10-25 23:28 ` Linus Walleij
0 siblings, 1 reply; 2+ messages in thread
From: Prathamesh Shete @ 2021-10-25 11:09 UTC (permalink / raw)
To: linus.walleij, thierry.reding, jonathanh, linux-gpio,
linux-tegra, linux-kernel
Cc: smangipudi, pshete, kkartik
Function tegra_pinctrl_gpio_request_enable() and
tegra_pinctrl_gpio_disable_free() uses pin offset instead
of group offset, causing the driver to use wrong offset
to enable gpio.
Add a helper function tegra_pinctrl_get_group() to parse the
pin group and determine correct offset.
Signed-off-by: Kartik K <kkartik@nvidia.com>
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
---
drivers/pinctrl/tegra/pinctrl-tegra.c | 33 +++++++++++++++++++++++++--
1 file changed, 31 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index 195cfe557511..0471d9c7f0ba 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -275,6 +275,29 @@ static int tegra_pinctrl_set_mux(struct pinctrl_dev *pctldev,
return 0;
}
+static struct tegra_pingroup *tegra_pinctrl_get_group(struct pinctrl_dev *pctldev,
+ unsigned int offset)
+{
+ struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
+ struct tegra_pingroup *g;
+ unsigned int group, num_pins, j;
+ const unsigned int *pins;
+ int ret;
+
+ for (group = 0; group < pmx->soc->ngroups; ++group) {
+ ret = tegra_pinctrl_get_group_pins(pctldev, group, &pins, &num_pins);
+ if (ret < 0)
+ continue;
+ for (j = 0; j < num_pins; j++) {
+ if (offset == pins[j])
+ return &pmx->soc->groups[group];
+ }
+ }
+
+ dev_err(pctldev->dev, "Pingroup not found for pin %u\n", offset);
+ return NULL;
+}
+
static int tegra_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
unsigned int offset)
@@ -286,7 +309,10 @@ static int tegra_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
if (!pmx->soc->sfsel_in_mux)
return 0;
- group = &pmx->soc->groups[offset];
+ group = tegra_pinctrl_get_group(pctldev, offset);
+
+ if (!group)
+ return -EINVAL;
if (group->mux_reg < 0 || group->sfsel_bit < 0)
return -EINVAL;
@@ -309,7 +335,10 @@ static void tegra_pinctrl_gpio_disable_free(struct pinctrl_dev *pctldev,
if (!pmx->soc->sfsel_in_mux)
return;
- group = &pmx->soc->groups[offset];
+ group = tegra_pinctrl_get_group(pctldev, offset);
+
+ if (!group)
+ return -EINVAL;
if (group->mux_reg < 0 || group->sfsel_bit < 0)
return;
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] pinctrl: tegra: Use correct offset for pin group
2021-10-25 11:09 [PATCH] pinctrl: tegra: Use correct offset for pin group Prathamesh Shete
@ 2021-10-25 23:28 ` Linus Walleij
0 siblings, 0 replies; 2+ messages in thread
From: Linus Walleij @ 2021-10-25 23:28 UTC (permalink / raw)
To: Prathamesh Shete
Cc: thierry.reding, Jon Hunter, open list:GPIO SUBSYSTEM,
linux-tegra, linux-kernel, Suresh Mangipudi, kkartik
On Mon, Oct 25, 2021 at 1:10 PM Prathamesh Shete <pshete@nvidia.com> wrote:
> Function tegra_pinctrl_gpio_request_enable() and
> tegra_pinctrl_gpio_disable_free() uses pin offset instead
> of group offset, causing the driver to use wrong offset
> to enable gpio.
>
> Add a helper function tegra_pinctrl_get_group() to parse the
> pin group and determine correct offset.
>
> Signed-off-by: Kartik K <kkartik@nvidia.com>
> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 2+ messages in thread
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