* [PATCH] ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
@ 2020-01-06 21:52 Matthias Kaehlcke
2020-01-06 21:53 ` Doug Anderson
2020-01-07 21:55 ` Heiko Stuebner
0 siblings, 2 replies; 3+ messages in thread
From: Matthias Kaehlcke @ 2020-01-06 21:52 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Mark Rutland
Cc: linux-rockchip, Douglas Anderson, linux-kernel, linux-arm-kernel,
devicetree, Matthias Kaehlcke
The flash write protect pin is currently named 'FW_WP_AP', which is
how the signal is called in the schematics. The Chrome OS ABI
requires the pin to be named 'AP_FLASH_WP_L', which is also how
it is called on all other veyron devices. Rename the pin to match
the ABI.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---
arch/arm/boot/dts/rk3288-veyron-fievel.dts | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-veyron-fievel.dts b/arch/arm/boot/dts/rk3288-veyron-fievel.dts
index 9a0f55085839d9..d66e720390121d 100644
--- a/arch/arm/boot/dts/rk3288-veyron-fievel.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-fievel.dts
@@ -382,7 +382,11 @@ &gpio7 {
"PWR_LED1",
"TPM_INT_H",
"SPK_ON",
- "FW_WP_AP",
+ /*
+ * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
+ * it FW_WP_AP.
+ */
+ "AP_FLASH_WP_L",
"",
"CPU_NMI",
--
2.24.1.735.g03f4e72817-goog
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
2020-01-06 21:52 [PATCH] ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger Matthias Kaehlcke
@ 2020-01-06 21:53 ` Doug Anderson
2020-01-07 21:55 ` Heiko Stuebner
1 sibling, 0 replies; 3+ messages in thread
From: Doug Anderson @ 2020-01-06 21:53 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Heiko Stuebner, Rob Herring, Mark Rutland,
open list:ARM/Rockchip SoC...,
LKML, Linux ARM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
Hi,
On Mon, Jan 6, 2020 at 1:52 PM Matthias Kaehlcke <mka@chromium.org> wrote:
>
> The flash write protect pin is currently named 'FW_WP_AP', which is
> how the signal is called in the schematics. The Chrome OS ABI
> requires the pin to be named 'AP_FLASH_WP_L', which is also how
> it is called on all other veyron devices. Rename the pin to match
> the ABI.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>
> arch/arm/boot/dts/rk3288-veyron-fievel.dts | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
Reviewed-by: Douglas Anderson <dianders@chromium.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
2020-01-06 21:52 [PATCH] ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger Matthias Kaehlcke
2020-01-06 21:53 ` Doug Anderson
@ 2020-01-07 21:55 ` Heiko Stuebner
1 sibling, 0 replies; 3+ messages in thread
From: Heiko Stuebner @ 2020-01-07 21:55 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Rob Herring, Mark Rutland, linux-rockchip, Douglas Anderson,
linux-kernel, linux-arm-kernel, devicetree
Am Montag, 6. Januar 2020, 22:52:13 CET schrieb Matthias Kaehlcke:
> The flash write protect pin is currently named 'FW_WP_AP', which is
> how the signal is called in the schematics. The Chrome OS ABI
> requires the pin to be named 'AP_FLASH_WP_L', which is also how
> it is called on all other veyron devices. Rename the pin to match
> the ABI.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
applied for 5.6
Thanks
Heiko
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-01-06 21:52 [PATCH] ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger Matthias Kaehlcke
2020-01-06 21:53 ` Doug Anderson
2020-01-07 21:55 ` Heiko Stuebner
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