[PATCH v2 0/5] soc/fsl/qbman: DPAA QBMan fixes and additions

[PATCH v2 0/5] soc/fsl/qbman: DPAA QBMan fixes and additions

[Madalin Bucur]

This patch set brings a number of fixes and the option to control
the QMan portal interrupt coalescing.

Changes from v1:
 - change CPU 0 with any online CPU to allow CPU 0 to be taken offline
 - move common code in a function
 - address all places in the code where the portal interrupt was affined
   to CPU 0
 - remove unrelated change from patch adding 64 bit DMA addressing
   requirement

Madalin Bucur (2):
  soc/fsl/qbman: replace CPU 0 with any online CPU in hotplug handlers
  soc/fsl_qbman: export coalesce change API

Roy Pledge (3):
  soc/fsl/qbman: Check if CPU is offline when initializing portals
  soc/fsl/qbman: Add 64 bit DMA addressing requirement to QBMan
  soc/fsl/qbman: Use last response to determine valid bit

 drivers/soc/fsl/qbman/Kconfig       |  2 +-
 drivers/soc/fsl/qbman/bman.c        |  6 ++---
 drivers/soc/fsl/qbman/bman_portal.c |  4 ++-
 drivers/soc/fsl/qbman/dpaa_sys.h    | 20 ++++++++++++++
 drivers/soc/fsl/qbman/qman.c        | 53 ++++++++++++++++++++++++++++++++-----
 drivers/soc/fsl/qbman/qman_portal.c |  6 +++--
 include/soc/fsl/qman.h              | 27 +++++++++++++++++++
 7 files changed, 104 insertions(+), 14 deletions(-)

-- 
2.1.0

[PATCH v2 1/5] soc/fsl/qbman: Check if CPU is offline when initializing portals

[Madalin Bucur]

From: Roy Pledge <roy.pledge@nxp.com>

If the CPU to affine the portal interrupt is offline at boot time
affine the portal interrupt to another online CPU. If the CPU is later
brought online the hotplug handler will correctly adjust the affinity.
Moved common code in a function.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
---
 drivers/soc/fsl/qbman/bman.c     |  6 ++----
 drivers/soc/fsl/qbman/dpaa_sys.h | 20 ++++++++++++++++++++
 drivers/soc/fsl/qbman/qman.c     |  6 ++----
 3 files changed, 24 insertions(+), 8 deletions(-)

diff --git a/drivers/soc/fsl/qbman/bman.c b/drivers/soc/fsl/qbman/bman.c
index f9485cedc648..f84ab596bde8 100644
--- a/drivers/soc/fsl/qbman/bman.c
+++ b/drivers/soc/fsl/qbman/bman.c
@@ -562,11 +562,9 @@ static int bman_create_portal(struct bman_portal *portal,
 		dev_err(c->dev, "request_irq() failed\n");
 		goto fail_irq;
 	}
-	if (c->cpu != -1 && irq_can_set_affinity(c->irq) &&
-	    irq_set_affinity(c->irq, cpumask_of(c->cpu))) {
-		dev_err(c->dev, "irq_set_affinity() failed\n");
+
+	if (dpaa_set_portal_irq_affinity(c->dev, c->irq, c->cpu))
 		goto fail_affinity;
-	}
 
 	/* Need RCR to be empty before continuing */
 	ret = bm_rcr_get_fill(p);
diff --git a/drivers/soc/fsl/qbman/dpaa_sys.h b/drivers/soc/fsl/qbman/dpaa_sys.h
index 9f379000da85..ae8afa552b1e 100644
--- a/drivers/soc/fsl/qbman/dpaa_sys.h
+++ b/drivers/soc/fsl/qbman/dpaa_sys.h
@@ -111,4 +111,24 @@ int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,
 #define QBMAN_MEMREMAP_ATTR	MEMREMAP_WC
 #endif
 
+static inline int dpaa_set_portal_irq_affinity(struct device *dev,
+					       int irq, int cpu)
+{
+	int ret = 0;
+
+	if (!irq_can_set_affinity(irq)) {
+		dev_err(dev, "unable to set IRQ affinity\n");
+		return -EINVAL;
+	}
+
+	if (cpu == -1 || !cpu_online(cpu))
+		cpu = cpumask_any(cpu_online_mask);
+
+	ret = irq_set_affinity(irq, cpumask_of(cpu));
+	if (ret)
+		dev_err(dev, "irq_set_affinity() on CPU %d failed\n", cpu);
+
+	return ret;
+}
+
 #endif	/* __DPAA_SYS_H */
diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
index ecb22749df0b..0ffe7a1d0eae 100644
--- a/drivers/soc/fsl/qbman/qman.c
+++ b/drivers/soc/fsl/qbman/qman.c
@@ -1210,11 +1210,9 @@ static int qman_create_portal(struct qman_portal *portal,
 		dev_err(c->dev, "request_irq() failed\n");
 		goto fail_irq;
 	}
-	if (c->cpu != -1 && irq_can_set_affinity(c->irq) &&
-	    irq_set_affinity(c->irq, cpumask_of(c->cpu))) {
-		dev_err(c->dev, "irq_set_affinity() failed\n");
+
+	if (dpaa_set_portal_irq_affinity(c->dev, c->irq, c->cpu))
 		goto fail_affinity;
-	}
 
 	/* Need EQCR to be empty before continuing */
 	isdr &= ~QM_PIRQ_EQCI;
-- 
2.1.0

[PATCH v2 2/5] soc/fsl/qbman: replace CPU 0 with any online CPU in hotplug handlers

[Madalin Bucur]

The existing code sets portal IRQ affinity to CPU 0 in the
offline hotplug handler. If CPU 0 is offline this is invalid.
Use a different online CPU instead.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
---
 drivers/soc/fsl/qbman/bman_portal.c | 4 +++-
 drivers/soc/fsl/qbman/qman_portal.c | 6 ++++--
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/fsl/qbman/bman_portal.c b/drivers/soc/fsl/qbman/bman_portal.c
index 2f71f7df3465..088cdfa7c034 100644
--- a/drivers/soc/fsl/qbman/bman_portal.c
+++ b/drivers/soc/fsl/qbman/bman_portal.c
@@ -65,7 +65,9 @@ static int bman_offline_cpu(unsigned int cpu)
 	if (!pcfg)
 		return 0;
 
-	irq_set_affinity(pcfg->irq, cpumask_of(0));
+	/* use any other online CPU */
+	cpu = cpumask_any_but(cpu_online_mask, cpu);
+	irq_set_affinity(pcfg->irq, cpumask_of(cpu));
 	return 0;
 }
 
diff --git a/drivers/soc/fsl/qbman/qman_portal.c b/drivers/soc/fsl/qbman/qman_portal.c
index a120002b630e..4efd6ea598b1 100644
--- a/drivers/soc/fsl/qbman/qman_portal.c
+++ b/drivers/soc/fsl/qbman/qman_portal.c
@@ -195,8 +195,10 @@ static int qman_offline_cpu(unsigned int cpu)
 	if (p) {
 		pcfg = qman_get_qm_portal_config(p);
 		if (pcfg) {
-			irq_set_affinity(pcfg->irq, cpumask_of(0));
-			qman_portal_update_sdest(pcfg, 0);
+			/* select any other online CPU */
+			cpu = cpumask_any_but(cpu_online_mask, cpu);
+			irq_set_affinity(pcfg->irq, cpumask_of(cpu));
+			qman_portal_update_sdest(pcfg, cpu);
 		}
 	}
 	return 0;
-- 
2.1.0

[PATCH v2 3/5] soc/fsl/qbman: Add 64 bit DMA addressing requirement to QBMan

[Madalin Bucur]

From: Roy Pledge <roy.pledge@nxp.com>

The QBMan block is memory mapped on SoCs above a 32 bit (4 Gigabyte)
boundary so enabling 64 bit DMA addressing is needed for QBMan to
be usuable.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
---
 drivers/soc/fsl/qbman/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/fsl/qbman/Kconfig b/drivers/soc/fsl/qbman/Kconfig
index d570cb5fd381..b0943e541796 100644
--- a/drivers/soc/fsl/qbman/Kconfig
+++ b/drivers/soc/fsl/qbman/Kconfig
@@ -1,6 +1,6 @@
 menuconfig FSL_DPAA
 	bool "QorIQ DPAA1 framework support"
-	depends on (FSL_SOC_BOOKE || ARCH_LAYERSCAPE)
+	depends on ((FSL_SOC_BOOKE || ARCH_LAYERSCAPE) && ARCH_DMA_ADDR_T_64BIT)
 	select GENERIC_ALLOCATOR
 	help
 	  The Freescale Data Path Acceleration Architecture (DPAA) is a set of
-- 
2.1.0

[PATCH v2 4/5] soc/fsl/qbman: Use last response to determine valid bit

[Madalin Bucur]

From: Roy Pledge <roy.pledge@nxp.com>

Use the last valid response when determining what valid bit
to use next for management commands. This is needed in the
case that the portal was previously used by other software
like a bootloader or if the kernel is restarted without a
hardware reset.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
---
 drivers/soc/fsl/qbman/qman.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
index 0ffe7a1d0eae..99d0f87889b8 100644
--- a/drivers/soc/fsl/qbman/qman.c
+++ b/drivers/soc/fsl/qbman/qman.c
@@ -850,12 +850,24 @@ static inline void qm_mr_set_ithresh(struct qm_portal *portal, u8 ithresh)
 
 static inline int qm_mc_init(struct qm_portal *portal)
 {
+	u8 rr0, rr1;
 	struct qm_mc *mc = &portal->mc;
 
 	mc->cr = portal->addr.ce + QM_CL_CR;
 	mc->rr = portal->addr.ce + QM_CL_RR0;
-	mc->rridx = (mc->cr->_ncw_verb & QM_MCC_VERB_VBIT)
-		    ? 0 : 1;
+	/*
+	 * The expected valid bit polarity for the next CR command is 0
+	 * if RR1 contains a valid response, and is 1 if RR0 contains a
+	 * valid response. If both RR contain all 0, this indicates either
+	 * that no command has been executed since reset (in which case the
+	 * expected valid bit polarity is 1)
+	 */
+	rr0 = mc->rr->verb;
+	rr1 = (mc->rr+1)->verb;
+	if ((rr0 == 0 && rr1 == 0) || rr0 != 0)
+		mc->rridx = 1;
+	else
+		mc->rridx = 0;
 	mc->vbit = mc->rridx ? QM_MCC_VERB_VBIT : 0;
 #ifdef CONFIG_FSL_DPAA_CHECKING
 	mc->state = qman_mc_idle;
-- 
2.1.0

[PATCH v2 5/5] soc/fsl_qbman: export coalesce change API

[Madalin Bucur]

Export the API required to control the QMan portal interrupt coalescing
settings.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
---
 drivers/soc/fsl/qbman/qman.c | 31 +++++++++++++++++++++++++++++++
 include/soc/fsl/qman.h       | 27 +++++++++++++++++++++++++++
 2 files changed, 58 insertions(+)

diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
index 99d0f87889b8..8ab75bb44c4d 100644
--- a/drivers/soc/fsl/qbman/qman.c
+++ b/drivers/soc/fsl/qbman/qman.c
@@ -1012,6 +1012,37 @@ static inline void put_affine_portal(void)
 
 static struct workqueue_struct *qm_portal_wq;
 
+void qman_dqrr_set_ithresh(struct qman_portal *portal, u8 ithresh)
+{
+	if (!portal)
+		return;
+
+	qm_dqrr_set_ithresh(&portal->p, ithresh);
+	portal->p.dqrr.ithresh = ithresh;
+}
+EXPORT_SYMBOL(qman_dqrr_set_ithresh);
+
+void qman_dqrr_get_ithresh(struct qman_portal *portal, u8 *ithresh)
+{
+	if (portal && ithresh)
+		*ithresh = portal->p.dqrr.ithresh;
+}
+EXPORT_SYMBOL(qman_dqrr_get_ithresh);
+
+void qman_portal_get_iperiod(struct qman_portal *portal, u32 *iperiod)
+{
+	if (portal && iperiod)
+		*iperiod = qm_in(&portal->p, QM_REG_ITPR);
+}
+EXPORT_SYMBOL(qman_portal_get_iperiod);
+
+void qman_portal_set_iperiod(struct qman_portal *portal, u32 iperiod)
+{
+	if (portal)
+		qm_out(&portal->p, QM_REG_ITPR, iperiod);
+}
+EXPORT_SYMBOL(qman_portal_set_iperiod);
+
 int qman_wq_alloc(void)
 {
 	qm_portal_wq = alloc_workqueue("qman_portal_wq", 0, 1);
diff --git a/include/soc/fsl/qman.h b/include/soc/fsl/qman.h
index d4dfefdee6c1..42f50eb51529 100644
--- a/include/soc/fsl/qman.h
+++ b/include/soc/fsl/qman.h
@@ -1186,4 +1186,31 @@ int qman_alloc_cgrid_range(u32 *result, u32 count);
  */
 int qman_release_cgrid(u32 id);
 
+/**
+ * qman_dqrr_get_ithresh - Get coalesce interrupt threshold
+ * @portal: portal to get the value for
+ * @ithresh: threshold pointer
+ */
+void qman_dqrr_get_ithresh(struct qman_portal *portal, u8 *ithresh);
+
+/**
+ * qman_dqrr_set_ithresh - Set coalesce interrupt threshold
+ * @portal: portal to set the new value on
+ * @ithresh: new threshold value
+ */
+void qman_dqrr_set_ithresh(struct qman_portal *portal, u8 ithresh);
+
+/**
+ * qman_dqrr_get_iperiod - Get coalesce interrupt period
+ * @portal: portal to get the value for
+ * @iperiod: period pointer
+ */
+void qman_portal_get_iperiod(struct qman_portal *portal, u32 *iperiod);
+/*
+ * qman_dqrr_set_iperiod - Set coalesce interrupt period
+ * @portal: portal to set the new value on
+ * @ithresh: new period value
+ */
+void qman_portal_set_iperiod(struct qman_portal *portal, u32 iperiod);
+
 #endif	/* __FSL_QMAN_H */
-- 
2.1.0

Re: [PATCH v2 5/5] soc/fsl_qbman: export coalesce change API

[Li Yang]

On Fri, Sep 28, 2018 at 3:45 AM Madalin Bucur <madalin.bucur@nxp.com> wrote:
>
> Export the API required to control the QMan portal interrupt coalescing
> settings.

These are new APIs not just old APIs being exported.  What is the user
of these APIs?  Is the user being submitted?  We cannot have APIs in
kernel that has no users.

>
> Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
> ---
>  drivers/soc/fsl/qbman/qman.c | 31 +++++++++++++++++++++++++++++++
>  include/soc/fsl/qman.h       | 27 +++++++++++++++++++++++++++
>  2 files changed, 58 insertions(+)
>
> diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
> index 99d0f87889b8..8ab75bb44c4d 100644
> --- a/drivers/soc/fsl/qbman/qman.c
> +++ b/drivers/soc/fsl/qbman/qman.c
> @@ -1012,6 +1012,37 @@ static inline void put_affine_portal(void)
>
>  static struct workqueue_struct *qm_portal_wq;
>
> +void qman_dqrr_set_ithresh(struct qman_portal *portal, u8 ithresh)
> +{
> +       if (!portal)
> +               return;
> +
> +       qm_dqrr_set_ithresh(&portal->p, ithresh);
> +       portal->p.dqrr.ithresh = ithresh;
> +}
> +EXPORT_SYMBOL(qman_dqrr_set_ithresh);
> +
> +void qman_dqrr_get_ithresh(struct qman_portal *portal, u8 *ithresh)
> +{
> +       if (portal && ithresh)
> +               *ithresh = portal->p.dqrr.ithresh;
> +}
> +EXPORT_SYMBOL(qman_dqrr_get_ithresh);
> +
> +void qman_portal_get_iperiod(struct qman_portal *portal, u32 *iperiod)
> +{
> +       if (portal && iperiod)
> +               *iperiod = qm_in(&portal->p, QM_REG_ITPR);
> +}
> +EXPORT_SYMBOL(qman_portal_get_iperiod);
> +
> +void qman_portal_set_iperiod(struct qman_portal *portal, u32 iperiod)
> +{
> +       if (portal)
> +               qm_out(&portal->p, QM_REG_ITPR, iperiod);
> +}
> +EXPORT_SYMBOL(qman_portal_set_iperiod);
> +
>  int qman_wq_alloc(void)
>  {
>         qm_portal_wq = alloc_workqueue("qman_portal_wq", 0, 1);
> diff --git a/include/soc/fsl/qman.h b/include/soc/fsl/qman.h
> index d4dfefdee6c1..42f50eb51529 100644
> --- a/include/soc/fsl/qman.h
> +++ b/include/soc/fsl/qman.h
> @@ -1186,4 +1186,31 @@ int qman_alloc_cgrid_range(u32 *result, u32 count);
>   */
>  int qman_release_cgrid(u32 id);
>
> +/**
> + * qman_dqrr_get_ithresh - Get coalesce interrupt threshold
> + * @portal: portal to get the value for
> + * @ithresh: threshold pointer
> + */
> +void qman_dqrr_get_ithresh(struct qman_portal *portal, u8 *ithresh);
> +
> +/**
> + * qman_dqrr_set_ithresh - Set coalesce interrupt threshold
> + * @portal: portal to set the new value on
> + * @ithresh: new threshold value
> + */
> +void qman_dqrr_set_ithresh(struct qman_portal *portal, u8 ithresh);
> +
> +/**
> + * qman_dqrr_get_iperiod - Get coalesce interrupt period
> + * @portal: portal to get the value for
> + * @iperiod: period pointer
> + */
> +void qman_portal_get_iperiod(struct qman_portal *portal, u32 *iperiod);
> +/*
> + * qman_dqrr_set_iperiod - Set coalesce interrupt period
> + * @portal: portal to set the new value on
> + * @ithresh: new period value
> + */
> +void qman_portal_set_iperiod(struct qman_portal *portal, u32 iperiod);
> +
>  #endif /* __FSL_QMAN_H */
> --
> 2.1.0
>

RE: [PATCH v2 5/5] soc/fsl_qbman: export coalesce change API

[Madalin-cristian Bucur]

> -----Original Message-----
> From: Li Yang [mailto:leoyang.li@nxp.com]
> Sent: Tuesday, October 2, 2018 12:50 AM
> To: Madalin-cristian Bucur <madalin.bucur@nxp.com>
> Cc: Roy Pledge <roy.pledge@nxp.com>; Claudiu Manoil
> <claudiu.manoil@nxp.com>; Catalin Marinas <catalin.marinas@arm.com>; Scott
> Wood <oss@buserror.net>; moderated list:ARM/FREESCALE IMX / MXC ARM
> ARCHITECTURE <linux-arm-kernel@lists.infradead.org>; linuxppc-dev
> <linuxppc-dev@lists.ozlabs.org>; lkml <linux-kernel@vger.kernel.org>
> Subject: Re: [PATCH v2 5/5] soc/fsl_qbman: export coalesce change API
> 
> On Fri, Sep 28, 2018 at 3:45 AM Madalin Bucur <madalin.bucur@nxp.com>
> wrote:
> >
> > Export the API required to control the QMan portal interrupt coalescing
> > settings.
> 
> These are new APIs not just old APIs being exported.  What is the user
> of these APIs?  Is the user being submitted?  We cannot have APIs in
> kernel that has no users.

Hi,

These are new APIs that will be used in the DPAA Ethernet driver.
Changes for the DPAA QBMan and DPAA Ethernet follow different paths upstream
so the Ethernet driver patch that makes use of these APIs will be sent when
these changes reach the net-next/master tree.

Regards,
Madalin

Re: [PATCH v2 5/5] soc/fsl_qbman: export coalesce change API

[Li Yang]

On Tue, Oct 2, 2018 at 1:08 AM Madalin-cristian Bucur
<madalin.bucur@nxp.com> wrote:
>
> > -----Original Message-----
> > From: Li Yang [mailto:leoyang.li@nxp.com]
> > Sent: Tuesday, October 2, 2018 12:50 AM
> > To: Madalin-cristian Bucur <madalin.bucur@nxp.com>
> > Cc: Roy Pledge <roy.pledge@nxp.com>; Claudiu Manoil
> > <claudiu.manoil@nxp.com>; Catalin Marinas <catalin.marinas@arm.com>; Scott
> > Wood <oss@buserror.net>; moderated list:ARM/FREESCALE IMX / MXC ARM
> > ARCHITECTURE <linux-arm-kernel@lists.infradead.org>; linuxppc-dev
> > <linuxppc-dev@lists.ozlabs.org>; lkml <linux-kernel@vger.kernel.org>
> > Subject: Re: [PATCH v2 5/5] soc/fsl_qbman: export coalesce change API
> >
> > On Fri, Sep 28, 2018 at 3:45 AM Madalin Bucur <madalin.bucur@nxp.com>
> > wrote:
> > >
> > > Export the API required to control the QMan portal interrupt coalescing
> > > settings.
> >
> > These are new APIs not just old APIs being exported.  What is the user
> > of these APIs?  Is the user being submitted?  We cannot have APIs in
> > kernel that has no users.
>
> Hi,
>
> These are new APIs that will be used in the DPAA Ethernet driver.
> Changes for the DPAA QBMan and DPAA Ethernet follow different paths upstream
> so the Ethernet driver patch that makes use of these APIs will be sent when
> these changes reach the net-next/master tree.

Applied for next after changing from "export API" to "add API" in the
introduction and updated the subsystem prefix.

Regards,
Leo

Re: [PATCH v2 0/5] soc/fsl/qbman: DPAA QBMan fixes and additions

[Li Yang]

On Fri, Sep 28, 2018 at 3:44 AM Madalin Bucur <madalin.bucur@nxp.com> wrote:
>

Applied 1-4 to for-next while waiting for clarification on 5/5.   And
updated the prefix to "soc: fsl:" style to be aligned with arm-soc
convention.  Please try to use that style in the future for soc/fsl
patches.

> This patch set brings a number of fixes and the option to control
> the QMan portal interrupt coalescing.
>
> Changes from v1:
>  - change CPU 0 with any online CPU to allow CPU 0 to be taken offline
>  - move common code in a function
>  - address all places in the code where the portal interrupt was affined
>    to CPU 0
>  - remove unrelated change from patch adding 64 bit DMA addressing
>    requirement
>
> Madalin Bucur (2):
>   soc/fsl/qbman: replace CPU 0 with any online CPU in hotplug handlers
>   soc/fsl_qbman: export coalesce change API
>
> Roy Pledge (3):
>   soc/fsl/qbman: Check if CPU is offline when initializing portals
>   soc/fsl/qbman: Add 64 bit DMA addressing requirement to QBMan
>   soc/fsl/qbman: Use last response to determine valid bit
>
>  drivers/soc/fsl/qbman/Kconfig       |  2 +-
>  drivers/soc/fsl/qbman/bman.c        |  6 ++---
>  drivers/soc/fsl/qbman/bman_portal.c |  4 ++-
>  drivers/soc/fsl/qbman/dpaa_sys.h    | 20 ++++++++++++++
>  drivers/soc/fsl/qbman/qman.c        | 53 ++++++++++++++++++++++++++++++++-----
>  drivers/soc/fsl/qbman/qman_portal.c |  6 +++--
>  include/soc/fsl/qman.h              | 27 +++++++++++++++++++
>  7 files changed, 104 insertions(+), 14 deletions(-)
>
> --
> 2.1.0
>

RE: [PATCH v2 0/5] soc/fsl/qbman: DPAA QBMan fixes and additions

[Madalin-cristian Bucur]

> -----Original Message-----
> From: Li Yang [mailto:leoyang.li@nxp.com]
> Sent: Tuesday, October 2, 2018 1:30 AM
> To: Madalin-cristian Bucur <madalin.bucur@nxp.com>
> Cc: Roy Pledge <roy.pledge@nxp.com>; Claudiu Manoil
> <claudiu.manoil@nxp.com>; Catalin Marinas <catalin.marinas@arm.com>; Scott
> Wood <oss@buserror.net>; moderated list:ARM/FREESCALE IMX / MXC ARM
> ARCHITECTURE <linux-arm-kernel@lists.infradead.org>; linuxppc-dev
> <linuxppc-dev@lists.ozlabs.org>; lkml <linux-kernel@vger.kernel.org>
> Subject: Re: [PATCH v2 0/5] soc/fsl/qbman: DPAA QBMan fixes and additions
> 
> On Fri, Sep 28, 2018 at 3:44 AM Madalin Bucur <madalin.bucur@nxp.com>
> wrote:
> >
> 
> Applied 1-4 to for-next while waiting for clarification on 5/5.   And
> updated the prefix to "soc: fsl:" style to be aligned with arm-soc
> convention.  Please try to use that style in the future for soc/fsl
> patches.

Thank you, I've sent an email about the APIs.
I'm not sure we need to align the prefix to arm-soc as the soc/fsl does not
service only ARM but also PPC based SoCs and historically we've been using
the soc/* format.

Regards,
Madalin

Re: [PATCH v2 0/5] soc/fsl/qbman: DPAA QBMan fixes and additions

[Li Yang]

On Tue, Oct 2, 2018 at 1:29 AM Madalin-cristian Bucur
<madalin.bucur@nxp.com> wrote:
>
> > -----Original Message-----
> > From: Li Yang [mailto:leoyang.li@nxp.com]
> > Sent: Tuesday, October 2, 2018 1:30 AM
> > To: Madalin-cristian Bucur <madalin.bucur@nxp.com>
> > Cc: Roy Pledge <roy.pledge@nxp.com>; Claudiu Manoil
> > <claudiu.manoil@nxp.com>; Catalin Marinas <catalin.marinas@arm.com>; Scott
> > Wood <oss@buserror.net>; moderated list:ARM/FREESCALE IMX / MXC ARM
> > ARCHITECTURE <linux-arm-kernel@lists.infradead.org>; linuxppc-dev
> > <linuxppc-dev@lists.ozlabs.org>; lkml <linux-kernel@vger.kernel.org>
> > Subject: Re: [PATCH v2 0/5] soc/fsl/qbman: DPAA QBMan fixes and additions
> >
> > On Fri, Sep 28, 2018 at 3:44 AM Madalin Bucur <madalin.bucur@nxp.com>
> > wrote:
> > >
> >
> > Applied 1-4 to for-next while waiting for clarification on 5/5.   And
> > updated the prefix to "soc: fsl:" style to be aligned with arm-soc
> > convention.  Please try to use that style in the future for soc/fsl
> > patches.
>
> Thank you, I've sent an email about the APIs.
> I'm not sure we need to align the prefix to arm-soc as the soc/fsl does not
> service only ARM but also PPC based SoCs and historically we've been using
> the soc/* format.

There is no kernel wide guideline about the format of subsystem prefix
in the patch subject. Different subsystems have their own
preferrences.  Soc is not considered as a separate subsystem, so we
followed the convention of the architectural subsystem that we merge
patches through.  Since we normally get soc patches through the
arm-soc tree right now, I think it would be better to follow the
convention of arm-soc to make them not looking too different in the
arm-soc pull requests.  Not sure how sensetive ARM-SOC maintainers
feel about this though.

Regards,
Leo