* [PATCH -next] drm/amdgpu/display: fix build error without CONFIG_DRM_AMD_DC_DSC_SUPPORT
@ 2019-08-26 8:57 YueHaibing
2019-08-26 13:22 ` Harry Wentland
0 siblings, 1 reply; 3+ messages in thread
From: YueHaibing @ 2019-08-26 8:57 UTC (permalink / raw)
To: harry.wentland, sunpeng.li, alexander.deucher, christian.koenig,
David1.Zhou, airlied, daniel, Jun.Lei, Dmytro.Laktyushkin,
Bhawanpreet.Lakha, joshua.aberback, Wenjing.Liu, charlene.liu,
martin.leung
Cc: amd-gfx, dri-devel, linux-kernel, YueHaibing
If CONFIG_DRM_AMD_DC_DSC_SUPPORT is not set, build fails:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c: In function dcn20_hw_sequencer_construct:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:2099:28:
error: dcn20_dsc_pg_control undeclared (first use in this function); did you mean dcn20_dpp_pg_control?
dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
^~~~~~~~~~~~~~~~~~~~
dcn20_dpp_pg_control
Use CONFIG_DRM_AMD_DC_DSC_SUPPORT to guard this.
Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index e146d1d..54d67f6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2092,7 +2092,11 @@ void dcn20_hw_sequencer_construct(struct dc *dc)
dc->hwss.enable_power_gating_plane = dcn20_enable_power_gating_plane;
dc->hwss.dpp_pg_control = dcn20_dpp_pg_control;
dc->hwss.hubp_pg_control = dcn20_hubp_pg_control;
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
+#else
+ dc->hwss.dsc_pg_control = NULL;
+#endif
dc->hwss.disable_vga = dcn20_disable_vga;
if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH -next] drm/amdgpu/display: fix build error without CONFIG_DRM_AMD_DC_DSC_SUPPORT
2019-08-26 8:57 [PATCH -next] drm/amdgpu/display: fix build error without CONFIG_DRM_AMD_DC_DSC_SUPPORT YueHaibing
@ 2019-08-26 13:22 ` Harry Wentland
2019-08-26 15:18 ` Alex Deucher
0 siblings, 1 reply; 3+ messages in thread
From: Harry Wentland @ 2019-08-26 13:22 UTC (permalink / raw)
To: YueHaibing, Wentland, Harry, Li, Sun peng (Leo),
Deucher, Alexander, Koenig, Christian, Zhou, David(ChunMing),
airlied, daniel, Lei, Jun, Laktyushkin, Dmytro, Lakha,
Bhawanpreet, Aberback, Joshua, Liu, Wenjing, Liu, Charlene,
Leung, Martin
Cc: amd-gfx, dri-devel, linux-kernel
On 2019-08-26 4:57 a.m., YueHaibing wrote:
> If CONFIG_DRM_AMD_DC_DSC_SUPPORT is not set, build fails:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c: In function dcn20_hw_sequencer_construct:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:2099:28:
> error: dcn20_dsc_pg_control undeclared (first use in this function); did you mean dcn20_dpp_pg_control?
> dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
> ^~~~~~~~~~~~~~~~~~~~
> dcn20_dpp_pg_control
>
> Use CONFIG_DRM_AMD_DC_DSC_SUPPORT to guard this.
>
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot")
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Harry
> ---
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> index e146d1d..54d67f6 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> @@ -2092,7 +2092,11 @@ void dcn20_hw_sequencer_construct(struct dc *dc)
> dc->hwss.enable_power_gating_plane = dcn20_enable_power_gating_plane;
> dc->hwss.dpp_pg_control = dcn20_dpp_pg_control;
> dc->hwss.hubp_pg_control = dcn20_hubp_pg_control;
> +#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
> dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
> +#else
> + dc->hwss.dsc_pg_control = NULL;
> +#endif
> dc->hwss.disable_vga = dcn20_disable_vga;
>
> if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH -next] drm/amdgpu/display: fix build error without CONFIG_DRM_AMD_DC_DSC_SUPPORT
2019-08-26 13:22 ` Harry Wentland
@ 2019-08-26 15:18 ` Alex Deucher
0 siblings, 0 replies; 3+ messages in thread
From: Alex Deucher @ 2019-08-26 15:18 UTC (permalink / raw)
To: Harry Wentland
Cc: YueHaibing, Wentland, Harry, Li, Sun peng (Leo),
Deucher, Alexander, Koenig, Christian, Zhou, David(ChunMing),
airlied, daniel, Lei, Jun, Laktyushkin, Dmytro, Lakha,
Bhawanpreet, Aberback, Joshua, Liu, Wenjing, Liu, Charlene,
Leung, Martin, dri-devel, amd-gfx, linux-kernel
On Mon, Aug 26, 2019 at 9:22 AM Harry Wentland <hwentlan@amd.com> wrote:
>
>
>
> On 2019-08-26 4:57 a.m., YueHaibing wrote:
> > If CONFIG_DRM_AMD_DC_DSC_SUPPORT is not set, build fails:
> >
> > drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c: In function dcn20_hw_sequencer_construct:
> > drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:2099:28:
> > error: dcn20_dsc_pg_control undeclared (first use in this function); did you mean dcn20_dpp_pg_control?
> > dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
> > ^~~~~~~~~~~~~~~~~~~~
> > dcn20_dpp_pg_control
> >
> > Use CONFIG_DRM_AMD_DC_DSC_SUPPORT to guard this.
> >
> > Reported-by: Hulk Robot <hulkci@huawei.com>
> > Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot")
> > Signed-off-by: YueHaibing <yuehaibing@huawei.com>
>
> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>
Applied. Thanks,
Alex
> Harry
>
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> > index e146d1d..54d67f6 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> > @@ -2092,7 +2092,11 @@ void dcn20_hw_sequencer_construct(struct dc *dc)
> > dc->hwss.enable_power_gating_plane = dcn20_enable_power_gating_plane;
> > dc->hwss.dpp_pg_control = dcn20_dpp_pg_control;
> > dc->hwss.hubp_pg_control = dcn20_hubp_pg_control;
> > +#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
> > dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
> > +#else
> > + dc->hwss.dsc_pg_control = NULL;
> > +#endif
> > dc->hwss.disable_vga = dcn20_disable_vga;
> >
> > if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
> >
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-08-26 15:18 UTC | newest]
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2019-08-26 8:57 [PATCH -next] drm/amdgpu/display: fix build error without CONFIG_DRM_AMD_DC_DSC_SUPPORT YueHaibing
2019-08-26 13:22 ` Harry Wentland
2019-08-26 15:18 ` Alex Deucher
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