* [PATCH] drm: fix to radeon driver for HD 6450
@ 2013-01-25 18:10 Chris Staite
2013-01-26 16:18 ` Alex Deucher
0 siblings, 1 reply; 2+ messages in thread
From: Chris Staite @ 2013-01-25 18:10 UTC (permalink / raw)
To: David Airlie; +Cc: linux-kernel, dri-devel
From: Christopher Staite <chris@yourdreamnet.co.uk>
Fix commit 62444b7462a2b98bc78d68736c03a7c4e66ba7e2 for HD 6450. The stop and resume causes the screen to glitch and the X server to reboot constantly. Re-instating the UPDATE_LOCK fixes the issue in tests on the v3.6.11 stable, and the code has not been altered to fix this since.
Signed-off-by: Christopher Staite <chris@yourdreamnet.co.uk>
--- drivers/gpu/drm/radeon/evergreen.c.org 2013-01-25 17:45:06.000000000 +0000
+++ drivers/gpu/drm/radeon/evergreen.c 2013-01-25 17:48:14.000000000 +0000
@@ -1320,7 +1320,9 @@ void evergreen_mc_stop(struct radeon_dev
if (!(tmp & EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE)) {
radeon_wait_for_vblank(rdev, i);
tmp |= EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE;
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
}
}
/* wait for the next frame */
@@ -1382,7 +1384,9 @@ void evergreen_mc_resume(struct radeon_d
} else {
tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
tmp &= ~EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE;
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
}
/* wait for the next frame */
frame_count = radeon_get_vblank_counter(rdev, i);
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] drm: fix to radeon driver for HD 6450
2013-01-25 18:10 [PATCH] drm: fix to radeon driver for HD 6450 Chris Staite
@ 2013-01-26 16:18 ` Alex Deucher
0 siblings, 0 replies; 2+ messages in thread
From: Alex Deucher @ 2013-01-26 16:18 UTC (permalink / raw)
To: Chris Staite; +Cc: David Airlie, linux-kernel, dri-devel
[-- Attachment #1: Type: text/plain, Size: 2470 bytes --]
On Fri, Jan 25, 2013 at 1:10 PM, Chris Staite <chris@yourdreamnet.co.uk> wrote:
> From: Christopher Staite <chris@yourdreamnet.co.uk>
>
> Fix commit 62444b7462a2b98bc78d68736c03a7c4e66ba7e2 for HD 6450. The stop and resume causes the screen to glitch and the X server to reboot constantly. Re-instating the UPDATE_LOCK fixes the issue in tests on the v3.6.11 stable, and the code has not been altered to fix this since.
>
> Signed-off-by: Christopher Staite <chris@yourdreamnet.co.uk>
>
Looks good. I've updated the patch to handle the DCE6 case and
improved the commit message. I'll go ahead and add it to my next
-fixes pull.
Thanks,
Alex
>
>
> --- drivers/gpu/drm/radeon/evergreen.c.org 2013-01-25 17:45:06.000000000 +0000
> +++ drivers/gpu/drm/radeon/evergreen.c 2013-01-25 17:48:14.000000000 +0000
> @@ -1320,7 +1320,9 @@ void evergreen_mc_stop(struct radeon_dev
> if (!(tmp & EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE)) {
> radeon_wait_for_vblank(rdev, i);
> tmp |= EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE;
> + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
> WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
> + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
> }
> }
> /* wait for the next frame */
> @@ -1382,7 +1384,9 @@ void evergreen_mc_resume(struct radeon_d
> } else {
> tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
> tmp &= ~EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE;
> + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
> WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
> + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
> }
> /* wait for the next frame */
> frame_count = radeon_get_vblank_counter(rdev, i);
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
[-- Attachment #2: 0001-drm-radeon-fix-MC-blackout-on-evergreen.patch --]
[-- Type: text/x-patch, Size: 2612 bytes --]
From 253307c1ca7ccf0ba9dec18c129e0030e05d6ebb Mon Sep 17 00:00:00 2001
From: Christopher Staite <chris@yourdreamnet.co.uk>
Date: Sat, 26 Jan 2013 11:10:58 -0500
Subject: [PATCH] drm/radeon: fix MC blackout on evergreen+
Force the crtc mem requests on/off immediately rather
than waiting for the double buffered updates to kick in.
Seems we miss the update in certain conditions. Also
handle the DCE6 case.
Signed-off-by: Christopher Staite <chris@yourdreamnet.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/radeon/evergreen.c | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 4d0e60a..112da9b 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1313,14 +1313,18 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav
if (!(tmp & EVERGREEN_CRTC_BLANK_DATA_EN)) {
radeon_wait_for_vblank(rdev, i);
tmp |= EVERGREEN_CRTC_BLANK_DATA_EN;
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
}
} else {
tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
if (!(tmp & EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE)) {
radeon_wait_for_vblank(rdev, i);
tmp |= EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE;
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
}
}
/* wait for the next frame */
@@ -1378,11 +1382,15 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s
if (ASIC_IS_DCE6(rdev)) {
tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]);
tmp |= EVERGREEN_CRTC_BLANK_DATA_EN;
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
} else {
tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
tmp &= ~EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE;
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
}
/* wait for the next frame */
frame_count = radeon_get_vblank_counter(rdev, i);
--
1.7.7.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
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