* [PATCH v2] arm64: dts: qcom: sc7280: fix display port phy reg property
@ 2021-09-09 19:49 Kuogee Hsieh
2021-09-09 21:03 ` Stephen Boyd
0 siblings, 1 reply; 2+ messages in thread
From: Kuogee Hsieh @ 2021-09-09 19:49 UTC (permalink / raw)
To: robdclark, sean, swboyd, vkoul, agross, bjorn.andersson, robh+dt,
devicetree
Cc: abhinavk, aravindh, khsieh, mkrishn, kalyan_t, rajeevny,
freedreno, linux-arm-msm, linux-kernel
Existing display port phy reg property is derived from usb phy which
map display port phy pcs to wrong address which cause aux init
with wrong address and prevent both dpcd read and write from working.
Fix this problem by assigning correct pcs address to display port
phy reg property.
Changes in V2:
-- rewording the commit text
Fixes: 9886e8fd8438 ("arm64: dts: qcom: sc7280: Add USB related nodes")
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index fa1353f..cdaff5f 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2881,15 +2881,11 @@
dp_phy: dp-phy@88ea200 {
reg = <0 0x088ea200 0 0x200>,
<0 0x088ea400 0 0x200>,
- <0 0x088eac00 0 0x400>,
+ <0 0x088eaa00 0 0x200>,
<0 0x088ea600 0 0x200>,
- <0 0x088ea800 0 0x200>,
- <0 0x088eaa00 0 0x100>;
+ <0 0x088ea800 0 0x200>;
#phy-cells = <0>;
#clock-cells = <1>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
};
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc7280: fix display port phy reg property
2021-09-09 19:49 [PATCH v2] arm64: dts: qcom: sc7280: fix display port phy reg property Kuogee Hsieh
@ 2021-09-09 21:03 ` Stephen Boyd
0 siblings, 0 replies; 2+ messages in thread
From: Stephen Boyd @ 2021-09-09 21:03 UTC (permalink / raw)
To: Kuogee Hsieh, agross, bjorn.andersson, devicetree, robdclark,
robh+dt, sean, vkoul
Cc: abhinavk, aravindh, mkrishn, kalyan_t, rajeevny, freedreno,
linux-arm-msm, linux-kernel
Quoting Kuogee Hsieh (2021-09-09 12:49:58)
> Existing display port phy reg property is derived from usb phy which
> map display port phy pcs to wrong address which cause aux init
> with wrong address and prevent both dpcd read and write from working.
> Fix this problem by assigning correct pcs address to display port
> phy reg property.
>
> Changes in V2:
> -- rewording the commit text
This Changes part can be put under the triple dash. This isn't drm tree
material.
>
> Fixes: 9886e8fd8438 ("arm64: dts: qcom: sc7280: Add USB related nodes")
> Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
> ---
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
^ permalink raw reply [flat|nested] 2+ messages in thread
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