From: Stephen Boyd <swboyd@chromium.org>
To: Prasad Malisetty <pmaliset@codeaurora.org>,
agross@kernel.org, bhelgaas@google.com,
bjorn.andersson@linaro.org, lorenzo.pieralisi@arm.com,
robh+dt@kernel.org, svarbanov@mm-sol.com
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
dianders@chromium.org, mka@chromium.org, vbadigan@codeaurora.org,
sallenki@codeaurora.org, manivannan.sadhasivam@linaro.org
Subject: Re: [PATCH v5 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes
Date: Tue, 10 Aug 2021 12:25:36 -0700 [thread overview]
Message-ID: <CAE-0n532Mwe2OzhM-_UT62FpxqmpecBda7q0ciW1WzaOPm_Q5Q@mail.gmail.com> (raw)
In-Reply-To: <1628568516-24155-3-git-send-email-pmaliset@codeaurora.org>
Quoting Prasad Malisetty (2021-08-09 21:08:34)
> Add PCIe controller and PHY nodes for sc7280 SOC.
>
> Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 126 +++++++++++++++++++++++++++++++++++
> 1 file changed, 126 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 53a21d0..4500d88 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -16,6 +16,7 @@
> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> #include <dt-bindings/thermal/thermal.h>
> +#include <dt-bindings/gpio/gpio.h>
Please sort this alphabetically, gpio comes before reset at the least.
>
> / {
> interrupt-parent = <&intc>;
> @@ -586,6 +587,119 @@
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> + pcie1: pci@1c08000 {
> + compatible = "qcom,pcie-sc7280", "qcom,pcie-sm8250", "snps,dw-pcie";
> + reg = <0 0x01c08000 0 0x3000>,
> + <0 0x40000000 0 0xf1d>,
> + <0 0x40000f20 0 0xa8>,
> + <0 0x40001000 0 0x1000>,
> + <0 0x40100000 0 0x100000>;
> +
> + reg-names = "parf", "dbi", "elbi", "atu", "config";
> + device_type = "pci";
> + linux,pci-domain = <1>;
> + bus-range = <0x00 0xff>;
> + num-lanes = <2>;
> + pipe-clk-source-switch;
I'd rather not have this DT property, but key it off the compatible
string.
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
next prev parent reply other threads:[~2021-08-10 19:25 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 4:08 [PATCH v5 0/4] Add DT bindings and DT nodes for PCIe and PHY in SC7280 Prasad Malisetty
2021-08-10 4:08 ` [PATCH v5 1/4] dt-bindings: pci: qcom: Document PCIe bindings for SC7280 Prasad Malisetty
2021-08-10 4:08 ` [PATCH v5 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes Prasad Malisetty
2021-08-10 19:25 ` Stephen Boyd [this message]
2021-08-10 19:31 ` Stephen Boyd
2021-08-17 8:03 ` Prasad Malisetty
2021-08-12 6:07 ` Manivannan Sadhasivam
2021-08-17 6:00 ` Prasad Malisetty
2021-08-10 4:08 ` [PATCH v5 3/4] arm64: dts: qcom: sc7280: Add PCIe nodes for IDP board Prasad Malisetty
2021-08-10 19:32 ` Stephen Boyd
2021-08-10 4:08 ` [PATCH v5 4/4] PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280 Prasad Malisetty
2021-08-10 19:37 ` Stephen Boyd
2021-08-17 6:40 ` Prasad Malisetty
2021-08-12 6:11 ` Manivannan Sadhasivam
2021-08-17 6:37 ` Prasad Malisetty
2021-08-17 17:26 ` Prasad Malisetty
2021-08-24 8:10 ` Prasad Malisetty
2021-08-25 19:30 ` Stephen Boyd
2021-08-25 21:25 ` Bjorn Helgaas
2021-08-26 7:21 ` Prasad Malisetty
2021-08-26 12:37 ` Rob Herring
2021-08-31 6:37 ` Prasad Malisetty
2021-08-31 15:37 ` Bjorn Helgaas
2021-09-09 17:51 ` Prasad Malisetty
2021-09-09 18:08 ` Bjorn Helgaas
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