* [PATCH v3 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-02-03 11:32 [PATCH v3 0/3] Add soundcard support for sc7280 based platforms Srinivasa Rao Mandadapu
@ 2022-02-03 11:32 ` Srinivasa Rao Mandadapu
2022-02-28 21:26 ` Stephen Boyd
2022-02-03 11:33 ` [PATCH v3 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node Srinivasa Rao Mandadapu
2022-02-03 11:33 ` [PATCH v3 3/3] arm64: dts: qcom: sc7280: add sound card support Srinivasa Rao Mandadapu
2 siblings, 1 reply; 7+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 11:32 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel, rohitkr, srinivas.kandagatla, dianders, swboyd,
judyhsiao
Cc: Srinivasa Rao Mandadapu, Venkata Prasad Potturu
SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
codecs like WCD938x, max98360a using soundwire masters and i2s bus.
Add these nodes for sc7280 based platforms audio use case.
Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 +
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 55 ++++++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 122 +++++++++++++++++++++++++++++++
3 files changed, 181 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index cd2755c..e6fbfc2 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -72,6 +72,10 @@ ap_ts_pen_1v8: &i2c13 {
pins = "gpio51";
};
+&wcd938x {
+ us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+};
+
&tlmm {
tp_int_odl: tp-int-odl {
pins = "gpio7";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index ddeb508..2806888 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -32,6 +32,14 @@
};
};
+ max98360a: audio-codec-0 {
+ compatible = "maxim,max98360a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&_en>;
+ sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+ #sound-dai-cells = <0>;
+ };
+
nvme_3v3_regulator: nvme-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "VLDO_3V3";
@@ -43,6 +51,31 @@
pinctrl-names = "default";
pinctrl-0 = <&nvme_pwren>;
};
+
+ wcd938x: codec {
+ compatible = "qcom,wcd9380-codec";
+ #sound-dai-cells = <1>;
+
+ reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
+
+ qcom,rx-device = <&wcd_rx>;
+ qcom,tx-device = <&wcd_tx>;
+
+ vdd-rxtx-supply = <&vreg_l18b_1p8>;
+ vdd-io-supply = <&vreg_l18b_1p8>;
+ vdd-buck-supply = <&vreg_l17b_1p8>;
+ vdd-mic-bias-supply = <&vreg_bob>;
+
+ qcom,micbias1-microvolt = <1800000>;
+ qcom,micbias2-microvolt = <1800000>;
+ qcom,micbias3-microvolt = <1800000>;
+ qcom,micbias4-microvolt = <1800000>;
+
+ qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
+ 500000 500000 500000>;
+ qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+ qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+ };
};
/*
@@ -636,3 +669,25 @@
bias-pull-up;
};
};
+
+&swr0 {
+ wcd_rx: wcd938x-hph-playback {
+ compatible = "sdw20217010d00";
+ reg = <0 4>;
+ #sound-dai-cells = <1>;
+ qcom,rx-port-mapping = <1 2 3 4 5>;
+ };
+};
+
+&swr1 {
+ wcd_tx: wcd938x-hph-capture {
+ compatible = "sdw20217010d00";
+ reg = <0 3>;
+ #sound-dai-cells = <1>;
+ qcom,tx-port-mapping = <1 2 3 4>;
+ };
+};
+
+&vamacro {
+ vdd-micb-supply = <&vreg_bob>;
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 6233f2c..946eb01 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1744,6 +1744,128 @@
#clock-cells = <1>;
};
+ rxmacro: rxmacro@3200000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rx_swr_active>;
+ compatible = "qcom,sc7280-lpass-rx-macro";
+ reg = <0 0x3200000 0 0x1000>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+ <&vamacro>;
+ clock-names = "mclk", "npl", "fsgen";
+
+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+ power-domain-names ="macro", "dcodec";
+
+ #clock-cells = <0>;
+ clock-frequency = <9600000>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+ };
+
+ swr0: soundwire@3210000 {
+ reg = <0 0x3210000 0 0x2000>;
+ compatible = "qcom,soundwire-v1.6.0";
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rxmacro>;
+ clock-names = "iface";
+ label = "RX";
+
+ qcom,din-ports = <0>;
+ qcom,dout-ports = <5>;
+ qcom,swrm-hctl-reg = <0x032a90a0>;
+
+ qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
+ qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
+ qcom,ports-hstart = /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
+ qcom,ports-hstop = /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
+ qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
+ txmacro: txmacro@3220000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tx_swr_active>;
+ compatible = "qcom,sc7280-lpass-tx-macro";
+ reg = <0 0x3220000 0 0x1000>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+ <&vamacro>;
+ clock-names = "mclk", "npl", "fsgen";
+
+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+ power-domain-names ="macro", "dcodec";
+
+ #clock-cells = <0>;
+ clock-frequency = <9600000>;
+ clock-output-names = "mclk";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ #sound-dai-cells = <1>;
+ };
+
+ swr1: soundwire@3230000 {
+ reg = <0 0x3230000 0 0x2000>;
+ compatible = "qcom,soundwire-v1.6.0";
+
+ interrupts-extended =
+ <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
+ <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "swr_master_irq", "swr_wake_irq";
+ clocks = <&txmacro>;
+ clock-names = "iface";
+ label = "TX";
+
+ qcom,din-ports = <3>;
+ qcom,dout-ports = <0>;
+ qcom,swrm-hctl-reg = <0x032a90a8>;
+
+ qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-word-length = /bits/ 8 <0xFF 0x0 0xFF>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00>;
+ qcom,port-offset = <1>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
+ vamacro: codec@3370000 {
+ compatible = "qcom,sc7280-lpass-va-macro";
+ pinctrl-0 = <&dmic01_active>;
+ pinctrl-names = "default";
+
+ reg = <0 0x3370000 0 0x1000>;
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>;
+ clock-names = "mclk";
+
+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+ power-domain-names ="macro", "dcodec";
+
+ #clock-cells = <0>;
+ clock-frequency = <9600000>;
+ clock-output-names = "fsgen";
+ #sound-dai-cells = <1>;
+ };
+
lpass_tlmm: pinctrl@33c0000 {
compatible = "qcom,sc7280-lpass-lpi-pinctrl";
reg = <0 0x33c0000 0x0 0x20000>,
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v3 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-02-03 11:32 ` [PATCH v3 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
@ 2022-02-28 21:26 ` Stephen Boyd
0 siblings, 0 replies; 7+ messages in thread
From: Stephen Boyd @ 2022-02-28 21:26 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu, agross, bjorn.andersson, devicetree,
dianders, judyhsiao, linux-arm-msm, linux-kernel, robh+dt,
rohitkr, srinivas.kandagatla
Cc: Venkata Prasad Potturu
Quoting Srinivasa Rao Mandadapu (2022-02-03 03:32:59)
> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
> Add these nodes for sc7280 based platforms audio use case.
> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 +
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 55 ++++++++++++++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 122 +++++++++++++++++++++++++++++++
> 3 files changed, 181 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> index cd2755c..e6fbfc2 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> @@ -72,6 +72,10 @@ ap_ts_pen_1v8: &i2c13 {
> pins = "gpio51";
> };
>
> +&wcd938x {
> + us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
> +};
> +
> &tlmm {
> tp_int_odl: tp-int-odl {
> pins = "gpio7";
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index ddeb508..2806888 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -32,6 +32,14 @@
> };
> };
>
> + max98360a: audio-codec-0 {
> + compatible = "maxim,max98360a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&_en>;
> + sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
> + #sound-dai-cells = <0>;
> + };
> +
> nvme_3v3_regulator: nvme-3v3-regulator {
> compatible = "regulator-fixed";
> regulator-name = "VLDO_3V3";
> @@ -43,6 +51,31 @@
> pinctrl-names = "default";
> pinctrl-0 = <&nvme_pwren>;
> };
> +
> + wcd938x: codec {
This is 'codec' and above it is 'audio-codec-0'. Maybe this should be
'audio-codec-1'? Also, can this be sorted alphabetically on node name?
Adding nodes to the end of a section leads to more conflicts.
> + compatible = "qcom,wcd9380-codec";
> + #sound-dai-cells = <1>;
> +
> + reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
I'd expect a pinctrl to at least set or remove biasing on gpio83. Where
is that?
> +
> + qcom,rx-device = <&wcd_rx>;
> + qcom,tx-device = <&wcd_tx>;
> +
> + vdd-rxtx-supply = <&vreg_l18b_1p8>;
> + vdd-io-supply = <&vreg_l18b_1p8>;
> + vdd-buck-supply = <&vreg_l17b_1p8>;
> + vdd-mic-bias-supply = <&vreg_bob>;
> +
> + qcom,micbias1-microvolt = <1800000>;
> + qcom,micbias2-microvolt = <1800000>;
> + qcom,micbias3-microvolt = <1800000>;
> + qcom,micbias4-microvolt = <1800000>;
> +
> + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
> + 500000 500000 500000>;
> + qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
> + qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
> + };
> };
>
> /*
> @@ -636,3 +669,25 @@
> bias-pull-up;
> };
> };
> +
> +&swr0 {
> + wcd_rx: wcd938x-hph-playback {
wcd_rx: playback@0,4 {
> + compatible = "sdw20217010d00";
> + reg = <0 4>;
> + #sound-dai-cells = <1>;
> + qcom,rx-port-mapping = <1 2 3 4 5>;
> + };
> +};
> +
> +&swr1 {
> + wcd_tx: wcd938x-hph-capture {
wcd_tx: capture@0,3 {
> + compatible = "sdw20217010d00";
> + reg = <0 3>;
> + #sound-dai-cells = <1>;
> + qcom,tx-port-mapping = <1 2 3 4>;
> + };
> +};
> +
> +&vamacro {
> + vdd-micb-supply = <&vreg_bob>;
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 6233f2c..946eb01 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -1744,6 +1744,128 @@
> #clock-cells = <1>;
> };
>
> + rxmacro: rxmacro@3200000 {
rxmacro is not a generic node name.
> + pinctrl-names = "default";
> + pinctrl-0 = <&rx_swr_active>;
Please put compatible first always. Followed by reg property.
> + compatible = "qcom,sc7280-lpass-rx-macro";
> + reg = <0 0x3200000 0 0x1000>;
> +
> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
> + <&vamacro>;
> + clock-names = "mclk", "npl", "fsgen";
> +
> + power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
> + <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
> + power-domain-names ="macro", "dcodec";
> +
> + #clock-cells = <0>;
> + clock-frequency = <9600000>;
What is clock-frequency? Is this like assigned-clock-rates? Why can't
that be used?
> + clock-output-names = "mclk";
Please don't use clock-output-names.
> + #sound-dai-cells = <1>;
> + };
> +
> + swr0: soundwire@3210000 {
> + reg = <0 0x3210000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.6.0";
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&rxmacro>;
> + clock-names = "iface";
> + label = "RX";
What is label used for? Can we drop it?
> +
> + qcom,din-ports = <0>;
> + qcom,dout-ports = <5>;
> + qcom,swrm-hctl-reg = <0x032a90a0>;
> +
> + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
> + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
> + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
> + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
I have no idea what these are. Why aren't they part of the driver? At
the least, lowercase hex please.
> +
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + txmacro: txmacro@3220000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&tx_swr_active>;
Move pinctrl lower.
> + compatible = "qcom,sc7280-lpass-tx-macro";
> + reg = <0 0x3220000 0 0x1000>;
Pad out register addresses to 8 digits please. 0x03220000
> +
> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
> + <&vamacro>;
> + clock-names = "mclk", "npl", "fsgen";
> +
> + power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
> + <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
> + power-domain-names ="macro", "dcodec";
> +
> + #clock-cells = <0>;
> + clock-frequency = <9600000>;
> + clock-output-names = "mclk";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + #sound-dai-cells = <1>;
> + };
> +
> + swr1: soundwire@3230000 {
> + reg = <0 0x3230000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.6.0";
> +
> + interrupts-extended =
> + <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "swr_master_irq", "swr_wake_irq";
> + clocks = <&txmacro>;
> + clock-names = "iface";
> + label = "TX";
> +
> + qcom,din-ports = <3>;
> + qcom,dout-ports = <0>;
> + qcom,swrm-hctl-reg = <0x032a90a8>;
What is this? A reset control?
> +
> + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-word-length = /bits/ 8 <0xFF 0x0 0xFF>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00>;
> + qcom,port-offset = <1>;
> +
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + vamacro: codec@3370000 {
> + compatible = "qcom,sc7280-lpass-va-macro";
> + pinctrl-0 = <&dmic01_active>;
> + pinctrl-names = "default";
> +
> + reg = <0 0x3370000 0 0x1000>;
> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>;
> + clock-names = "mclk";
> +
> + power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
> + <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
> + power-domain-names ="macro", "dcodec";
> +
> + #clock-cells = <0>;
> + clock-frequency = <9600000>;
> + clock-output-names = "fsgen";
> + #sound-dai-cells = <1>;
> + };
> +
> lpass_tlmm: pinctrl@33c0000 {
> compatible = "qcom,sc7280-lpass-lpi-pinctrl";
> reg = <0 0x33c0000 0x0 0x20000>,
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
2022-02-03 11:32 [PATCH v3 0/3] Add soundcard support for sc7280 based platforms Srinivasa Rao Mandadapu
2022-02-03 11:32 ` [PATCH v3 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
@ 2022-02-03 11:33 ` Srinivasa Rao Mandadapu
2022-02-28 21:31 ` Stephen Boyd
2022-02-03 11:33 ` [PATCH v3 3/3] arm64: dts: qcom: sc7280: add sound card support Srinivasa Rao Mandadapu
2 siblings, 1 reply; 7+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 11:33 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel, rohitkr, srinivas.kandagatla, dianders, swboyd,
judyhsiao
Cc: Srinivasa Rao Mandadapu, Venkata Prasad Potturu
Add lpass cpu node for audio on sc7280 based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 +++++++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++++++++++++++++++++++++++
2 files changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 2806888..a76b2d1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -691,3 +691,31 @@
&vamacro {
vdd-micb-supply = <&vreg_bob>;
};
+
+&lpass_cpu {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sec_mi2s_active>;
+
+ mi2s-secondary@1 {
+ reg = <MI2S_SECONDARY>;
+ qcom,playback-sd-lines = <0>;
+ };
+
+ hdmi-primary@5 {
+ reg = <LPASS_DP_RX>;
+ };
+
+ wcd-rx@6 {
+ reg = <LPASS_CDC_DMA_RX0>;
+ };
+
+ wcd-tx@19 {
+ reg = <LPASS_CDC_DMA_TX3>;
+ };
+
+ va-tx@25 {
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 946eb01..c2da5ce 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -17,6 +17,7 @@
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,lpass.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -1847,6 +1848,64 @@
#size-cells = <0>;
};
+ lpass_cpu: audio-subsystem@3260000 {
+ compatible = "qcom,sc7280-lpass-cpu";
+ reg = <0 0x3260000 0 0xC000>,
+ <0 0x3280000 0 0x29000>,
+ <0 0x3340000 0 0x29000>,
+ <0 0x336C000 0 0x3000>,
+ <0 0x3987000 0 0x68000>,
+ <0 0x3B00000 0 0x29000>;
+ reg-names = "lpass-rxtx-cdc-dma-lpm",
+ "lpass-rxtx-lpaif",
+ "lpass-va-lpaif",
+ "lpass-va-cdc-dma-lpm",
+ "lpass-hdmiif",
+ "lpass-lpaif";
+
+ iommus = <&apps_smmu 0x1820 0>,
+ <&apps_smmu 0x1821 0>,
+ <&apps_smmu 0x1832 0>;
+ status = "disabled";
+
+ power-domains = <&rpmhpd SC7280_LCX>;
+ power-domain-names = "lcx";
+ required-opps = <&rpmhpd_opp_nom>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
+ <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
+ <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
+ <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
+ <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
+ clock-names = "aon_cc_audio_hm_h",
+ "core_cc_sysnoc_mport_core",
+ "audio_cc_codec_mem",
+ "audio_cc_codec_mem0",
+ "audio_cc_codec_mem1",
+ "audio_cc_codec_mem2",
+ "core_cc_ext_if0_ibit",
+ "core_cc_ext_if1_ibit",
+ "aon_cc_va_mem0";
+
+ #sound-dai-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-names = "lpass-irq-lpaif",
+ "lpass-irq-vaif",
+ "lpass-irq-rxtxif",
+ "lpass-irq-hdmi";
+ };
+
vamacro: codec@3370000 {
compatible = "qcom,sc7280-lpass-va-macro";
pinctrl-0 = <&dmic01_active>;
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v3 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
2022-02-03 11:33 ` [PATCH v3 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node Srinivasa Rao Mandadapu
@ 2022-02-28 21:31 ` Stephen Boyd
2022-03-15 16:15 ` Srinivasa Rao Mandadapu
0 siblings, 1 reply; 7+ messages in thread
From: Stephen Boyd @ 2022-02-28 21:31 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu, agross, bjorn.andersson, devicetree,
dianders, judyhsiao, linux-arm-msm, linux-kernel, robh+dt,
rohitkr, srinivas.kandagatla
Cc: Venkata Prasad Potturu
Quoting Srinivasa Rao Mandadapu (2022-02-03 03:33:00)
> Add lpass cpu node for audio on sc7280 based platforms.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 +++++++++++++++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++++++++++++++++++++++++++
> 2 files changed, 87 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index 2806888..a76b2d1 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -691,3 +691,31 @@
> &vamacro {
> vdd-micb-supply = <&vreg_bob>;
> };
> +
> +&lpass_cpu {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&sec_mi2s_active>;
Is it a reset gpio? If so, make it a reset-gpios property. I couldn't
find the definition.
> +
> + mi2s-secondary@1 {
> + reg = <MI2S_SECONDARY>;
> + qcom,playback-sd-lines = <0>;
> + };
> +
> + hdmi-primary@5 {
> + reg = <LPASS_DP_RX>;
> + };
> +
> + wcd-rx@6 {
> + reg = <LPASS_CDC_DMA_RX0>;
> + };
> +
> + wcd-tx@19 {
> + reg = <LPASS_CDC_DMA_TX3>;
> + };
> +
> + va-tx@25 {
> + reg = <LPASS_CDC_DMA_VA_TX0>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 946eb01..c2da5ce 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -17,6 +17,7 @@
> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +#include <dt-bindings/sound/qcom,lpass.h>
> #include <dt-bindings/thermal/thermal.h>
>
> / {
> @@ -1847,6 +1848,64 @@
> #size-cells = <0>;
> };
>
> + lpass_cpu: audio-subsystem@3260000 {
> + compatible = "qcom,sc7280-lpass-cpu";
> + reg = <0 0x3260000 0 0xC000>,
> + <0 0x3280000 0 0x29000>,
> + <0 0x3340000 0 0x29000>,
> + <0 0x336C000 0 0x3000>,
> + <0 0x3987000 0 0x68000>,
> + <0 0x3B00000 0 0x29000>;
Lowercase hex. Pad out reg to 8 digits.
> + reg-names = "lpass-rxtx-cdc-dma-lpm",
> + "lpass-rxtx-lpaif",
> + "lpass-va-lpaif",
> + "lpass-va-cdc-dma-lpm",
> + "lpass-hdmiif",
> + "lpass-lpaif";
That 'lpass' prefix looks very redundant.
> +
> + iommus = <&apps_smmu 0x1820 0>,
> + <&apps_smmu 0x1821 0>,
> + <&apps_smmu 0x1832 0>;
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v3 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
2022-02-28 21:31 ` Stephen Boyd
@ 2022-03-15 16:15 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 7+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-03-15 16:15 UTC (permalink / raw)
To: Stephen Boyd, agross, bjorn.andersson, devicetree, dianders,
judyhsiao, linux-arm-msm, linux-kernel, robh+dt, rohitkr,
srinivas.kandagatla
Cc: Venkata Prasad Potturu
On 3/1/2022 3:01 AM, Stephen Boyd wrote:
Thanks for your time Stephen!!!
> Quoting Srinivasa Rao Mandadapu (2022-02-03 03:33:00)
>> Add lpass cpu node for audio on sc7280 based platforms.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 +++++++++++++++
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++++++++++++++++++++++++++
>> 2 files changed, 87 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index 2806888..a76b2d1 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -691,3 +691,31 @@
>> &vamacro {
>> vdd-micb-supply = <&vreg_bob>;
>> };
>> +
>> +&lpass_cpu {
>> + status = "okay";
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&sec_mi2s_active>;
> Is it a reset gpio? If so, make it a reset-gpios property. I couldn't
> find the definition.
It's not reset gpio. it's for I2S clk, data and ws. It is there in
previous patch set, which is not applied yet.
We did splitting this node as per functionality. will change here
accordingly.
>
>> +
>> + mi2s-secondary@1 {
>> + reg = <MI2S_SECONDARY>;
>> + qcom,playback-sd-lines = <0>;
>> + };
>> +
>> + hdmi-primary@5 {
>> + reg = <LPASS_DP_RX>;
>> + };
>> +
>> + wcd-rx@6 {
>> + reg = <LPASS_CDC_DMA_RX0>;
>> + };
>> +
>> + wcd-tx@19 {
>> + reg = <LPASS_CDC_DMA_TX3>;
>> + };
>> +
>> + va-tx@25 {
>> + reg = <LPASS_CDC_DMA_VA_TX0>;
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 946eb01..c2da5ce 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -17,6 +17,7 @@
>> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
>> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
>> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>> +#include <dt-bindings/sound/qcom,lpass.h>
>> #include <dt-bindings/thermal/thermal.h>
>>
>> / {
>> @@ -1847,6 +1848,64 @@
>> #size-cells = <0>;
>> };
>>
>> + lpass_cpu: audio-subsystem@3260000 {
>> + compatible = "qcom,sc7280-lpass-cpu";
>> + reg = <0 0x3260000 0 0xC000>,
>> + <0 0x3280000 0 0x29000>,
>> + <0 0x3340000 0 0x29000>,
>> + <0 0x336C000 0 0x3000>,
>> + <0 0x3987000 0 0x68000>,
>> + <0 0x3B00000 0 0x29000>;
> Lowercase hex. Pad out reg to 8 digits.
Okay.
>
>> + reg-names = "lpass-rxtx-cdc-dma-lpm",
>> + "lpass-rxtx-lpaif",
>> + "lpass-va-lpaif",
>> + "lpass-va-cdc-dma-lpm",
>> + "lpass-hdmiif",
>> + "lpass-lpaif";
> That 'lpass' prefix looks very redundant.
Okay. Currently driver and documentation has mentioned similarly. Will
take care from next time.
>
>> +
>> + iommus = <&apps_smmu 0x1820 0>,
>> + <&apps_smmu 0x1821 0>,
>> + <&apps_smmu 0x1832 0>;
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 3/3] arm64: dts: qcom: sc7280: add sound card support
2022-02-03 11:32 [PATCH v3 0/3] Add soundcard support for sc7280 based platforms Srinivasa Rao Mandadapu
2022-02-03 11:32 ` [PATCH v3 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
2022-02-03 11:33 ` [PATCH v3 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node Srinivasa Rao Mandadapu
@ 2022-02-03 11:33 ` Srinivasa Rao Mandadapu
2 siblings, 0 replies; 7+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 11:33 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel, rohitkr, srinivas.kandagatla, dianders, swboyd,
judyhsiao
Cc: Srinivasa Rao Mandadapu, Venkata Prasad Potturu
This patch adds sound card support for MTP using WCD938x headset playback,
capture, I2S Speaker Playback and DMICs via VA macro.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280-crd.dts | 8 +++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 93 ++++++++++++++++++++++++++++++++
2 files changed, 101 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index e6fbfc2..30d51fd 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -76,6 +76,14 @@ ap_ts_pen_1v8: &i2c13 {
us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
};
+&sound {
+ audio-routing =
+ "VA DMIC0", "MIC BIAS1",
+ "VA DMIC1", "MIC BIAS1",
+ "VA DMIC2", "MIC BIAS3",
+ "VA DMIC3", "MIC BIAS3";
+};
+
&tlmm {
tp_int_odl: tp-int-odl {
pins = "gpio7";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index a76b2d1..fb89b0d 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -52,6 +52,99 @@
pinctrl-0 = <&nvme_pwren>;
};
+ sound: sound-card {
+ compatible = "google,sc7280-herobrine";
+ model = "sc7280-wcd938x-max98360a-1mic";
+ status = "okay";
+ audio-routing =
+ "IN1_HPHL", "HPHL_OUT",
+ "IN2_HPHR", "HPHR_OUT",
+ "AMIC1", "MIC BIAS1",
+ "AMIC2", "MIC BIAS2",
+ "VA DMIC0", "MIC BIAS3",
+ "VA DMIC1", "MIC BIAS3",
+ "VA DMIC2", "MIC BIAS1",
+ "VA DMIC3", "MIC BIAS1",
+ "TX SWR_ADC0", "ADC1_OUTPUT",
+ "TX SWR_ADC1", "ADC2_OUTPUT",
+ "TX SWR_ADC2", "ADC3_OUTPUT",
+ "TX SWR_DMIC0", "DMIC1_OUTPUT",
+ "TX SWR_DMIC1", "DMIC2_OUTPUT",
+ "TX SWR_DMIC2", "DMIC3_OUTPUT",
+ "TX SWR_DMIC3", "DMIC4_OUTPUT",
+ "TX SWR_DMIC4", "DMIC5_OUTPUT",
+ "TX SWR_DMIC5", "DMIC6_OUTPUT",
+ "TX SWR_DMIC6", "DMIC7_OUTPUT",
+ "TX SWR_DMIC7", "DMIC8_OUTPUT";
+
+ qcom,msm-mbhc-hphl-swh = <1>;
+ qcom,msm-mbhc-gnd-swh = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
+
+ dai-link@1 {
+ link-name = "Secondary MI2S Playback";
+ reg = <MI2S_SECONDARY>;
+ cpu {
+ sound-dai = <&lpass_cpu MI2S_SECONDARY>;
+ };
+
+ codec {
+ sound-dai = <&max98360a>;
+ };
+ };
+
+ dai-link@5 {
+ link-name = "DP Playback";
+ reg = <LPASS_DP_RX>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_DP_RX>;
+ };
+
+ codec {
+ sound-dai = <&msm_dp>;
+ };
+ };
+
+ dai-link@6 {
+ link-name = "WCD Playback";
+ reg = <LPASS_CDC_DMA_RX0>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
+ };
+
+ codec {
+ sound-dai = <&wcd938x 0>, <&swr0 0>, <&rxmacro 0>;
+ };
+ };
+
+ dai-link@19 {
+ link-name = "WCD Capture";
+ reg = <LPASS_CDC_DMA_TX3>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
+ };
+
+ codec {
+ sound-dai = <&wcd938x 1>, <&swr1 0>, <&txmacro 0>;
+ };
+ };
+
+ dai-link@25 {
+ link-name = "DMIC Capture";
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
+ };
+
+ codec {
+ sound-dai = <&vamacro 0>;
+ };
+ };
+ };
+
wcd938x: codec {
compatible = "qcom,wcd9380-codec";
#sound-dai-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread