Re: [PATCH] riscv: Fix 32-bit RISC-V boot failure

From: Bin Meng <bmeng.cn@gmail.com>
To: Kefeng Wang <wangkefeng.wang@huawei.com>
Cc: Palmer Dabbelt <palmerdabbelt@google.com>,
	Atish Patra <atish.patra@wdc.com>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	stable <stable@vger.kernel.org>
Subject: Re: [PATCH] riscv: Fix 32-bit RISC-V boot failure
Date: Thu, 1 Jul 2021 10:20:46 +0800	[thread overview]
Message-ID: <CAEUhbmX8a+rjc4=5QfR4MivMMx-T_7KDq-QHtmrGsVL2VqLQAA@mail.gmail.com> (raw)
In-Reply-To: <94a92009-ce49-bbe4-794c-0631520e4c3d@huawei.com>

On Thu, Jul 1, 2021 at 10:08 AM Kefeng Wang <wangkefeng.wang@huawei.com> wrote:
>
>
> On 2021/6/30 19:58, Bin Meng wrote:
> > On Mon, Jun 28, 2021 at 11:21 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> >> On Mon, Jun 28, 2021 at 10:28 AM Kefeng Wang <wangkefeng.wang@huawei.com> wrote:
> >>>
> >>> On 2021/6/28 9:15, Bin Meng wrote:
> >>>> On Mon, Jun 28, 2021 at 8:53 AM Kefeng Wang <wangkefeng.wang@huawei.com> wrote:
> >>>>> Hi， sorry for the mistake，the bug is fixed by
> >>>>>
> >>>>> https://lore.kernel.org/linux-riscv/20210602085517.127481-2-wangkefeng.wang@huawei.com/
> >>>> What are we on the patch you mentioned?
> >>>>
> >>>> I don't see it applied in the linux/master.
> >>>>
> >>>> Also there should be a "Fixes" tag and stable@vger.kernel.org cc'ed
> >>>> because 32-bit is broken since v5.12.
> >>> https://kernel.googlesource.com/pub/scm/linux/kernel/git/riscv/linux/+/c9811e379b211c67ba29fb09d6f644dd44cfcff2
> >>>
> >>> it's on Palmer' riscv-next.
> >> Not sure riscv-next is for which release? This is a regression and
> >> should be on 5.13.
> >>
> >>> Hi Palmer, should I resend or could you help me to add the fixes tag?
> > Your patch mixed 2 things (fix plus one feature) together, so it is
> > not proper to back port your patch.
>
> "mem=" will change the range of memblock, so the fix part must be included.
>

Yes, so you can rebase the "mem=" changes on top of my patch.

The practice is that we should not mix 2 things in one patch. I can
imagine that you wanted to add "mem=" to RISC-V and suddenly found the
existing logic was broken, so you sent one patch to do both.

>
> >
> > Here is my 2 cents:
> >
> > 1. Drop your patch from riscv-next
> > 2. Apply my patch as it is a simple fix to previous commit. This
> > allows stable kernel to cherry-pick the fix to v5.12 and v5.13.
> > 3. Rebase your patch against mine, and resend v2
> >
> > Let me know if this makes sense.
>
> It is not a big problem for me, but I have no right abourt riscv-next,
>
> let's wait Palmer's advise.
>

Sure. Palmer, let me know your thoughts.

Regards,
Bin