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From: Bjorn Helgaas <bhelgaas@google.com>
To: Yinghai Lu <yinghai@kernel.org>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Tony Luck <tony.luck@intel.com>,
	David Miller <davem@davemloft.net>, x86 <x86@kernel.org>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org
Subject: Re: [PATCH -v11 04/30] PCI: Add busn_res into struct pci_bus.
Date: Mon, 30 Apr 2012 22:02:05 -0600	[thread overview]
Message-ID: <CAErSpo57pH81KtUbYZ3j6y4kC+ka33Lzr4rfcywVWf8OTmH_5Q@mail.gmail.com> (raw)
In-Reply-To: <CAE9FiQV0XTd_1Ujz=tb6BSuwJvJ9nbT_GbE2PREtgMGv=yG0+g@mail.gmail.com>

On Mon, Apr 30, 2012 at 6:32 PM, Yinghai Lu <yinghai@kernel.org> wrote:
> On Mon, Apr 30, 2012 at 4:25 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
>>> --- a/include/linux/pci.h
>>> +++ b/include/linux/pci.h
>>> @@ -419,6 +419,7 @@ struct pci_bus {
>>>        struct list_head slots;         /* list of slots on this bus */
>>>        struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
>>>        struct list_head resources;     /* address space routed to this bus */
>>> +       struct resource busn_res;       /* track registered bus num range */
>>>
>>>        struct pci_ops  *ops;           /* configuration access functions */
>>>        void            *sysdata;       /* hook for sys-specific extension */
>>
>> struct pci_bus already includes "secondary" and "subordinate".    This
>> new "busn_res" looks like it will contain the same information.  Why
>> do we need both?
>
> In some case the could be different.
> for root bus from _CRS, busn_res could bigger than subordinate,
> because scan_childbus will update subordinate.

For a bus below a P2P bridge, I think it's always the case that the
bridge's Subordinate Bus Number in config space == bus->subordinate ==
bus->busn_res.end (correct me if I'm wrong).  I don't like the
redundancy in this case.

For a root bus where you set bus->busn_res from _CRS and
bus->subordinate = pci_scan_child_bus(), bus->busn_res.end will
generally be different from bus->subordinate, but there's no point in
keeping track of bus->subordinate.

The reason we care about secondary and subordinate is so we can
allocate bus numbers when enumerating devices behind a bridge.  The
only thing we need for that is the aperture of the upstream bridge and
the apertures of any peer bridges on the same bus.  Let's say we have
this:

        pci 00:00.0 bridge to [bus a-b]
        pci a:01.0 bridge to [bus c-d]  (already enumerated)
        pci a:02.0 bridge to [bus e-f]  (already enumerated)
        pci a:03.0 bridge to [bus x-y]  (enumerating now)

We know [c-d] is contained in [a-b]; [e-f] is contained in [a-b]; a <
c; and a < e.  To enumerate behind a:03.0, we need to assign x & y
such that a < x; [x-y] is contained in [a-b]; and [x-y] does not
overlap [c-d] or [e-f].  The value from pci_scan_child_bus() is
probably useful for setting y, but we don't have to save it in the
struct pci_bus for that.

> and also we have one resource to insert it into the resource tree, so
> later could probe/allocate bus num range.

Sorry, I didn't understand this.

Bjorn

  reply	other threads:[~2012-05-01  4:02 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-19  5:42 [PATCH -v11 00/30] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 01/30] x86, PCI: Add print all root info for not using _CRS path Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 02/30] x86, PCI: Allocate temp range array in amd_bus pci_root_info probing Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 03/30] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 04/30] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-04-30 23:25   ` Bjorn Helgaas
2012-05-01  0:32     ` Yinghai Lu
2012-05-01  4:02       ` Bjorn Helgaas [this message]
2012-05-01  6:27         ` Yinghai Lu
2012-05-01 15:40           ` Bjorn Helgaas
2012-05-01 19:28             ` Yinghai Lu
2012-05-02  5:07               ` Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 05/30] PCI: Add busn_res operation functions Yinghai Lu
2012-04-30 23:29   ` Bjorn Helgaas
2012-05-01  0:34     ` Yinghai Lu
2012-05-01  7:19       ` Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 06/30] PCI: Release busn_res when removing bus Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 07/30] PCI: Insert busn_res in pci_create_root_bus() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 08/30] PCI: Checking busn_res in pci_scan_root_bus() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 09/30] PCI: Add default busn_resource Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 10/30] PCI: Add default busn_res for pci_scan_bus() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 11/30] x86, PCI: Add busn_res into resources list for acpi path Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 12/30] x86, PCI: Put busn resource in pci_root_info for not using _CRS path Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 13/30] PCI, ia64: Register busn_res for root buses Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 14/30] PCI, sparc: " Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 15/30] PCI, powerpc: " Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 16/30] PCI, parisc: " Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 17/30] resources: Add probe_resource() Yinghai Lu
2012-05-01 23:57   ` Bjorn Helgaas
2012-05-02  5:19     ` Yinghai Lu
2012-05-02  7:01       ` Yinghai Lu
2012-05-02 15:14         ` Bjorn Helgaas
2012-03-19  5:42 ` [PATCH -v11 18/30] resources: Replace registered resource in tree Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 19/30] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 20/30] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 21/30] PCI: Add pci_bus_replace_busn_res() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 22/30] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 23/30] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 24/30] PCI: Kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 25/30] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 26/30] pcmcia: Remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 27/30] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 28/30] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-03-19  5:43 ` [PATCH -v11 29/30] PCI: More strict checking of valid range for bridge Yinghai Lu
2012-03-19  5:43 ` [PATCH -v11 30/30] PCI: Don't shrink too much for hotplug bridge Yinghai Lu
2012-05-02 21:22 ` [PATCH -v11 00/30] PCI: allocate pci bus num range for unassigned bridge busn Bjorn Helgaas
2012-05-03  9:08   ` Yinghai Lu
2012-05-03 23:47     ` Bjorn Helgaas
2012-05-04 20:07       ` Yinghai Lu

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