Re: [PATCH v3 00/32] provide interfaces to access PCIe capabilities registers

[Bjorn Helgaas <bhelgaas@google.com>]

On Mon, Aug 20, 2012 at 10:10 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:

> So I'll try pulling your branch (I'll do something about the tsi721.c
> stuff myself).

I pulled this into
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
pci/jiang-pcie-cap with the following changes:

  - Dropped some "pci_" prefixes on internal functions in access.c
  - Minor restructure of pcie_capability_read_*()
  - Removed export of pcie_capability_reg_implemented()
  - Reworked reset_intel_82599_sfp_virtfn() to check for FLR bit in
DEVCAP rather than using pcie_capability_reg_implemented()
  - Split driver patches into one driver per patch
  - Fixed myri10ge_toggle_relaxed() -- previous code returned useful
value, but your patch made it always return zero
  - Use 16-bit, not 32-bit, accesses for DEVCTL, DEVCTL2 (tsi721)

I am still concerned about reset_intel_82599_sfp_virtfn().  It looks
wrong and possibly unnecessary.  It looks wrong because it sets
PCI_EXP_DEVCTL_BCR_FLR and blindly clears all other bits in
PCI_EXP_DEVCTL.  Most of the bits are probably cleared by the FLR
anyway, but Aux Power PM Enable is RWS ("sticky"), so it is *not*
modified by FLR.  Therefore, using reset_intel_82599_sfp_virtfn() has
the probably unintended side effect of clearing Aux Power PM Enable.

It looks possibly unnecessary because the generic pcie_flr() does
essentially the same thing, so it's not clear why we need a special
case for 82599.

Yu or Dexuan, can you comment on these 82599 questions?

The proposed new code is here:
http://git.kernel.org/?p=linux/kernel/git/helgaas/pci.git;a=blob;f=drivers/pci/quirks.c;h=9abbf56e93fe5c98364a7dfe2b0b724047dfa4a9;hb=ef529bf0cb5606ff5bd1422d2d2700a821d8218b#l3082

Bjorn