[PATCH v2 0/3] P2040/P2041 i2c recovery erratum

[PATCH v2 0/3] P2040/P2041 i2c recovery erratum

[Chris Packham]

The P2040/P2041 has an erratum where the i2c recovery scheme
documented in the reference manual (and currently implemented
in the i2c-mpc.c driver) does not work. The errata document
provides an alternative that does work. This series implements
that alternative and uses a property in the devicetree to
decide when the alternative mechanism is needed.

Chris Packham (3):
  dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag
  powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P2041 i2c
    controllers
  i2c: mpc: implement erratum A-004447 workaround

 .../devicetree/bindings/i2c/i2c-mpc.yaml      |  7 ++
 arch/powerpc/boot/dts/fsl/p2041si-post.dtsi   | 16 ++++
 drivers/i2c/busses/i2c-mpc.c                  | 84 ++++++++++++++++++-
 3 files changed, 105 insertions(+), 2 deletions(-)

-- 
2.31.1

[PATCH v2 1/3] dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag

[Chris Packham]

Document the fsl,i2c-erratum-a004447 flag which indicates the presence
of an i2c erratum on some QorIQ SoCs.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 Documentation/devicetree/bindings/i2c/i2c-mpc.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
index 7b553d559c83..98c6fcf7bf26 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
@@ -46,6 +46,13 @@ properties:
     description: |
       I2C bus timeout in microseconds
 
+  fsl,i2c-erratum-a004447:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description: |
+      Indicates the presence of QorIQ erratum A-004447, which
+      says that the standard i2c recovery scheme mechanism does
+      not work and an alternate implementation is needed.
+
 required:
   - compatible
   - reg
-- 
2.31.1

[PATCH v2 2/3] powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P2041 i2c controllers

[Chris Packham]

The i2c controllers on the P2040/P2041 have an erratum where the
documented scheme for i2c bus recovery will not work (A-004447). A
different mechanism is needed which is documented in the P2040 Chip
Errata Rev Q (latest available at the time of writing).

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 872e4485dc3f..ddc018d42252 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -371,7 +371,23 @@ sdhc@114000 {
 	};
 
 /include/ "qoriq-i2c-0.dtsi"
+	i2c@118000 {
+		fsl,i2c-erratum-a004447;
+	};
+
+	i2c@118100 {
+		fsl,i2c-erratum-a004447;
+	};
+
 /include/ "qoriq-i2c-1.dtsi"
+	i2c@119000 {
+		fsl,i2c-erratum-a004447;
+	};
+
+	i2c@119100 {
+		fsl,i2c-erratum-a004447;
+	};
+
 /include/ "qoriq-duart-0.dtsi"
 /include/ "qoriq-duart-1.dtsi"
 /include/ "qoriq-gpio-0.dtsi"
-- 
2.31.1

[PATCH v2 3/3] i2c: mpc: implement erratum A-004447 workaround

[Chris Packham]

The P2040/P2041 has an erratum where the normal i2c recovery mechanism
does not work. Implement the alternative recovery mechanism documented
in the P2040 Chip Errata Rev Q.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    Changes in v2:
    - Use readb_poll_timeout instead of open-coded loop

 drivers/i2c/busses/i2c-mpc.c | 84 +++++++++++++++++++++++++++++++++++-
 1 file changed, 82 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 30d9e89a3db2..44e88a13a9e3 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -19,6 +19,7 @@
 
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/iopoll.h>
 #include <linux/fsl_devices.h>
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
@@ -45,6 +46,7 @@
 #define CCR_MTX  0x10
 #define CCR_TXAK 0x08
 #define CCR_RSTA 0x04
+#define CCR_RSVD 0x02
 
 #define CSR_MCF  0x80
 #define CSR_MAAS 0x40
@@ -97,7 +99,7 @@ struct mpc_i2c {
 	u32 block;
 	int rc;
 	int expect_rxack;
-
+	bool has_errata_A004447;
 };
 
 struct mpc_i2c_divider {
@@ -136,6 +138,78 @@ static void mpc_i2c_fixup(struct mpc_i2c *i2c)
 	}
 }
 
+static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask)
+{
+	int ret;
+	u8 val;
+
+	ret = readb_poll_timeout(i2c->base + MPC_I2C_SR, val,
+				 val & mask, 0, 100);
+
+	return ret;
+}
+
+/*
+ * Workaround for Erratum A004447. From the P2040CE Rev Q
+ *
+ * 1.  Set up the frequency divider and sampling rate.
+ * 2.  I2CCR - a0h
+ * 3.  Poll for I2CSR[MBB] to get set.
+ * 4.  If I2CSR[MAL] is set (an indication that SDA is stuck low), then go to
+ *     step 5. If MAL is not set, then go to step 13.
+ * 5.  I2CCR - 00h
+ * 6.  I2CCR - 22h
+ * 7.  I2CCR - a2h
+ * 8.  Poll for I2CSR[MBB] to get set.
+ * 9.  Issue read to I2CDR.
+ * 10. Poll for I2CSR[MIF] to be set.
+ * 11. I2CCR - 82h
+ * 12. Workaround complete. Skip the next steps.
+ * 13. Issue read to I2CDR.
+ * 14. Poll for I2CSR[MIF] to be set.
+ * 15. I2CCR - 80h
+ */
+static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c)
+{
+	int ret;
+	u32 val;
+
+	writeccr(i2c, CCR_MEN | CCR_MSTA);
+	ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
+	if (ret) {
+		dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
+		return;
+	}
+
+	val = readb(i2c->base + MPC_I2C_SR);
+
+	if (val & CSR_MAL) {
+		writeccr(i2c, 0x00);
+		writeccr(i2c, CCR_MSTA | CCR_RSVD);
+		writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD);
+		ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
+		if (ret) {
+			dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
+			return;
+		}
+		val = readb(i2c->base + MPC_I2C_DR);
+		ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
+		if (ret) {
+			dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
+			return;
+		}
+		writeccr(i2c, CCR_MEN | CCR_RSVD);
+	} else {
+		val = readb(i2c->base + MPC_I2C_DR);
+		ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
+		if (ret) {
+			dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
+			return;
+		}
+		writeccr(i2c, CCR_MEN);
+	}
+}
+
 #if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
 	{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
@@ -670,7 +744,10 @@ static int fsl_i2c_bus_recovery(struct i2c_adapter *adap)
 {
 	struct mpc_i2c *i2c = i2c_get_adapdata(adap);
 
-	mpc_i2c_fixup(i2c);
+	if (i2c->has_errata_A004447)
+		mpc_i2c_fixup_A004447(i2c);
+	else
+		mpc_i2c_fixup(i2c);
 
 	return 0;
 }
@@ -767,6 +844,9 @@ static int fsl_i2c_probe(struct platform_device *op)
 	}
 	dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ);
 
+	if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447"))
+		i2c->has_errata_A004447 = true;
+
 	i2c->adap = mpc_ops;
 	scnprintf(i2c->adap.name, sizeof(i2c->adap.name),
 		  "MPC adapter (%s)", of_node_full_name(op->dev.of_node));
-- 
2.31.1

Re: [PATCH v2 2/3] powerpc/fsl: set fsl, i2c-erratum-a004447 flag for P2041 i2c controllers

[Joakim Tjernlund]

On Fri, 2021-05-07 at 12:40 +1200, Chris Packham wrote:
> The i2c controllers on the P2040/P2041 have an erratum where the
> documented scheme for i2c bus recovery will not work (A-004447). A
> different mechanism is needed which is documented in the P2040 Chip
> Errata Rev Q (latest available at the time of writing).

From what I can tell this Erratum also applies to P1010

 Jocke

Re: [PATCH v2 2/3] powerpc/fsl: set fsl, i2c-erratum-a004447 flag for P2041 i2c controllers

[Joakim Tjernlund]

On Fri, 2021-05-07 at 10:04 +0200, Joakim Tjernlund wrote:
> On Fri, 2021-05-07 at 12:40 +1200, Chris Packham wrote:
> > The i2c controllers on the P2040/P2041 have an erratum where the
> > documented scheme for i2c bus recovery will not work (A-004447). A
> > different mechanism is needed which is documented in the P2040 Chip
> > Errata Rev Q (latest available at the time of writing).
> 
> From what I can tell this Erratum also applies to P1010
> 
>  Jocke

Reference: https://media.digikey.com/pdf/PCNs/Freescale/P1010CE_RevL.pdf

Also, I think this series should go to stable.

 Jocke

Re: [PATCH v2 3/3] i2c: mpc: implement erratum A-004447 workaround

[Andy Shevchenko]

On Fri, May 7, 2021 at 3:40 AM Chris Packham
<chris.packham@alliedtelesis.co.nz> wrote:
>
> The P2040/P2041 has an erratum where the normal i2c recovery mechanism
> does not work. Implement the alternative recovery mechanism documented
> in the P2040 Chip Errata Rev Q.

Thanks.

> +static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask)
> +{
> +       int ret;
> +       u8 val;
> +
> +       ret = readb_poll_timeout(i2c->base + MPC_I2C_SR, val,
> +                                val & mask, 0, 100);
> +
> +       return ret;
> +}

So, now you may shrink it even further, i.e.

       void __iomem *sr = i2c->base + MPC_I2C_SR;
       u8 val;

       return readb_poll_timeout(sr, val, val & mask, 0, 100);

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v2 3/3] i2c: mpc: implement erratum A-004447 workaround

[Joakim Tjernlund]

On Fri, 2021-05-07 at 14:46 +0300, Andy Shevchenko wrote:
> On Fri, May 7, 2021 at 3:40 AM Chris Packham
> <chris.packham@alliedtelesis.co.nz> wrote:
> > 
> > The P2040/P2041 has an erratum where the normal i2c recovery mechanism
> > does not work. Implement the alternative recovery mechanism documented
> > in the P2040 Chip Errata Rev Q.
> 
> Thanks.
> 
> > +static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask)
> > +{
> > +       int ret;
> > +       u8 val;
> > +
> > +       ret = readb_poll_timeout(i2c->base + MPC_I2C_SR, val,
> > +                                val & mask, 0, 100);
> > +
> > +       return ret;
> > +}
> 
> So, now you may shrink it even further, i.e.
> 
>        void __iomem *sr = i2c->base + MPC_I2C_SR;
>        u8 val;
> 
>        return readb_poll_timeout(sr, val, val & mask, 0, 100);
> 

val looks uninitialised before use?

Re: [PATCH v2 3/3] i2c: mpc: implement erratum A-004447 workaround

[Andy Shevchenko]

On Fri, May 7, 2021 at 5:52 PM Joakim Tjernlund
<Joakim.Tjernlund@infinera.com> wrote:
> On Fri, 2021-05-07 at 14:46 +0300, Andy Shevchenko wrote:
> > On Fri, May 7, 2021 at 3:40 AM Chris Packham
> > <chris.packham@alliedtelesis.co.nz> wrote:

...

> > So, now you may shrink it even further, i.e.
> >
> >        void __iomem *sr = i2c->base + MPC_I2C_SR;
> >        u8 val;
> >
> >        return readb_poll_timeout(sr, val, val & mask, 0, 100);
> >
>
> val looks uninitialised before use?

Nope.

Thinking about naming, perhaps

        void __iomem *addr = i2c->base + MPC_I2C_SR;
        u8 sr; // or leave as val?

        return readb_poll_timeout(addr, sr, sr & mask, 0, 100);

would be more clear.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v2 1/3] dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag

[Rob Herring]

On Fri, May 07, 2021 at 12:40:45PM +1200, Chris Packham wrote:
> Document the fsl,i2c-erratum-a004447 flag which indicates the presence
> of an i2c erratum on some QorIQ SoCs.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-mpc.yaml | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
> index 7b553d559c83..98c6fcf7bf26 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
> +++ b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
> @@ -46,6 +46,13 @@ properties:
>      description: |
>        I2C bus timeout in microseconds
>  
> +  fsl,i2c-erratum-a004447:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description: |
> +      Indicates the presence of QorIQ erratum A-004447, which
> +      says that the standard i2c recovery scheme mechanism does
> +      not work and an alternate implementation is needed.

The problem with adding a property for an errata is you have to update 
the dtb. If you use the compatible string, then only an OS update is 
needed. That assumes you have specific enough compatible strings.

Rob

Re: [PATCH v2 1/3] dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag

[Chris Packham]

On 8/05/21 9:49 am, Rob Herring wrote:
> On Fri, May 07, 2021 at 12:40:45PM +1200, Chris Packham wrote:
>> Document the fsl,i2c-erratum-a004447 flag which indicates the presence
>> of an i2c erratum on some QorIQ SoCs.
>>
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>> ---
>>   Documentation/devicetree/bindings/i2c/i2c-mpc.yaml | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
>> index 7b553d559c83..98c6fcf7bf26 100644
>> --- a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
>> +++ b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
>> @@ -46,6 +46,13 @@ properties:
>>       description: |
>>         I2C bus timeout in microseconds
>>   
>> +  fsl,i2c-erratum-a004447:
>> +    $ref: /schemas/types.yaml#/definitions/flag
>> +    description: |
>> +      Indicates the presence of QorIQ erratum A-004447, which
>> +      says that the standard i2c recovery scheme mechanism does
>> +      not work and an alternate implementation is needed.
> The problem with adding a property for an errata is you have to update
> the dtb. If you use the compatible string, then only an OS update is
> needed. That assumes you have specific enough compatible strings.

I was following the style of the existing fsl,usb-erratum-a007792 or 
fsl,erratum-a008585 properties. But that's not really a compelling reason.

The existing compatible string is "fsl-i2c" and it's used by pretty much 
every powerpc QorIQ SoC. There are some specific compatible strings in 
the driver for some of the older mpc SoCs. A more specific compatible 
string will work although determining which ones are affected might be a 
bit troublesome. That we know of the P2041 and P1010 are affected but I 
suspect there may be more. One disadvantage of using the compatible 
string is that as affected SoCs are identified we'll have to update the 
driver to know that SoC is affected and update the dtb to use it. With 
the property we'd just have to update the dtb.

I'm not too fussed either way so if that's a hard NACK on the property I 
can send a version that uses compatible strings instead.

Re: [PATCH v2 2/3] powerpc/fsl: set fsl, i2c-erratum-a004447 flag for P2041 i2c controllers

[Chris Packham]

On 7/05/21 8:24 pm, Joakim Tjernlund wrote:
> On Fri, 2021-05-07 at 10:04 +0200, Joakim Tjernlund wrote:
>> On Fri, 2021-05-07 at 12:40 +1200, Chris Packham wrote:
>>> The i2c controllers on the P2040/P2041 have an erratum where the
>>> documented scheme for i2c bus recovery will not work (A-004447). A
>>> different mechanism is needed which is documented in the P2040 Chip
>>> Errata Rev Q (latest available at the time of writing).
>>  From what I can tell this Erratum also applies to P1010
Will add for v3.
>>   Jocke
> Reference: https://media.digikey.com/pdf/PCNs/Freescale/P1010CE_RevL.pdf
>
> Also, I think this series should go to stable.
This series builds on changes that have been merged for v5.13. I haven't 
checked if it applies to stable, I think at least commit 65171b2df15e 
("i2c: mpc: Make use of i2c_recover_bus()") would need to come along 
with it.

Re: [PATCH v2 1/3] dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag

[Rob Herring]

On Sun, May 9, 2021 at 4:08 PM Chris Packham
<Chris.Packham@alliedtelesis.co.nz> wrote:
>
>
> On 8/05/21 9:49 am, Rob Herring wrote:
> > On Fri, May 07, 2021 at 12:40:45PM +1200, Chris Packham wrote:
> >> Document the fsl,i2c-erratum-a004447 flag which indicates the presence
> >> of an i2c erratum on some QorIQ SoCs.
> >>
> >> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> >> ---
> >>   Documentation/devicetree/bindings/i2c/i2c-mpc.yaml | 7 +++++++
> >>   1 file changed, 7 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
> >> index 7b553d559c83..98c6fcf7bf26 100644
> >> --- a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
> >> +++ b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
> >> @@ -46,6 +46,13 @@ properties:
> >>       description: |
> >>         I2C bus timeout in microseconds
> >>
> >> +  fsl,i2c-erratum-a004447:
> >> +    $ref: /schemas/types.yaml#/definitions/flag
> >> +    description: |
> >> +      Indicates the presence of QorIQ erratum A-004447, which
> >> +      says that the standard i2c recovery scheme mechanism does
> >> +      not work and an alternate implementation is needed.
> > The problem with adding a property for an errata is you have to update
> > the dtb. If you use the compatible string, then only an OS update is
> > needed. That assumes you have specific enough compatible strings.
>
> I was following the style of the existing fsl,usb-erratum-a007792 or
> fsl,erratum-a008585 properties. But that's not really a compelling reason.
>
> The existing compatible string is "fsl-i2c" and it's used by pretty much
> every powerpc QorIQ SoC. There are some specific compatible strings in
> the driver for some of the older mpc SoCs. A more specific compatible
> string will work although determining which ones are affected might be a
> bit troublesome. That we know of the P2041 and P1010 are affected but I
> suspect there may be more. One disadvantage of using the compatible
> string is that as affected SoCs are identified we'll have to update the
> driver to know that SoC is affected and update the dtb to use it. With
> the property we'd just have to update the dtb.

If you don't have specific compatibles in the dtb already, then it's
mute as the point was to avoid the dtb update.

> I'm not too fussed either way so if that's a hard NACK on the property I
> can send a version that uses compatible strings instead.

Acked-by: Rob Herring <robh@kernel.org>

You could still add compatibles for the next time...