* [PATCH] riscv: kprobes: allow writing to x0
@ 2023-08-29 18:25 Nam Cao
2023-08-29 19:04 ` Charlie Jenkins
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Nam Cao @ 2023-08-29 18:25 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, linux-kernel
Cc: guoren, Nam Cao, stable
Instructions can write to x0, so we should simulate these instructions
normally.
Currently, the kernel hangs if an instruction who writes to x0 is
simulated.
Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
Cc: stable@vger.kernel.org
Signed-off-by: Nam Cao <namcaov@gmail.com>
---
arch/riscv/kernel/probes/simulate-insn.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
index d3099d67816d..6c166029079c 100644
--- a/arch/riscv/kernel/probes/simulate-insn.c
+++ b/arch/riscv/kernel/probes/simulate-insn.c
@@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index,
unsigned long val)
{
if (index == 0)
- return false;
+ return true;
else if (index <= 31)
*((unsigned long *)regs + index) = val;
else
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] riscv: kprobes: allow writing to x0
2023-08-29 18:25 [PATCH] riscv: kprobes: allow writing to x0 Nam Cao
@ 2023-08-29 19:04 ` Charlie Jenkins
2023-08-30 1:37 ` Guo Ren
2023-11-06 15:00 ` patchwork-bot+linux-riscv
2 siblings, 0 replies; 4+ messages in thread
From: Charlie Jenkins @ 2023-08-29 19:04 UTC (permalink / raw)
To: Nam Cao
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv,
linux-kernel, guoren, stable
On Tue, Aug 29, 2023 at 08:25:00PM +0200, Nam Cao wrote:
> Instructions can write to x0, so we should simulate these instructions
> normally.
>
> Currently, the kernel hangs if an instruction who writes to x0 is
> simulated.
>
> Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
> Cc: stable@vger.kernel.org
> Signed-off-by: Nam Cao <namcaov@gmail.com>
> ---
> arch/riscv/kernel/probes/simulate-insn.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
> index d3099d67816d..6c166029079c 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.c
> +++ b/arch/riscv/kernel/probes/simulate-insn.c
> @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index,
> unsigned long val)
> {
> if (index == 0)
> - return false;
> + return true;
> else if (index <= 31)
> *((unsigned long *)regs + index) = val;
> else
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Thank you for this change.
simulate_auipc would previously fail with an rd = 0 which made sense
because auipc it is defined as a HINT in the riscv spec when rd = 0,
but QEMU and spike don't say it is an illegal instruction so I think
it is okay to make this change.
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] riscv: kprobes: allow writing to x0
2023-08-29 18:25 [PATCH] riscv: kprobes: allow writing to x0 Nam Cao
2023-08-29 19:04 ` Charlie Jenkins
@ 2023-08-30 1:37 ` Guo Ren
2023-11-06 15:00 ` patchwork-bot+linux-riscv
2 siblings, 0 replies; 4+ messages in thread
From: Guo Ren @ 2023-08-30 1:37 UTC (permalink / raw)
To: Nam Cao
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv,
linux-kernel, stable
On Wed, Aug 30, 2023 at 2:25 AM Nam Cao <namcaov@gmail.com> wrote:
>
> Instructions can write to x0, so we should simulate these instructions
> normally.
>
> Currently, the kernel hangs if an instruction who writes to x0 is
> simulated.
>
> Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
> Cc: stable@vger.kernel.org
> Signed-off-by: Nam Cao <namcaov@gmail.com>
> ---
> arch/riscv/kernel/probes/simulate-insn.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
> index d3099d67816d..6c166029079c 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.c
> +++ b/arch/riscv/kernel/probes/simulate-insn.c
> @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index,
> unsigned long val)
> {
> if (index == 0)
> - return false;
> + return true;
Acked-by: Guo Ren <guoren@kernel.org>
> else if (index <= 31)
> *((unsigned long *)regs + index) = val;
> else
> --
> 2.34.1
>
--
Best Regards
Guo Ren
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] riscv: kprobes: allow writing to x0
2023-08-29 18:25 [PATCH] riscv: kprobes: allow writing to x0 Nam Cao
2023-08-29 19:04 ` Charlie Jenkins
2023-08-30 1:37 ` Guo Ren
@ 2023-11-06 15:00 ` patchwork-bot+linux-riscv
2 siblings, 0 replies; 4+ messages in thread
From: patchwork-bot+linux-riscv @ 2023-11-06 15:00 UTC (permalink / raw)
To: Nam Cao
Cc: linux-riscv, paul.walmsley, palmer, aou, linux-kernel, guoren, stable
Hello:
This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Tue, 29 Aug 2023 20:25:00 +0200 you wrote:
> Instructions can write to x0, so we should simulate these instructions
> normally.
>
> Currently, the kernel hangs if an instruction who writes to x0 is
> simulated.
>
> Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
> Cc: stable@vger.kernel.org
> Signed-off-by: Nam Cao <namcaov@gmail.com>
>
> [...]
Here is the summary with links:
- riscv: kprobes: allow writing to x0
https://git.kernel.org/riscv/c/8cb22bec1426
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-08-29 18:25 [PATCH] riscv: kprobes: allow writing to x0 Nam Cao
2023-08-29 19:04 ` Charlie Jenkins
2023-08-30 1:37 ` Guo Ren
2023-11-06 15:00 ` patchwork-bot+linux-riscv
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