From: "Rafael J. Wysocki" <rafael@kernel.org>
To: Thomas Garnier <thgarnie@google.com>
Cc: Kernel Hardening <kernel-hardening@lists.openwall.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Len Brown <len.brown@intel.com>, Pavel Machek <pavel@ucw.cz>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
"the arch/x86 maintainers" <x86@kernel.org>,
Linux PM <linux-pm@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 09/27] x86/acpi: Adapt assembly for PIE support
Date: Wed, 30 May 2018 10:19:50 +0200 [thread overview]
Message-ID: <CAJZ5v0j8jcCfsq9QF=kZavoXhrGd+4RAuUEMPkupMXR5HNUmJQ@mail.gmail.com> (raw)
In-Reply-To: <20180529221625.33541-10-thgarnie@google.com>
On Wed, May 30, 2018 at 12:15 AM, Thomas Garnier <thgarnie@google.com> wrote:
> Change the assembly code to use only relative references of symbols for the
> kernel to be PIE compatible.
>
> Position Independent Executable (PIE) support will allow to extend the
> KASLR randomization range 0xffffffff80000000.
>
> Signed-off-by: Thomas Garnier <thgarnie@google.com>
> Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
> arch/x86/kernel/acpi/wakeup_64.S | 31 ++++++++++++++++---------------
> 1 file changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
> index 50b8ed0317a3..472659c0f811 100644
> --- a/arch/x86/kernel/acpi/wakeup_64.S
> +++ b/arch/x86/kernel/acpi/wakeup_64.S
> @@ -14,7 +14,7 @@
> * Hooray, we are in Long 64-bit mode (but still running in low memory)
> */
> ENTRY(wakeup_long64)
> - movq saved_magic, %rax
> + movq saved_magic(%rip), %rax
> movq $0x123456789abcdef0, %rdx
> cmpq %rdx, %rax
> jne bogus_64_magic
> @@ -25,14 +25,14 @@ ENTRY(wakeup_long64)
> movw %ax, %es
> movw %ax, %fs
> movw %ax, %gs
> - movq saved_rsp, %rsp
> + movq saved_rsp(%rip), %rsp
>
> - movq saved_rbx, %rbx
> - movq saved_rdi, %rdi
> - movq saved_rsi, %rsi
> - movq saved_rbp, %rbp
> + movq saved_rbx(%rip), %rbx
> + movq saved_rdi(%rip), %rdi
> + movq saved_rsi(%rip), %rsi
> + movq saved_rbp(%rip), %rbp
>
> - movq saved_rip, %rax
> + movq saved_rip(%rip), %rax
> jmp *%rax
> ENDPROC(wakeup_long64)
>
> @@ -45,7 +45,7 @@ ENTRY(do_suspend_lowlevel)
> xorl %eax, %eax
> call save_processor_state
>
> - movq $saved_context, %rax
> + leaq saved_context(%rip), %rax
> movq %rsp, pt_regs_sp(%rax)
> movq %rbp, pt_regs_bp(%rax)
> movq %rsi, pt_regs_si(%rax)
> @@ -64,13 +64,14 @@ ENTRY(do_suspend_lowlevel)
> pushfq
> popq pt_regs_flags(%rax)
>
> - movq $.Lresume_point, saved_rip(%rip)
> + leaq .Lresume_point(%rip), %rax
> + movq %rax, saved_rip(%rip)
>
> - movq %rsp, saved_rsp
> - movq %rbp, saved_rbp
> - movq %rbx, saved_rbx
> - movq %rdi, saved_rdi
> - movq %rsi, saved_rsi
> + movq %rsp, saved_rsp(%rip)
> + movq %rbp, saved_rbp(%rip)
> + movq %rbx, saved_rbx(%rip)
> + movq %rdi, saved_rdi(%rip)
> + movq %rsi, saved_rsi(%rip)
>
> addq $8, %rsp
> movl $3, %edi
> @@ -82,7 +83,7 @@ ENTRY(do_suspend_lowlevel)
> .align 4
> .Lresume_point:
> /* We don't restore %rax, it must be 0 anyway */
> - movq $saved_context, %rax
> + leaq saved_context(%rip), %rax
> movq saved_context_cr4(%rax), %rbx
> movq %rbx, %cr4
> movq saved_context_cr3(%rax), %rbx
> --
> 2.17.0.921.gf22659ad46-goog
>
next prev parent reply other threads:[~2018-05-30 8:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20180529221625.33541-1-thgarnie@google.com>
2018-05-29 22:15 ` [PATCH v4 01/27] x86/crypto: Adapt assembly for PIE support Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 02/27] x86: Use symbol name on bug table " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 03/27] x86: Use symbol name in jump " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 04/27] x86: Add macro to get symbol address " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 05/27] x86: relocate_kernel - Adapt assembly " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 06/27] x86/entry/64: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 07/27] x86: pm-trace - " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 08/27] x86/CPU: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 09/27] x86/acpi: " Thomas Garnier
2018-05-30 8:19 ` Rafael J. Wysocki [this message]
2018-05-29 22:15 ` [PATCH v4 10/27] x86/boot/64: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 11/27] x86/power/64: " Thomas Garnier
2018-05-30 8:20 ` Rafael J. Wysocki
2018-05-29 22:15 ` [PATCH v4 12/27] x86/paravirt: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 13/27] x86/boot/64: Build head64.c as mcmodel large when PIE is enabled Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 14/27] x86/percpu: Adapt percpu for PIE support Thomas Garnier
2018-05-29 22:46 ` Christopher Lameter
2018-05-29 23:08 ` Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 15/27] compiler: Option to default to hidden symbols Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 16/27] compiler: Option to add PROVIDE_HIDDEN replacement for weak symbols Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 17/27] x86/relocs: Handle PIE relocations Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 18/27] xen: Adapt assembly for PIE support Thomas Garnier
2018-06-01 15:44 ` Boris Ostrovsky
2018-06-01 15:53 ` Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 19/27] kvm: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 20/27] x86: Support global stack cookie Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 21/27] x86/ftrace: Adapt function tracing for PIE support Thomas Garnier
2018-06-04 20:16 ` Steven Rostedt
2018-06-04 21:06 ` Thomas Garnier
2018-06-04 21:44 ` Steven Rostedt
2018-06-05 16:56 ` Thomas Garnier
2018-06-05 21:19 ` Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 22/27] x86/modules: Add option to start module section after kernel Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 23/27] x86/modules: Adapt module loading for PIE support Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 24/27] x86/mm: Make the x86 GOT read-only Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 25/27] x86/pie: Add option to build the kernel as PIE Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 26/27] x86/relocs: Add option to generate 64-bit relocations Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 27/27] x86/kaslr: Add option to extend KASLR range from 1GB to 3GB Thomas Garnier
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