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From: Thomas Garnier <thgarnie@google.com>
To: Christoph Lameter <cl@linux.com>
Cc: Kernel Hardening <kernel-hardening@lists.openwall.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
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	Skip Frederic Weisbecker <frederic@kernel.org>,
	Nicholas Piggin <npiggin@gmail.com>,
	Kees Cook <keescook@chromium.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H . Peter Anvin" <hpa@zytor.com>,
	"the arch/x86 maintainers" <x86@kernel.org>,
	Tejun Heo <tj@kernel.org>, Dennis Zhou <dennisszhou@gmail.com>,
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	Dominik Brodowski <linux@dominikbrodowski.net>,
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	xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v4 14/27] x86/percpu: Adapt percpu for PIE support
Date: Tue, 29 May 2018 16:08:24 -0700	[thread overview]
Message-ID: <CAJcbSZF_MUpG37e7rt67pfNOT+m3ed2L+jRgvQ2Enb0wVLdOcg@mail.gmail.com> (raw)
In-Reply-To: <01000163ae145cac-5ac07b51-8f08-4da5-bb93-0238d59756d3-000000@email.amazonses.com>

On Tue, May 29, 2018 at 3:46 PM Christopher Lameter <cl@linux.com> wrote:

> On Tue, 29 May 2018, Thomas Garnier wrote:

> > Perpcu uses a clever design where the .percu ELF section has a virtual
> > address of zero and the relocation code avoid relocating specific
> > symbols. It makes the code simple and easily adaptable with or without
> > SMP support.
> >
> > This design is incompatible with PIE because generated code always try
to
> > access the zero virtual address relative to the default mapping address.

> We always access relative to the "segment register".

> You can already change the segment register to relocate the per cpu
> sections arbitrarily since all per cpu "addresses" are offsets relative to
> the segment register. I am not sure what exactly you are trying to
> accomplish here?

When building with PIE, the compiler wants the code to be relocatable
anywhere in the 64-bit VA space. Instead of taking the segment register as
an immediate value, it takes it as VA that need to be relocated relative to
where the kernel is mapped. The per-cpu section VA is zero to create the
proper offset to the different variable. The kernel could be at the top of
the 64-bit VA space. PIE will try to create the delta between any VA and
zero and fail because segment register based operations do not have full
64-bit VA range. Does it make sense?

For PIE only, this change will remove the per-cpu section VA of zero. Now
the distance between the per-cpu symbol and the kernel base VA can fit in
the generated instructions.


> Maybe you need to explain it better?

I will try do explain it better on the next patch set.




-- 
Thomas

  reply	other threads:[~2018-05-29 23:08 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20180529221625.33541-1-thgarnie@google.com>
2018-05-29 22:15 ` [PATCH v4 01/27] x86/crypto: Adapt assembly for PIE support Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 02/27] x86: Use symbol name on bug table " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 03/27] x86: Use symbol name in jump " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 04/27] x86: Add macro to get symbol address " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 05/27] x86: relocate_kernel - Adapt assembly " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 06/27] x86/entry/64: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 07/27] x86: pm-trace - " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 08/27] x86/CPU: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 09/27] x86/acpi: " Thomas Garnier
2018-05-30  8:19   ` Rafael J. Wysocki
2018-05-29 22:15 ` [PATCH v4 10/27] x86/boot/64: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 11/27] x86/power/64: " Thomas Garnier
2018-05-30  8:20   ` Rafael J. Wysocki
2018-05-29 22:15 ` [PATCH v4 12/27] x86/paravirt: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 13/27] x86/boot/64: Build head64.c as mcmodel large when PIE is enabled Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 14/27] x86/percpu: Adapt percpu for PIE support Thomas Garnier
2018-05-29 22:46   ` Christopher Lameter
2018-05-29 23:08     ` Thomas Garnier [this message]
2018-05-29 22:15 ` [PATCH v4 15/27] compiler: Option to default to hidden symbols Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 16/27] compiler: Option to add PROVIDE_HIDDEN replacement for weak symbols Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 17/27] x86/relocs: Handle PIE relocations Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 18/27] xen: Adapt assembly for PIE support Thomas Garnier
2018-06-01 15:44   ` Boris Ostrovsky
2018-06-01 15:53     ` Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 19/27] kvm: " Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 20/27] x86: Support global stack cookie Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 21/27] x86/ftrace: Adapt function tracing for PIE support Thomas Garnier
2018-06-04 20:16   ` Steven Rostedt
2018-06-04 21:06     ` Thomas Garnier
2018-06-04 21:44       ` Steven Rostedt
2018-06-05 16:56         ` Thomas Garnier
2018-06-05 21:19           ` Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 22/27] x86/modules: Add option to start module section after kernel Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 23/27] x86/modules: Adapt module loading for PIE support Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 24/27] x86/mm: Make the x86 GOT read-only Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 25/27] x86/pie: Add option to build the kernel as PIE Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 26/27] x86/relocs: Add option to generate 64-bit relocations Thomas Garnier
2018-05-29 22:15 ` [PATCH v4 27/27] x86/kaslr: Add option to extend KASLR range from 1GB to 3GB Thomas Garnier

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