From: Len Brown <lenb@kernel.org>
To: Andy Lutomirski <luto@kernel.org>
Cc: "Bae, Chang Seok" <chang.seok.bae@intel.com>,
Borislav Petkov <bp@suse.de>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>,
"the arch/x86 maintainers" <x86@kernel.org>,
"Brown, Len" <len.brown@intel.com>,
Dave Hansen <dave.hansen@intel.com>,
"Liu, Jing2" <jing2.liu@intel.com>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 24/28] x86/fpu/xstate: Use per-task xstate mask for saving xstate in signal frame
Date: Tue, 25 May 2021 10:04:36 -0400 [thread overview]
Message-ID: <CAJvTdKmprgO9h=YgvQC9KW5kS6GAvE30t-1MTOyOgozX+ehnLw@mail.gmail.com> (raw)
In-Reply-To: <c6b08bd7-816f-4683-9f68-716634d1529e@www.fastmail.com>
On Tue, May 25, 2021 at 12:48 AM Andy Lutomirski <luto@kernel.org> wrote:
>
>
>
> On Mon, May 24, 2021, at 11:06 AM, Len Brown wrote:
> > On Sun, May 23, 2021 at 11:15 PM Andy Lutomirski <luto@kernel.org> wrote:
> > >
> > > If I'm reading this right, it means that tasks that have ever used AMX
> > > get one format and tasks that haven't get another one.
> >
> > No. The format of the XSTATE on the signal stack is uncompressed XSAVE
> > format for both AMX and non-AMX tasks, both before and after this patch.
> > That is because XSAVE gets the format from XCR0. It gets the fields
> > to write from the run-time parameter.
> >
> > So the change here allows a non-AMX task to skip writing data (zeros)
> > to the AMX region of its XSTATE buffer.
>
> I misread the patch. I still think this patch is useless.
This patch allows skipping writing 8KB of zeros in XSAVE, rather than
writing zeros.
This reduces both the cycle count and cache impact of context-switch.
Some might consider that useful, rather than useless.
> > The subsequent patch adds the further optimization of (manually) checking
> > for INIT state for an AMX-task and also skip writing data (zeros) in that case.
> >
> > We should have done this optimization for AVX-512, but instead we
> > guaranteed writing zeros, which I think is a waste of both transfer time
> > and cache footprint.
>
> If no one depends on it, it’s not ABI.
Agreed.
Perhaps in the future we can see if reducing AVX-512 cache footprint
this same way is beneficial.
--
Len Brown, Intel Open Source Technology Center
next prev parent reply other threads:[~2021-05-25 14:04 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-23 19:32 [PATCH v5 00/28] x86: Support Intel Advanced Matrix Extensions Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 01/28] x86/fpu/xstate: Modify the initialization helper to handle both static and dynamic buffers Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 02/28] x86/fpu/xstate: Modify state copy helpers " Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 03/28] x86/fpu/xstate: Modify address finders " Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 04/28] x86/fpu/xstate: Modify the context restore helper " Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 05/28] x86/fpu/xstate: Add a new variable to indicate dynamic user states Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 06/28] x86/fpu/xstate: Add new variables to indicate dynamic xstate buffer size Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 07/28] x86/fpu/xstate: Calculate and remember dynamic xstate buffer sizes Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 08/28] x86/fpu/xstate: Convert the struct fpu 'state' field to a pointer Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 09/28] x86/fpu/xstate: Introduce helpers to manage the xstate buffer dynamically Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 10/28] x86/fpu/xstate: Define the scope of the initial xstate data Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 11/28] x86/fpu/xstate: Update the xstate save function to support dynamic states Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 12/28] x86/fpu/xstate: Update the xstate buffer address finder " Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 13/28] x86/fpu/xstate: Update the xstate context copy function " Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 14/28] x86/fpu/xstate: Prevent unauthorised use of dynamic user state Chang S. Bae
2021-06-16 16:17 ` Dave Hansen
2021-06-16 16:27 ` Dave Hansen
2021-06-16 18:12 ` Andy Lutomirski
2021-06-16 18:47 ` Bae, Chang Seok
2021-06-16 19:01 ` Dave Hansen
2021-06-16 19:23 ` Bae, Chang Seok
2021-06-16 19:28 ` Dave Hansen
2021-06-16 19:37 ` Bae, Chang Seok
2021-06-28 10:11 ` Liu, Jing2
2021-06-29 17:43 ` Bae, Chang Seok
2021-06-29 17:54 ` Dave Hansen
2021-06-29 18:35 ` Bae, Chang Seok
2021-06-29 18:50 ` Dave Hansen
2021-06-29 19:13 ` Bae, Chang Seok
2021-06-29 19:26 ` Dave Hansen
2021-05-23 19:32 ` [PATCH v5 15/28] x86/arch_prctl: Create ARCH_GET_XSTATE/ARCH_PUT_XSTATE Chang S. Bae
2021-05-24 23:10 ` Len Brown
2021-05-25 17:27 ` Borislav Petkov
2021-05-25 17:33 ` Dave Hansen
2021-05-26 0:38 ` Len Brown
2021-05-27 11:14 ` second, sync-alloc syscall Borislav Petkov
2021-05-27 13:59 ` Len Brown
2021-05-27 19:35 ` Andy Lutomirski
2021-05-25 15:46 ` [PATCH v5 15/28] x86/arch_prctl: Create ARCH_GET_XSTATE/ARCH_PUT_XSTATE Dave Hansen
2021-05-23 19:32 ` [PATCH v5 16/28] x86/fpu/xstate: Support ptracer-induced xstate buffer expansion Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 17/28] x86/fpu/xstate: Adjust the XSAVE feature table to address gaps in state component numbers Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 18/28] x86/fpu/xstate: Disable xstate support if an inconsistent state is detected Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 19/28] x86/cpufeatures/amx: Enumerate Advanced Matrix Extension (AMX) feature bits Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 20/28] x86/fpu/amx: Define AMX state components and have it used for boot-time checks Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 21/28] x86/fpu/amx: Initialize child's AMX state Chang S. Bae
2021-05-24 3:09 ` Andy Lutomirski
2021-05-24 17:37 ` Len Brown
2021-05-24 18:13 ` Andy Lutomirski
2021-05-24 18:21 ` Len Brown
2021-05-25 3:44 ` Andy Lutomirski
2021-05-23 19:32 ` [PATCH v5 22/28] x86/fpu/amx: Enable the AMX feature in 64-bit mode Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 23/28] selftest/x86/amx: Test cases for the AMX state management Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 24/28] x86/fpu/xstate: Use per-task xstate mask for saving xstate in signal frame Chang S. Bae
2021-05-24 3:15 ` Andy Lutomirski
2021-05-24 18:06 ` Len Brown
2021-05-25 4:47 ` Andy Lutomirski
2021-05-25 14:04 ` Len Brown [this message]
2021-05-23 19:32 ` [PATCH v5 25/28] x86/fpu/xstate: Skip writing zeros to signal frame for dynamic user states if in INIT-state Chang S. Bae
2021-05-24 3:25 ` Andy Lutomirski
2021-05-24 18:15 ` Len Brown
2021-05-24 18:29 ` Dave Hansen
2021-05-25 4:46 ` Andy Lutomirski
2021-05-23 19:32 ` [PATCH v5 26/28] selftest/x86/amx: Test case for AMX state copy optimization in signal delivery Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 27/28] x86/insn/amx: Add TILERELEASE instruction to the opcode map Chang S. Bae
2021-05-23 19:32 ` [PATCH v5 28/28] x86/fpu/amx: Clear the AMX state when appropriate Chang S. Bae
2021-05-24 3:13 ` Andy Lutomirski
2021-05-24 14:10 ` Dave Hansen
2021-05-24 17:32 ` Len Brown
2021-05-24 17:39 ` Dave Hansen
2021-05-24 18:24 ` Len Brown
2021-05-27 11:56 ` Peter Zijlstra
2021-05-27 14:02 ` Len Brown
2021-05-24 14:06 ` Dave Hansen
2021-05-24 17:34 ` Len Brown
2021-05-24 21:11 ` [PATCH v5-fix " Chang S. Bae
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