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* [Question] reset controlling
@ 2016-04-16 17:49 Masahiro Yamada
  2016-04-16 19:23 ` Arnd Bergmann
  0 siblings, 1 reply; 4+ messages in thread
From: Masahiro Yamada @ 2016-04-16 17:49 UTC (permalink / raw)
  To: linux-clk, Linux Kernel Mailing List
  Cc: linux-arm-kernel, Arnd Bergmann, Olof Johansson, Philipp Zabel,
	Stephen Boyd, devicetree

Hi.


I have wondered how to handle reset signals for my SoCs.



I notice reset controllers are less supported in Linux than clock controllers.



I grepped "clk_register" and "reset_controller_register".

I know this does not give us the precise number of
clk/reset providers, but I think it is enough for a rough estimate.

masahiro@grover:~/workspace/linux$ git grep clk_register | wc
   3520   18014  308516
masahiro@grover:~/workspace/linux$ git grep reset_controller_register | wc
     31     107    2462


Looks like we support 100 times as many clock providers as
reset providers.

In other words, 99% of SoCs support clock controllers,
but not reset controllers.

But, I think most of hardware blocks
have reset signals as well as clocks.
At least, it is true on my SoCs.


Similar tendency for consumers.

I grepped "clk_get" and "reset_control_get".


masahiro@grover:~/workspace/linux$ git grep clk_get | wc
   3362   16486  256820
masahiro@grover:~/workspace/linux$ git grep reset_control_get | wc
    142     732   12481


Most of drivers support controlling clock signals,
but do not care about reset signals.



So, how can we explain this fact?

What are recommended strategies for reset signals?

I came up with some options as follows:


[1] Reset signals should be de-asserted in a firmware (boot-loader)
    for all the hardware blocks.  Linux kernel need not touch them at all.

[2] We should really make effort to support more reset drivers,
    like we do for clock drivers.

[3] We can (ab)use clock-gate drivers for controlling reset signals.



At first, I chose [3] for my SoCs
with the analogy clk_enable/clk_disable to
reset_control_deassert/reset_control_assert.
(and also because the reset sub-system does not support tree-topology
or enable-count.)

Reset signals are sometimes cascaded.
For example, the UART blocks on my SoCs have a reset for the whole of
UART blocks
besides per-channel reset signals.

                     |---(UART ch0 reset)---> UART0
                     |
----(UART reset)-----|---(UART ch1 reset)---> UART1
                     |
                     |---(UART ch2 reset)---> UART2

I found this works well with clk-gate drivers.
Even reset_control_reset() can be implemented
with clk_disable() followed by clk_enable().



Having said that, I hesitate to distort my device trees.

In order to make a reset signal look like a clock,
we need to describe DT as follows

clkrstctrl: clkrstctrl {
        compatible = "foo-clock-and-reset-controller";
        #clock-cells = <1>;
}

uart {
         clock-names = "clock", "reset";
         clocks = <&clkctrl 0>, <&rstctrl 0>;
}


instead of


clkctrl: clkctrl {
        compatible = "foo-clock-controller";
        #clock-cells = <1>;
}

rstctrl: rstctrl {
        compatible = "foo-reset-controller";
        #reset-cells = <1>;
}

uart {
         clocks = <&clkctrl 0>;
         resets = <&rstctrl 0>;
}



The first DT fragment seems weird if we consider the concept of device tree;
as a hardware description language, DT should reflect the hardware
representation.  Clocks and resets are different things.
So, DT should not be compromised by the fact that reset driver support
is poor in Linux.




Next, I thought about [2].
It should not be so hard to implement a reset provider.

But, as I mentioned above, most of drivers handle clocks,
but not resets.

Is it worthwhile to patch drivers around
with reset_control_get_optional()?
Hmm...




[1] would be the easiest and I think makes sense to some extent
because controlling clock signals seems enough from the
power-management perspective.



Any idea?



-- 
Best Regards
Masahiro Yamada

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Question] reset controlling
  2016-04-16 17:49 [Question] reset controlling Masahiro Yamada
@ 2016-04-16 19:23 ` Arnd Bergmann
  2016-04-17  8:16   ` Masahiro Yamada
  0 siblings, 1 reply; 4+ messages in thread
From: Arnd Bergmann @ 2016-04-16 19:23 UTC (permalink / raw)
  To: Masahiro Yamada
  Cc: linux-clk, Linux Kernel Mailing List, linux-arm-kernel,
	Olof Johansson, Philipp Zabel, Stephen Boyd, devicetree

On Sunday 17 April 2016 02:49:40 Masahiro Yamada wrote:
> 
> I grepped "clk_register" and "reset_controller_register".
> 
> I know this does not give us the precise number of
> clk/reset providers, but I think it is enough for a rough estimate.
> 
> masahiro@grover:~/workspace/linux$ git grep clk_register | wc
>    3520   18014  308516
> masahiro@grover:~/workspace/linux$ git grep reset_controller_register | wc
>      31     107    2462
>
> 
> Looks like we support 100 times as many clock providers as
> reset providers.

Better count the files:

$ git grep -wl clk_register | wc -l
179

$ git grep -wl reset_controller_register | wc -l
25

This is more like seven times as many, which seems about right.

> In other words, 99% of SoCs support clock controllers,
> but not reset controllers.
> 
> But, I think most of hardware blocks
> have reset signals as well as clocks.
> At least, it is true on my SoCs.

I think a lot of SoCs don't expose the reset signals to software,
but it also has something to with the history: the reset subsystem
is relatively new, so even on older chips that do require them,
the code to drive the resets may be either in the bootloader or
using local hacks in the device driver rather than going through
a proper subsystem.

> What are recommended strategies for reset signals?
> 
> I came up with some options as follows:
> 
> 
> [1] Reset signals should be de-asserted in a firmware (boot-loader)
>     for all the hardware blocks.  Linux kernel need not touch them at all.
> 
> [2] We should really make effort to support more reset drivers,
>     like we do for clock drivers.
> 
> [3] We can (ab)use clock-gate drivers for controlling reset signals.

I don't see it as a serious problem: new chips that have reset controllers
should generally use them, but for older chips there is not as much to
gain by converting the existing code.

[1] is generally ok if you can trust the bootloader to get it right
and there is no difference to power management. In many cases the folks
that work on the kernel however have no control over the bootloader,
and the loaders that ship with devices often get this wrong.

[2] is probably the normal way to do it, and I'd recommend against [3].

> At first, I chose [3] for my SoCs
> with the analogy clk_enable/clk_disable to
> reset_control_deassert/reset_control_assert.
> (and also because the reset sub-system does not support tree-topology
> or enable-count.)
> 
> Reset signals are sometimes cascaded.
> For example, the UART blocks on my SoCs have a reset for the whole of
> UART blocks
> besides per-channel reset signals.
> 
>                      |---(UART ch0 reset)---> UART0
>                      |
> ----(UART reset)-----|---(UART ch1 reset)---> UART1
>                      |
>                      |---(UART ch2 reset)---> UART2
> 
> I found this works well with clk-gate drivers.
> Even reset_control_reset() can be implemented
> with clk_disable() followed by clk_enable().
> 

Interesting. My feeling from your description is that this is something
that should be added to the reset controller subsystem. It has probably
not been a serious issue for anyone else, but it's also likely that you
are not the only one that would benefit from having support for nested
resets in the API.
> 
> Next, I thought about [2].
> It should not be so hard to implement a reset provider.
> 
> But, as I mentioned above, most of drivers handle clocks,
> but not resets.
> 
> Is it worthwhile to patch drivers around
> with reset_control_get_optional()?
> Hmm...

I think it is. All of the 'generic' drivers for devices that are
licensed from e.g. designware or ARM will sooner or later get it,
and devices that are vendor specific are even easier to change
as needed.

	Arnd

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Question] reset controlling
  2016-04-16 19:23 ` Arnd Bergmann
@ 2016-04-17  8:16   ` Masahiro Yamada
  2016-04-18 15:13     ` Arnd Bergmann
  0 siblings, 1 reply; 4+ messages in thread
From: Masahiro Yamada @ 2016-04-17  8:16 UTC (permalink / raw)
  To: Arnd Bergmann
  Cc: linux-clk, Linux Kernel Mailing List, linux-arm-kernel,
	Olof Johansson, Philipp Zabel, Stephen Boyd, devicetree

Hi Arnd.

2016-04-17 4:23 GMT+09:00 Arnd Bergmann <arnd@arndb.de>:

> Better count the files:
>
> $ git grep -wl clk_register | wc -l
> 179
>
> $ git grep -wl reset_controller_register | wc -l
> 25
>
> This is more like seven times as many, which seems about right.

Ah, right.  I exaggerated too much.



>> Reset signals are sometimes cascaded.
>> For example, the UART blocks on my SoCs have a reset for the whole of
>> UART blocks
>> besides per-channel reset signals.
>>
>>                      |---(UART ch0 reset)---> UART0
>>                      |
>> ----(UART reset)-----|---(UART ch1 reset)---> UART1
>>                      |
>>                      |---(UART ch2 reset)---> UART2
>>
>> I found this works well with clk-gate drivers.
>> Even reset_control_reset() can be implemented
>> with clk_disable() followed by clk_enable().
>>
>
> Interesting. My feeling from your description is that this is something
> that should be added to the reset controller subsystem. It has probably
> not been a serious issue for anyone else, but it's also likely that you
> are not the only one that would benefit from having support for nested
> resets in the API.

I want reset sub-system to support (1) nesting,  (2) enable_count.

To get these two features supported, the reset frame-work
would be similar implementation to the clock subsystem.
(In other words, we would duplicate effort
between clock and reset.)

Moreover, it is very common to control resets and clocks
from one hardware block.

So, I am looking for some idea that perhaps can unify the clock
and reset subsystems.


I found some SoCs implement reset drivers in drivers/clk.


masahiro@grover:~/workspace/linux/drivers/clk$ git grep
reset_controller_register
mediatek/reset.c:       ret = reset_controller_register(&data->rcdev);
mmp/reset.c:    reset_controller_register(&unit->rcdev);
qcom/common.c:  ret = reset_controller_register(&reset->rcdev);
rockchip/softrst.c:     ret = reset_controller_register(&softrst->rcdev);
sirf/clk-atlas7.c:      reset_controller_register(&atlas7_rst_ctlr);
sunxi/clk-a10-ve.c:     err = reset_controller_register(&reset_data->rcdev);
sunxi/clk-sun9i-mmc.c:  ret = reset_controller_register(&data->rcdev);
sunxi/clk-usb.c:        reset_controller_register(&reset_data->rcdev);
tegra/clk.c:    reset_controller_register(&rst_ctlr);


I asked about this in the following thread.
https://lkml.org/lkml/2015/11/10/724



>> Next, I thought about [2].
>> It should not be so hard to implement a reset provider.
>>
>> But, as I mentioned above, most of drivers handle clocks,
>> but not resets.
>>
>> Is it worthwhile to patch drivers around
>> with reset_control_get_optional()?
>> Hmm...
>
> I think it is. All of the 'generic' drivers for devices that are
> licensed from e.g. designware or ARM will sooner or later get it,
> and devices that are vendor specific are even easier to change
> as needed.

We can do that if needed.

I guess most of drivers would do similar things;
call devm_reset_control_get() && reset_control_deassert() in their
probe methods,
and reset_control_assert() in their remove methods.

I am wondering if we can do that somewhat automatically,
like the driver model framework automatically sets the pinctrl state
to "default"
(and low-level drivers are still able to change pinctrl state for the case
where multiple pinctrl states are supported.)


Another idea might be,
we can support "hogging" in DT just for de-asserting reset signals,


reset_ctrl: reset_ctrl {
        .compatible = "foo-reset-controller";
         #reset-cells = <1>;

         uart_deassert {   /* deassert UART reset automatically */
                reset-hog;
                resets = <0>;   /* index for UART reset line */
                deassert;
         };

         i2c_deassert {   /* deassert I2C reset automatically */
                reset-hog;
                resets = <1>;   /* index for I2C reset line */
                deassert;
         };
};


-- 
Best Regards
Masahiro Yamada

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Question] reset controlling
  2016-04-17  8:16   ` Masahiro Yamada
@ 2016-04-18 15:13     ` Arnd Bergmann
  0 siblings, 0 replies; 4+ messages in thread
From: Arnd Bergmann @ 2016-04-18 15:13 UTC (permalink / raw)
  To: Masahiro Yamada
  Cc: linux-clk, Linux Kernel Mailing List, linux-arm-kernel,
	Olof Johansson, Philipp Zabel, Stephen Boyd, devicetree

On Sunday 17 April 2016 17:16:58 Masahiro Yamada wrote:
> 2016-04-17 4:23 GMT+09:00 Arnd Bergmann <arnd@arndb.de>:
> >> Reset signals are sometimes cascaded.
> >> For example, the UART blocks on my SoCs have a reset for the whole of
> >> UART blocks
> >> besides per-channel reset signals.
> >>
> >>                      |---(UART ch0 reset)---> UART0
> >>                      |
> >> ----(UART reset)-----|---(UART ch1 reset)---> UART1
> >>                      |
> >>                      |---(UART ch2 reset)---> UART2
> >>
> >> I found this works well with clk-gate drivers.
> >> Even reset_control_reset() can be implemented
> >> with clk_disable() followed by clk_enable().
> >>
> >
> > Interesting. My feeling from your description is that this is something
> > that should be added to the reset controller subsystem. It has probably
> > not been a serious issue for anyone else, but it's also likely that you
> > are not the only one that would benefit from having support for nested
> > resets in the API.
> 
> I want reset sub-system to support (1) nesting,  (2) enable_count.
> 
> To get these two features supported, the reset frame-work
> would be similar implementation to the clock subsystem.
> (In other words, we would duplicate effort
> between clock and reset.)
> 
> Moreover, it is very common to control resets and clocks
> from one hardware block.
> 
> So, I am looking for some idea that perhaps can unify the clock
> and reset subsystems.

If you find parts of the code that could be shared, we can probably
split those out into a file in lib/*.c and have that used by both
subsystems and potentially others as well.

> I found some SoCs implement reset drivers in drivers/clk.
> 
> 
> masahiro@grover:~/workspace/linux/drivers/clk$ git grep
> reset_controller_register
> mediatek/reset.c:       ret = reset_controller_register(&data->rcdev);
> mmp/reset.c:    reset_controller_register(&unit->rcdev);
> qcom/common.c:  ret = reset_controller_register(&reset->rcdev);
> rockchip/softrst.c:     ret = reset_controller_register(&softrst->rcdev);
> sirf/clk-atlas7.c:      reset_controller_register(&atlas7_rst_ctlr);
> sunxi/clk-a10-ve.c:     err = reset_controller_register(&reset_data->rcdev);
> sunxi/clk-sun9i-mmc.c:  ret = reset_controller_register(&data->rcdev);
> sunxi/clk-usb.c:        reset_controller_register(&reset_data->rcdev);
> tegra/clk.c:    reset_controller_register(&rst_ctlr);

I think these are all the ones that have a shared hardware block doing
both clocks and resets. My guess is that most other hardware does it
differently.

> I asked about this in the following thread.
> https://lkml.org/lkml/2015/11/10/724

Your hardware seems to be in a third category, which is not uncommon
either: you have clocks, resets and additional registers all in a
single block without a structure around them.

You can handle this with purely syscon based abstraction, or you
can have a driver for the combined device that registers itself
to multiple subsystems in addition to being a syscon.

	Arnd

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-04-18 15:14 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-04-16 17:49 [Question] reset controlling Masahiro Yamada
2016-04-16 19:23 ` Arnd Bergmann
2016-04-17  8:16   ` Masahiro Yamada
2016-04-18 15:13     ` Arnd Bergmann

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