From: Arnd Bergmann <arnd@arndb.de>
To: "Hawkins, Nick" <nick.hawkins@hpe.com>
Cc: "Verdun, Jean-Marie" <verdun@hpe.com>,
nick@hpe.com, Joel Stanley <joel@jms.id.au>,
Arnd Bergmann <arnd@arndb.de>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Olof Johansson <olof@lixom.net>, SoC Team <soc@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
DTML <devicetree@vger.kernel.org>
Subject: Re: [PATCH v6 7/8] ARM: dts: Introduce HPE GXP Device tree
Date: Tue, 3 May 2022 12:45:47 +0200 [thread overview]
Message-ID: <CAK8P3a2rzmVrpnf2r73iXB=T06OMOsgwyq1i8z7swuOW-q88eQ@mail.gmail.com> (raw)
In-Reply-To: <20220502204050.88316-7-nick.hawkins@hpe.com>
On Mon, May 2, 2022 at 10:40 PM <nick.hawkins@hpe.com> wrote:
> --- /dev/null
> +++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
> @@ -0,0 +1,13 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree file for HPE DL360Gen10
> + */
> +
> +/include/ "hpe-gxp.dtsi"
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "hpe,gxp-dl360gen10","hpe,gxp";
> + model = "Hewlett Packard Enterprise ProLiant dl360 Gen10";
> +};
In the board specific file, you normally have "aliases", "chosen" and "memory"
nodes that define e.g. which uart is used for the console.
> diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
> new file mode 100644
> index 000000000000..7a99e174e4b3
> --- /dev/null
> +++ b/arch/arm/boot/dts/hpe-gxp.dtsi
> @@ -0,0 +1,132 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree file for HPE GXP
> + */
> +
> +/dts-v1/;
> +/ {
> + model = "Hewlett Packard Enterprise GXP BMC";
> + compatible = "hpe,gxp", "hpe,gxp-dl360gen10";
I think "hpe,gxp-dl360gen10" is misplaced here, if that is the identifier
of a particular machine rather than the SoC.
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0x40000000 0x20000000>;
> + };
If the memory is outside of the SoC, it should not be here.
> + axi {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + dma-ranges;
> +
> + L2: cache-controller@b0040000 {
> + compatible = "arm,pl310-cache";
> + reg = <0xb0040000 0xFFC>;
> + cache-unified;
> + cache-level = <2>;
> + };
The length of the register area looks wrong, this is usually the full
4KB area, rather than leaving out the last four bytes.
Arnd
next prev parent reply other threads:[~2022-05-03 10:46 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-02 20:40 [PATCH v6 1/8] ARM: hpe: Introduce the HPE GXP architecture nick.hawkins
2022-05-02 20:40 ` [PATCH v6 2/8] ARM: configs: multi_v7_defconfig: Add HPE GXP ARCH nick.hawkins
2022-05-02 20:40 ` [PATCH v6 3/8] watchdog: hpe-wdt: Introduce HPE GXP Watchdog nick.hawkins
2022-05-03 2:19 ` Guenter Roeck
2022-05-03 16:22 ` Hawkins, Nick
2022-05-03 16:53 ` Guenter Roeck
2022-05-03 18:51 ` Arnd Bergmann
2022-05-04 16:25 ` Hawkins, Nick
2022-05-05 21:29 ` Guenter Roeck
2022-05-02 20:40 ` [PATCH v6 4/8] clocksource/drivers/timer-gxp: Add HPE GXP Timer nick.hawkins
2022-05-03 10:34 ` Arnd Bergmann
2022-05-02 20:40 ` [PATCH v6 5/8] dt-bindings: timer: hpe,gxp-timer: Creation nick.hawkins
2022-05-03 9:58 ` Krzysztof Kozlowski
2022-05-03 17:39 ` Rob Herring
2022-05-02 20:40 ` [PATCH v6 6/8] dt-bindings: arm: hpe: add GXP Support nick.hawkins
2022-05-03 9:59 ` Krzysztof Kozlowski
2022-05-03 17:40 ` Rob Herring
2022-05-02 20:40 ` [PATCH v6 7/8] ARM: dts: Introduce HPE GXP Device tree nick.hawkins
2022-05-03 10:00 ` Krzysztof Kozlowski
2022-05-03 14:08 ` Hawkins, Nick
2022-05-03 10:45 ` Arnd Bergmann [this message]
2022-05-03 15:07 ` Hawkins, Nick
2022-05-03 18:19 ` Arnd Bergmann
2022-05-02 20:40 ` [PATCH v6 8/8] MAINTAINERS: Introduce HPE GXP Architecture nick.hawkins
2022-05-03 10:05 ` Krzysztof Kozlowski
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