From: DENG Qingfang <dqfext@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "Marc Zyngier" <maz@kernel.org>,
"David S. Miller" <davem@davemloft.net>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Landen Chao" <Landen.Chao@mediatek.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Russell King" <linux@armlinux.org.uk>,
"Sean Wang" <sean.wang@mediatek.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Vivien Didelot" <vivien.didelot@gmail.com>,
"Vladimir Oltean" <olteanv@gmail.com>,
linux-kernel@vger.kernel.org, netdev <netdev@vger.kernel.org>,
"Weijie Gao" <weijie.gao@mediatek.com>,
"Chuanhong Guo" <gch981213@gmail.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"René van Dorst" <opensource@vdorst.com>
Subject: Re: Registering IRQ for MT7530 internal PHYs
Date: Wed, 6 Jan 2021 16:54:36 +0800 [thread overview]
Message-ID: <CALW65ja33=+7TGQMYdr=Wztwy_simszSwO6saMvvSeqX3qWGxA@mail.gmail.com> (raw)
In-Reply-To: <X+ybeg4dvR5Vq8LY@lunn.ch>
Hi Andrew,
On Wed, Dec 30, 2020 at 11:23 PM Andrew Lunn <andrew@lunn.ch> wrote:
>
> On Wed, Dec 30, 2020 at 09:42:09AM +0000, Marc Zyngier wrote:
> > > +static irqreturn_t
> > > +mt7530_irq(int irq, void *data)
> > > +{
> > > + struct mt7530_priv *priv = data;
> > > + bool handled = false;
> > > + int phy;
> > > + u32 val;
> > > +
> > > + val = mt7530_read(priv, MT7530_SYS_INT_STS);
> > > + mt7530_write(priv, MT7530_SYS_INT_STS, val);
> >
> > If that is an ack operation, it should be dealt with as such in
> > an irqchip callback instead of being open-coded here.
>
> Hi Qingfang
>
> Does the PHY itself have interrupt control and status registers?
MT7531's internal PHY has an interrupt status register, but I don't
know if the same applies to MT7530.
>
> My experience with the Marvell Switch and its embedded PHYs is that
> the PHYs are just the same as the discrete PHYs. There are bits to
> enable different interrupts, and there are status bits indicating what
> event caused the interrupt. Clearing the interrupt in the PHY clears
> the interrupt in the switch interrupt controller. So in the mv88e6xxx
> interrupt code, you see i do a read of the switch interrupt controller
> status register, but i don't write to it as you have done.
>
> Andrew
next prev parent reply other threads:[~2021-01-06 8:55 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-30 4:22 Registering IRQ for MT7530 internal PHYs DENG Qingfang
2020-12-30 7:39 ` Heiner Kallweit
2020-12-30 9:07 ` DENG Qingfang
2020-12-30 9:12 ` Heiner Kallweit
2020-12-30 16:15 ` Florian Fainelli
2020-12-30 16:53 ` Heiner Kallweit
2020-12-30 9:42 ` Marc Zyngier
2020-12-30 15:11 ` Andrew Lunn
2020-12-30 15:23 ` Andrew Lunn
2021-01-06 8:54 ` DENG Qingfang [this message]
2021-01-18 13:27 ` Landen Chao
2020-12-30 15:16 ` Andrew Lunn
2020-12-30 16:17 ` Florian Fainelli
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