* [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru
@ 2020-07-03 15:49 Heiko Stuebner
2020-07-03 18:33 ` Ezequiel Garcia
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Heiko Stuebner @ 2020-07-03 15:49 UTC (permalink / raw)
To: linux-rockchip
Cc: mylene.josserand, mturquette, sboyd, jagan, linux-kernel, heiko,
ezequiel, linux-clk, Heiko Stuebner
From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Commit 1627f683636d ("clk: rockchip: Handle clock tree for rk3288w variant")
added the check for rk3288w-specific clock-tree changes but in turn would
require a double-compatible due to re-using the main rockchip,rk3288-cru
compatible as entry point.
The binding change actually describes the compatibles as one or the other
so adapt the code accordingly and add a real second entry-point for the
clock controller.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
---
changes in v2:
- type enum instead of boolean (Ezequiel)
drivers/clk/rockchip/clk-rk3288.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 204976e2d0cb..93c794695c46 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -15,6 +15,11 @@
#define RK3288_GRF_SOC_CON(x) (0x244 + x * 4)
#define RK3288_GRF_SOC_STATUS1 0x284
+enum rk3288_variant {
+ RK3288_CRU,
+ RK3288W_CRU,
+};
+
enum rk3288_plls {
apll, dpll, cpll, gpll, npll,
};
@@ -922,7 +927,8 @@ static struct syscore_ops rk3288_clk_syscore_ops = {
.resume = rk3288_clk_resume,
};
-static void __init rk3288_clk_init(struct device_node *np)
+static void __init rk3288_common_init(struct device_node *np,
+ enum rk3288_variant soc)
{
struct rockchip_clk_provider *ctx;
@@ -945,7 +951,7 @@ static void __init rk3288_clk_init(struct device_node *np)
rockchip_clk_register_branches(ctx, rk3288_clk_branches,
ARRAY_SIZE(rk3288_clk_branches));
- if (of_device_is_compatible(np, "rockchip,rk3288w-cru"))
+ if (soc == RK3288W_CRU)
rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch,
ARRAY_SIZE(rk3288w_hclkvio_branch));
else
@@ -970,4 +976,15 @@ static void __init rk3288_clk_init(struct device_node *np)
rockchip_clk_of_add_provider(np, ctx);
}
+
+static void __init rk3288_clk_init(struct device_node *np)
+{
+ rk3288_common_init(np, RK3288_CRU);
+}
CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);
+
+static void __init rk3288w_clk_init(struct device_node *np)
+{
+ rk3288_common_init(np, RK3288W_CRU);
+}
+CLK_OF_DECLARE(rk3288w_cru, "rockchip,rk3288w-cru", rk3288w_clk_init);
--
2.26.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru
2020-07-03 15:49 [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru Heiko Stuebner
@ 2020-07-03 18:33 ` Ezequiel Garcia
2020-07-04 9:17 ` Jagan Teki
2020-07-05 10:18 ` Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Ezequiel Garcia @ 2020-07-03 18:33 UTC (permalink / raw)
To: Heiko Stuebner, linux-rockchip
Cc: mylene.josserand, mturquette, sboyd, jagan, linux-kernel,
linux-clk, Heiko Stuebner
On Fri, 2020-07-03 at 17:49 +0200, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
>
> Commit 1627f683636d ("clk: rockchip: Handle clock tree for rk3288w variant")
> added the check for rk3288w-specific clock-tree changes but in turn would
> require a double-compatible due to re-using the main rockchip,rk3288-cru
> compatible as entry point.
>
> The binding change actually describes the compatibles as one or the other
> so adapt the code accordingly and add a real second entry-point for the
> clock controller.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Now all we need is someone to wire the U-Boot bits :)
Thanks a lot Heiko,
Ezequiel
> ---
> changes in v2:
> - type enum instead of boolean (Ezequiel)
>
> drivers/clk/rockchip/clk-rk3288.c | 21 +++++++++++++++++++--
> 1 file changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
> index 204976e2d0cb..93c794695c46 100644
> --- a/drivers/clk/rockchip/clk-rk3288.c
> +++ b/drivers/clk/rockchip/clk-rk3288.c
> @@ -15,6 +15,11 @@
> #define RK3288_GRF_SOC_CON(x) (0x244 + x * 4)
> #define RK3288_GRF_SOC_STATUS1 0x284
>
> +enum rk3288_variant {
> + RK3288_CRU,
> + RK3288W_CRU,
> +};
> +
> enum rk3288_plls {
> apll, dpll, cpll, gpll, npll,
> };
> @@ -922,7 +927,8 @@ static struct syscore_ops rk3288_clk_syscore_ops = {
> .resume = rk3288_clk_resume,
> };
>
> -static void __init rk3288_clk_init(struct device_node *np)
> +static void __init rk3288_common_init(struct device_node *np,
> + enum rk3288_variant soc)
> {
> struct rockchip_clk_provider *ctx;
>
> @@ -945,7 +951,7 @@ static void __init rk3288_clk_init(struct device_node *np)
> rockchip_clk_register_branches(ctx, rk3288_clk_branches,
> ARRAY_SIZE(rk3288_clk_branches));
>
> - if (of_device_is_compatible(np, "rockchip,rk3288w-cru"))
> + if (soc == RK3288W_CRU)
> rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch,
> ARRAY_SIZE(rk3288w_hclkvio_branch));
> else
> @@ -970,4 +976,15 @@ static void __init rk3288_clk_init(struct device_node *np)
>
> rockchip_clk_of_add_provider(np, ctx);
> }
> +
> +static void __init rk3288_clk_init(struct device_node *np)
> +{
> + rk3288_common_init(np, RK3288_CRU);
> +}
> CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);
> +
> +static void __init rk3288w_clk_init(struct device_node *np)
> +{
> + rk3288_common_init(np, RK3288W_CRU);
> +}
> +CLK_OF_DECLARE(rk3288w_cru, "rockchip,rk3288w-cru", rk3288w_clk_init);
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru
2020-07-03 15:49 [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru Heiko Stuebner
2020-07-03 18:33 ` Ezequiel Garcia
@ 2020-07-04 9:17 ` Jagan Teki
2020-07-05 10:18 ` Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Jagan Teki @ 2020-07-04 9:17 UTC (permalink / raw)
To: Heiko Stuebner
Cc: open list:ARM/Rockchip SoC...,
Mylène Josserand, Michael Turquette, Stephen Boyd,
linux-kernel, Ezequiel Garcia, linux-clk, Heiko Stuebner
On Fri, Jul 3, 2020 at 9:19 PM Heiko Stuebner <heiko@sntech.de> wrote:
>
> From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
>
> Commit 1627f683636d ("clk: rockchip: Handle clock tree for rk3288w variant")
> added the check for rk3288w-specific clock-tree changes but in turn would
> require a double-compatible due to re-using the main rockchip,rk3288-cru
> compatible as entry point.
>
> The binding change actually describes the compatibles as one or the other
> so adapt the code accordingly and add a real second entry-point for the
> clock controller.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
> ---
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rock-pi-n8
Note: These are U-Boot changes,
https://patchwork.ozlabs.org/project/uboot/list/?series=187546
Jagan.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru
2020-07-03 15:49 [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru Heiko Stuebner
2020-07-03 18:33 ` Ezequiel Garcia
2020-07-04 9:17 ` Jagan Teki
@ 2020-07-05 10:18 ` Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Heiko Stuebner @ 2020-07-05 10:18 UTC (permalink / raw)
To: Heiko Stuebner, linux-rockchip
Cc: ezequiel, mturquette, Heiko Stuebner, linux-clk, jagan,
mylene.josserand, linux-kernel, sboyd
On Fri, 3 Jul 2020 17:49:48 +0200, Heiko Stuebner wrote:
> Commit 1627f683636d ("clk: rockchip: Handle clock tree for rk3288w variant")
> added the check for rk3288w-specific clock-tree changes but in turn would
> require a double-compatible due to re-using the main rockchip,rk3288-cru
> compatible as entry point.
>
> The binding change actually describes the compatibles as one or the other
> so adapt the code accordingly and add a real second entry-point for the
> clock controller.
Applied, thanks!
[1/1] clk: rockchip: use separate compatibles for rk3288w-cru
commit: 0a7f99aad259d223ce69c03e792c7e2bfcf8c2c6
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2020-07-05 10:18 ` Heiko Stuebner
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