* [v2 0/2] Add BOE tv101wum-nl6 panel driver @ 2019-06-24 6:03 Jitao Shi 2019-06-24 6:03 ` [v2 1/2] dt-bindngs: display: panel: Add BOE tv101wum-n16 panel bindings Jitao Shi 2019-06-24 6:03 ` [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel Jitao Shi 0 siblings, 2 replies; 6+ messages in thread From: Jitao Shi @ 2019-06-24 6:03 UTC (permalink / raw) To: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, linux-pwm, David Airlie, Matthias Brugger Cc: Jitao Shi, Thierry Reding, Ajay Kumar, Inki Dae, Rahul Sharma, Sean Paul, Vincent Palatin, Andy Yan, Philipp Zabel, Russell King, devicetree, linux-kernel, dri-devel, linux-arm-kernel, linux-mediatek, srv_heupstream, Sascha Hauer, yingjoe.chen, eddie.huang, cawa.cheng, bibby.hsieh, ck.hu, stonea168 Changes since v1: - update typo nl6 -> n16. - update new panel config and makefile are added in alphabetically order. - add the panel mode and panel info in driver data. Jitao Shi (2): dt-bindngs: display: panel: Add BOE tv101wum-n16 panel bindings drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel .../display/panel/boe,tv101wum-nl6.txt | 34 + drivers/gpu/drm/panel/Kconfig | 10 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 715 ++++++++++++++++++ 4 files changed, 760 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt create mode 100644 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c -- 2.21.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [v2 1/2] dt-bindngs: display: panel: Add BOE tv101wum-n16 panel bindings 2019-06-24 6:03 [v2 0/2] Add BOE tv101wum-nl6 panel driver Jitao Shi @ 2019-06-24 6:03 ` Jitao Shi 2019-06-24 6:03 ` [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel Jitao Shi 1 sibling, 0 replies; 6+ messages in thread From: Jitao Shi @ 2019-06-24 6:03 UTC (permalink / raw) To: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, linux-pwm, David Airlie, Matthias Brugger Cc: Jitao Shi, Thierry Reding, Ajay Kumar, Inki Dae, Rahul Sharma, Sean Paul, Vincent Palatin, Andy Yan, Philipp Zabel, Russell King, devicetree, linux-kernel, dri-devel, linux-arm-kernel, linux-mediatek, srv_heupstream, Sascha Hauer, yingjoe.chen, eddie.huang, cawa.cheng, bibby.hsieh, ck.hu, stonea168 Add documentation for boe tv101wum-n16 panel. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- .../display/panel/boe,tv101wum-nl6.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt new file mode 100644 index 000000000000..bd44af636390 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt @@ -0,0 +1,34 @@ +Boe Corporation 10.1" WUXGA TFT LCD panel + +Required properties: +- compatible: should be "boe,tv101wum-nl6" +- reg: the virtual channel number of a DSI peripheral +- enable-gpios: a GPIO spec for the enable pin +- pp1800-supply: core voltage supply +- avdd-supply: phandle of the regulator that provides positive voltage +- avee-supply: phandle of the regulator that provides negative voltage +- backlight: phandle of the backlight device attached to the panel + +The device node can contain one 'port' child node with one child +'endpoint' node, according to the bindings defined in +media/video-interfaces.txt. This node should describe panel's video bus. + +Example: +&dsi { + ... + panel@0 { + compatible = "boe,tv101wum-nl6"; + reg = <0>; + enable-gpios = <&pio 45 0>; + avdd-supply = <&ppvarn_lcd>; + avee-supply = <&ppvarp_lcd>; + pp1800-supply = <&pp1800_lcd>; + backlight = <&backlight_lcd0>; + status = "okay"; + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; +}; -- 2.21.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel 2019-06-24 6:03 [v2 0/2] Add BOE tv101wum-nl6 panel driver Jitao Shi 2019-06-24 6:03 ` [v2 1/2] dt-bindngs: display: panel: Add BOE tv101wum-n16 panel bindings Jitao Shi @ 2019-06-24 6:03 ` Jitao Shi 2019-06-24 8:25 ` Nicolas Boichat 2019-06-26 3:27 ` Hsin-Yi Wang 1 sibling, 2 replies; 6+ messages in thread From: Jitao Shi @ 2019-06-24 6:03 UTC (permalink / raw) To: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, linux-pwm, David Airlie, Matthias Brugger Cc: Jitao Shi, Thierry Reding, Ajay Kumar, Inki Dae, Rahul Sharma, Sean Paul, Vincent Palatin, Andy Yan, Philipp Zabel, Russell King, devicetree, linux-kernel, dri-devel, linux-arm-kernel, linux-mediatek, srv_heupstream, Sascha Hauer, yingjoe.chen, eddie.huang, cawa.cheng, bibby.hsieh, ck.hu, stonea168 Add driver for BOE tv101wum-nl6 panel is a 10.1" 1200x1920 panel. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/panel/Kconfig | 10 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 715 ++++++++++++++++++ 3 files changed, 726 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index e36dbb4df867..2b055ce0700b 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -17,6 +17,15 @@ config DRM_PANEL_ARM_VERSATILE reference designs. The panel is detected using special registers in the Versatile family syscon registers. +config DRM_PANEL_BOE_TV101WUM_NL6 + tristate "BOE TV101WUM 1200x1920 panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to support for BOE TV101WUM WUXGA PANEL + DSI Video Mode panel + config DRM_PANEL_LVDS tristate "Generic LVDS panel driver" depends on OF @@ -272,4 +281,5 @@ config DRM_PANEL_TRULY_NT35597_WQXGA help Say Y here if you want to enable support for Truly NT35597 WQXGA Dual DSI Video Mode panel + endmenu diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 78e3dc376bdd..8d009223c44e 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o +obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c new file mode 100644 index 000000000000..6e06c8506623 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -0,0 +1,715 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018 MediaTek Inc. + * Author: Jitao Shi <jitao.shi@mediatek.com> + */ + +#include <linux/backlight.h> +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/regulator/consumer.h> + +#include <drm/drm_crtc.h> +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_panel.h> + +#include <video/mipi_display.h> + +struct panel_desc { + const struct drm_display_mode *modes; + unsigned int bpc; + + /** + * @width: width (in millimeters) of the panel's active display area + * @height: height (in millimeters) of the panel's active display area + */ + struct { + unsigned int width; + unsigned int height; + } size; + + unsigned long mode_flags; + enum mipi_dsi_pixel_format format; + const struct panel_init_cmd *init_cmds; + unsigned int lanes; +}; + +struct boe_panel { + struct drm_panel base; + struct mipi_dsi_device *dsi; + + const struct panel_desc *desc; + + struct backlight_device *backlight; + struct regulator *pp1800; + struct regulator *avee; + struct regulator *avdd; + struct gpio_desc *enable_gpio; + + bool prepared; + bool enabled; + + const struct drm_display_mode *mode; +}; + +enum dsi_cmd_type { + INIT_DCS_CMD, + DELAY_CMD, +}; + +struct panel_init_cmd { + enum dsi_cmd_type type; + size_t len; + const char *data; +}; + +#define _INIT_DCS_CMD(...) { \ + .type = INIT_DCS_CMD, \ + .len = sizeof((char[]){__VA_ARGS__}), \ + .data = (char[]){__VA_ARGS__} } + +#define _INIT_DELAY_CMD(...) { \ + .type = DELAY_CMD,\ + .len = sizeof((char[]){__VA_ARGS__}), \ + .data = (char[]){__VA_ARGS__} } + +static const struct panel_init_cmd boe_init_cmd[] = { + _INIT_DELAY_CMD(24), + _INIT_DCS_CMD(0xB0, 0x05), + _INIT_DCS_CMD(0xB1, 0xE5), + _INIT_DCS_CMD(0xB3, 0x52), + _INIT_DCS_CMD(0xB0, 0x00), + _INIT_DCS_CMD(0xB3, 0x88), + _INIT_DCS_CMD(0xB0, 0x04), + _INIT_DCS_CMD(0xB8, 0x00), + _INIT_DCS_CMD(0xB0, 0x00), + _INIT_DCS_CMD(0xB6, 0x03), + _INIT_DCS_CMD(0xBA, 0x8B), + _INIT_DCS_CMD(0xBF, 0x1A), + _INIT_DCS_CMD(0xC0, 0x0F), + _INIT_DCS_CMD(0xC2, 0x0C), + _INIT_DCS_CMD(0xC3, 0x02), + _INIT_DCS_CMD(0xC4, 0x0C), + _INIT_DCS_CMD(0xC5, 0x02), + _INIT_DCS_CMD(0xB0, 0x01), + _INIT_DCS_CMD(0xE0, 0x26), + _INIT_DCS_CMD(0xE1, 0x26), + _INIT_DCS_CMD(0xDC, 0x00), + _INIT_DCS_CMD(0xDD, 0x00), + _INIT_DCS_CMD(0xCC, 0x26), + _INIT_DCS_CMD(0xCD, 0x26), + _INIT_DCS_CMD(0xC8, 0x00), + _INIT_DCS_CMD(0xC9, 0x00), + _INIT_DCS_CMD(0xD2, 0x03), + _INIT_DCS_CMD(0xD3, 0x03), + _INIT_DCS_CMD(0xE6, 0x04), + _INIT_DCS_CMD(0xE7, 0x04), + _INIT_DCS_CMD(0xC4, 0x09), + _INIT_DCS_CMD(0xC5, 0x09), + _INIT_DCS_CMD(0xD8, 0x0A), + _INIT_DCS_CMD(0xD9, 0x0A), + _INIT_DCS_CMD(0xC2, 0x0B), + _INIT_DCS_CMD(0xC3, 0x0B), + _INIT_DCS_CMD(0xD6, 0x0C), + _INIT_DCS_CMD(0xD7, 0x0C), + _INIT_DCS_CMD(0xC0, 0x05), + _INIT_DCS_CMD(0xC1, 0x05), + _INIT_DCS_CMD(0xD4, 0x06), + _INIT_DCS_CMD(0xD5, 0x06), + _INIT_DCS_CMD(0xCA, 0x07), + _INIT_DCS_CMD(0xCB, 0x07), + _INIT_DCS_CMD(0xDE, 0x08), + _INIT_DCS_CMD(0xDF, 0x08), + _INIT_DCS_CMD(0xB0, 0x02), + _INIT_DCS_CMD(0xC0, 0x00), + _INIT_DCS_CMD(0xC1, 0x0D), + _INIT_DCS_CMD(0xC2, 0x17), + _INIT_DCS_CMD(0xC3, 0x26), + _INIT_DCS_CMD(0xC4, 0x31), + _INIT_DCS_CMD(0xC5, 0x1C), + _INIT_DCS_CMD(0xC6, 0x2C), + _INIT_DCS_CMD(0xC7, 0x33), + _INIT_DCS_CMD(0xC8, 0x31), + _INIT_DCS_CMD(0xC9, 0x37), + _INIT_DCS_CMD(0xCA, 0x37), + _INIT_DCS_CMD(0xCB, 0x37), + _INIT_DCS_CMD(0xCC, 0x39), + _INIT_DCS_CMD(0xCD, 0x2E), + _INIT_DCS_CMD(0xCE, 0x2F), + _INIT_DCS_CMD(0xCF, 0x2F), + _INIT_DCS_CMD(0xD0, 0x07), + _INIT_DCS_CMD(0xD2, 0x00), + _INIT_DCS_CMD(0xD3, 0x0D), + _INIT_DCS_CMD(0xD4, 0x17), + _INIT_DCS_CMD(0xD5, 0x26), + _INIT_DCS_CMD(0xD6, 0x31), + _INIT_DCS_CMD(0xD7, 0x3F), + _INIT_DCS_CMD(0xD8, 0x3F), + _INIT_DCS_CMD(0xD9, 0x3F), + _INIT_DCS_CMD(0xDA, 0x3F), + _INIT_DCS_CMD(0xDB, 0x37), + _INIT_DCS_CMD(0xDC, 0x37), + _INIT_DCS_CMD(0xDD, 0x37), + _INIT_DCS_CMD(0xDE, 0x39), + _INIT_DCS_CMD(0xDF, 0x2E), + _INIT_DCS_CMD(0xE0, 0x2F), + _INIT_DCS_CMD(0xE1, 0x2F), + _INIT_DCS_CMD(0xE2, 0x07), + _INIT_DCS_CMD(0xB0, 0x03), + _INIT_DCS_CMD(0xC8, 0x0B), + _INIT_DCS_CMD(0xC9, 0x07), + _INIT_DCS_CMD(0xC3, 0x00), + _INIT_DCS_CMD(0xE7, 0x00), + _INIT_DCS_CMD(0xC5, 0x2A), + _INIT_DCS_CMD(0xDE, 0x2A), + _INIT_DCS_CMD(0xCA, 0x43), + _INIT_DCS_CMD(0xC9, 0x07), + _INIT_DCS_CMD(0xE4, 0xC0), + _INIT_DCS_CMD(0xE5, 0x0D), + _INIT_DCS_CMD(0xCB, 0x00), + _INIT_DCS_CMD(0xB0, 0x06), + _INIT_DCS_CMD(0xB8, 0xA5), + _INIT_DCS_CMD(0xC0, 0xA5), + _INIT_DCS_CMD(0xC7, 0x0F), + _INIT_DCS_CMD(0xD5, 0x32), + _INIT_DCS_CMD(0xB8, 0x00), + _INIT_DCS_CMD(0xC0, 0x00), + _INIT_DCS_CMD(0xBC, 0x00), + _INIT_DCS_CMD(0xB0, 0x07), + _INIT_DCS_CMD(0xB1, 0x00), + _INIT_DCS_CMD(0xB2, 0x02), + _INIT_DCS_CMD(0xB3, 0x0F), + _INIT_DCS_CMD(0xB4, 0x25), + _INIT_DCS_CMD(0xB5, 0x39), + _INIT_DCS_CMD(0xB6, 0x4E), + _INIT_DCS_CMD(0xB7, 0x72), + _INIT_DCS_CMD(0xB8, 0x97), + _INIT_DCS_CMD(0xB9, 0xDC), + _INIT_DCS_CMD(0xBA, 0x22), + _INIT_DCS_CMD(0xBB, 0xA4), + _INIT_DCS_CMD(0xBC, 0x2B), + _INIT_DCS_CMD(0xBD, 0x2F), + _INIT_DCS_CMD(0xBE, 0xA9), + _INIT_DCS_CMD(0xBF, 0x25), + _INIT_DCS_CMD(0xC0, 0x61), + _INIT_DCS_CMD(0xC1, 0x97), + _INIT_DCS_CMD(0xC2, 0xB2), + _INIT_DCS_CMD(0xC3, 0xCD), + _INIT_DCS_CMD(0xC4, 0xD9), + _INIT_DCS_CMD(0xC5, 0xE7), + _INIT_DCS_CMD(0xC6, 0xF4), + _INIT_DCS_CMD(0xC7, 0xFA), + _INIT_DCS_CMD(0xC8, 0xFC), + _INIT_DCS_CMD(0xC9, 0x00), + _INIT_DCS_CMD(0xCA, 0x00), + _INIT_DCS_CMD(0xCB, 0x16), + _INIT_DCS_CMD(0xCC, 0xAF), + _INIT_DCS_CMD(0xCD, 0xFF), + _INIT_DCS_CMD(0xCE, 0xFF), + _INIT_DCS_CMD(0xB0, 0x08), + _INIT_DCS_CMD(0xB1, 0x04), + _INIT_DCS_CMD(0xB2, 0x05), + _INIT_DCS_CMD(0xB3, 0x11), + _INIT_DCS_CMD(0xB4, 0x24), + _INIT_DCS_CMD(0xB5, 0x39), + _INIT_DCS_CMD(0xB6, 0x4F), + _INIT_DCS_CMD(0xB7, 0x72), + _INIT_DCS_CMD(0xB8, 0x98), + _INIT_DCS_CMD(0xB9, 0xDC), + _INIT_DCS_CMD(0xBA, 0x23), + _INIT_DCS_CMD(0xBB, 0xA6), + _INIT_DCS_CMD(0xBC, 0x2C), + _INIT_DCS_CMD(0xBD, 0x30), + _INIT_DCS_CMD(0xBE, 0xAA), + _INIT_DCS_CMD(0xBF, 0x26), + _INIT_DCS_CMD(0xC0, 0x62), + _INIT_DCS_CMD(0xC1, 0x9B), + _INIT_DCS_CMD(0xC2, 0xB5), + _INIT_DCS_CMD(0xC3, 0xCF), + _INIT_DCS_CMD(0xC4, 0xDB), + _INIT_DCS_CMD(0xC5, 0xE8), + _INIT_DCS_CMD(0xC6, 0xF5), + _INIT_DCS_CMD(0xC7, 0xFA), + _INIT_DCS_CMD(0xC8, 0xFC), + _INIT_DCS_CMD(0xC9, 0x00), + _INIT_DCS_CMD(0xCA, 0x00), + _INIT_DCS_CMD(0xCB, 0x16), + _INIT_DCS_CMD(0xCC, 0xAF), + _INIT_DCS_CMD(0xCD, 0xFF), + _INIT_DCS_CMD(0xCE, 0xFF), + _INIT_DCS_CMD(0xB0, 0x09), + _INIT_DCS_CMD(0xB1, 0x04), + _INIT_DCS_CMD(0xB2, 0x02), + _INIT_DCS_CMD(0xB3, 0x16), + _INIT_DCS_CMD(0xB4, 0x24), + _INIT_DCS_CMD(0xB5, 0x3B), + _INIT_DCS_CMD(0xB6, 0x4F), + _INIT_DCS_CMD(0xB7, 0x73), + _INIT_DCS_CMD(0xB8, 0x99), + _INIT_DCS_CMD(0xB9, 0xE0), + _INIT_DCS_CMD(0xBA, 0x26), + _INIT_DCS_CMD(0xBB, 0xAD), + _INIT_DCS_CMD(0xBC, 0x36), + _INIT_DCS_CMD(0xBD, 0x3A), + _INIT_DCS_CMD(0xBE, 0xAE), + _INIT_DCS_CMD(0xBF, 0x2A), + _INIT_DCS_CMD(0xC0, 0x66), + _INIT_DCS_CMD(0xC1, 0x9E), + _INIT_DCS_CMD(0xC2, 0xB8), + _INIT_DCS_CMD(0xC3, 0xD1), + _INIT_DCS_CMD(0xC4, 0xDD), + _INIT_DCS_CMD(0xC5, 0xE9), + _INIT_DCS_CMD(0xC6, 0xF6), + _INIT_DCS_CMD(0xC7, 0xFA), + _INIT_DCS_CMD(0xC8, 0xFC), + _INIT_DCS_CMD(0xC9, 0x00), + _INIT_DCS_CMD(0xCA, 0x00), + _INIT_DCS_CMD(0xCB, 0x16), + _INIT_DCS_CMD(0xCC, 0xAF), + _INIT_DCS_CMD(0xCD, 0xFF), + _INIT_DCS_CMD(0xCE, 0xFF), + _INIT_DCS_CMD(0xB0, 0x0A), + _INIT_DCS_CMD(0xB1, 0x00), + _INIT_DCS_CMD(0xB2, 0x02), + _INIT_DCS_CMD(0xB3, 0x0F), + _INIT_DCS_CMD(0xB4, 0x25), + _INIT_DCS_CMD(0xB5, 0x39), + _INIT_DCS_CMD(0xB6, 0x4E), + _INIT_DCS_CMD(0xB7, 0x72), + _INIT_DCS_CMD(0xB8, 0x97), + _INIT_DCS_CMD(0xB9, 0xDC), + _INIT_DCS_CMD(0xBA, 0x22), + _INIT_DCS_CMD(0xBB, 0xA4), + _INIT_DCS_CMD(0xBC, 0x2B), + _INIT_DCS_CMD(0xBD, 0x2F), + _INIT_DCS_CMD(0xBE, 0xA9), + _INIT_DCS_CMD(0xBF, 0x25), + _INIT_DCS_CMD(0xC0, 0x61), + _INIT_DCS_CMD(0xC1, 0x97), + _INIT_DCS_CMD(0xC2, 0xB2), + _INIT_DCS_CMD(0xC3, 0xCD), + _INIT_DCS_CMD(0xC4, 0xD9), + _INIT_DCS_CMD(0xC5, 0xE7), + _INIT_DCS_CMD(0xC6, 0xF4), + _INIT_DCS_CMD(0xC7, 0xFA), + _INIT_DCS_CMD(0xC8, 0xFC), + _INIT_DCS_CMD(0xC9, 0x00), + _INIT_DCS_CMD(0xCA, 0x00), + _INIT_DCS_CMD(0xCB, 0x16), + _INIT_DCS_CMD(0xCC, 0xAF), + _INIT_DCS_CMD(0xCD, 0xFF), + _INIT_DCS_CMD(0xCE, 0xFF), + _INIT_DCS_CMD(0xB0, 0x0B), + _INIT_DCS_CMD(0xB1, 0x04), + _INIT_DCS_CMD(0xB2, 0x05), + _INIT_DCS_CMD(0xB3, 0x11), + _INIT_DCS_CMD(0xB4, 0x24), + _INIT_DCS_CMD(0xB5, 0x39), + _INIT_DCS_CMD(0xB6, 0x4F), + _INIT_DCS_CMD(0xB7, 0x72), + _INIT_DCS_CMD(0xB8, 0x98), + _INIT_DCS_CMD(0xB9, 0xDC), + _INIT_DCS_CMD(0xBA, 0x23), + _INIT_DCS_CMD(0xBB, 0xA6), + _INIT_DCS_CMD(0xBC, 0x2C), + _INIT_DCS_CMD(0xBD, 0x30), + _INIT_DCS_CMD(0xBE, 0xAA), + _INIT_DCS_CMD(0xBF, 0x26), + _INIT_DCS_CMD(0xC0, 0x62), + _INIT_DCS_CMD(0xC1, 0x9B), + _INIT_DCS_CMD(0xC2, 0xB5), + _INIT_DCS_CMD(0xC3, 0xCF), + _INIT_DCS_CMD(0xC4, 0xDB), + _INIT_DCS_CMD(0xC5, 0xE8), + _INIT_DCS_CMD(0xC6, 0xF5), + _INIT_DCS_CMD(0xC7, 0xFA), + _INIT_DCS_CMD(0xC8, 0xFC), + _INIT_DCS_CMD(0xC9, 0x00), + _INIT_DCS_CMD(0xCA, 0x00), + _INIT_DCS_CMD(0xCB, 0x16), + _INIT_DCS_CMD(0xCC, 0xAF), + _INIT_DCS_CMD(0xCD, 0xFF), + _INIT_DCS_CMD(0xCE, 0xFF), + _INIT_DCS_CMD(0xB0, 0x0C), + _INIT_DCS_CMD(0xB1, 0x04), + _INIT_DCS_CMD(0xB2, 0x02), + _INIT_DCS_CMD(0xB3, 0x16), + _INIT_DCS_CMD(0xB4, 0x24), + _INIT_DCS_CMD(0xB5, 0x3B), + _INIT_DCS_CMD(0xB6, 0x4F), + _INIT_DCS_CMD(0xB7, 0x73), + _INIT_DCS_CMD(0xB8, 0x99), + _INIT_DCS_CMD(0xB9, 0xE0), + _INIT_DCS_CMD(0xBA, 0x26), + _INIT_DCS_CMD(0xBB, 0xAD), + _INIT_DCS_CMD(0xBC, 0x36), + _INIT_DCS_CMD(0xBD, 0x3A), + _INIT_DCS_CMD(0xBE, 0xAE), + _INIT_DCS_CMD(0xBF, 0x2A), + _INIT_DCS_CMD(0xC0, 0x66), + _INIT_DCS_CMD(0xC1, 0x9E), + _INIT_DCS_CMD(0xC2, 0xB8), + _INIT_DCS_CMD(0xC3, 0xD1), + _INIT_DCS_CMD(0xC4, 0xDD), + _INIT_DCS_CMD(0xC5, 0xE9), + _INIT_DCS_CMD(0xC6, 0xF6), + _INIT_DCS_CMD(0xC7, 0xFA), + _INIT_DCS_CMD(0xC8, 0xFC), + _INIT_DCS_CMD(0xC9, 0x00), + _INIT_DCS_CMD(0xCA, 0x00), + _INIT_DCS_CMD(0xCB, 0x16), + _INIT_DCS_CMD(0xCC, 0xAF), + _INIT_DCS_CMD(0xCD, 0xFF), + _INIT_DCS_CMD(0xCE, 0xFF), + _INIT_DCS_CMD(0xB0, 0x00), + _INIT_DCS_CMD(0xB3, 0x08), + _INIT_DCS_CMD(0xB0, 0x04), + _INIT_DCS_CMD(0xB8, 0x68), + _INIT_DELAY_CMD(150), + {}, +}; + +static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) +{ + return container_of(panel, struct boe_panel, base); +} + +static int boe_panel_init(struct boe_panel *boe) +{ + struct mipi_dsi_device *dsi = boe->dsi; + struct drm_panel *panel = &boe->base; + int err, i; + + if (boe->desc->init_cmds) { + const struct panel_init_cmd *init_cmds = boe->desc->init_cmds; + + for (i = 0; init_cmds[i].len != 0; i++) { + const struct panel_init_cmd *cmd = &init_cmds[i]; + + switch (cmd->type) { + case DELAY_CMD: + msleep(cmd->data[0]); + err = 0; + break; + + case INIT_DCS_CMD: + err = mipi_dsi_dcs_write(dsi, cmd->data[0], + cmd->len <= 1 ? NULL : + &cmd->data[1], + cmd->len - 1); + break; + } + + if (err < 0) { + dev_err(panel->dev, + "failed to write command %u\n", i); + return err; + } + } + } + return 0; +} + +static int boe_panel_off(struct boe_panel *boe) +{ + struct mipi_dsi_device *dsi = boe->dsi; + int ret; + + dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; + + ret = mipi_dsi_dcs_enter_sleep_mode(dsi); + if (ret < 0) + return ret; + + return 0; +} + +static int boe_panel_disable(struct drm_panel *panel) +{ + struct boe_panel *boe = to_boe_panel(panel); + + if (!boe->enabled) + return 0; + + backlight_disable(boe->backlight); + + boe->enabled = false; + + return 0; +} + +static int boe_panel_unprepare(struct drm_panel *panel) +{ + struct boe_panel *boe = to_boe_panel(panel); + int ret; + + if (!boe->prepared) + return 0; + + ret = boe_panel_off(boe); + if (ret < 0) { + dev_err(panel->dev, "failed to set panel off: %d\n", ret); + return ret; + } + + msleep(150); + if (boe->enable_gpio) + gpiod_set_value(boe->enable_gpio, 0); + usleep_range(500, 1000); + regulator_disable(boe->avee); + regulator_disable(boe->avdd); + usleep_range(5000, 7000); + regulator_disable(boe->pp1800); + + boe->prepared = false; + + return 0; +} + +static int boe_panel_prepare(struct drm_panel *panel) +{ + struct boe_panel *boe = to_boe_panel(panel); + int ret; + + if (boe->prepared) + return 0; + + if (boe->enable_gpio) { + gpiod_set_value(boe->enable_gpio, 0); + usleep_range(1000, 1500); + } + + ret = regulator_enable(boe->pp1800); + if (ret < 0) + return ret; + + usleep_range(3000, 5000); + + ret = regulator_enable(boe->avdd); + if (ret < 0) + goto poweroff1v8; + ret = regulator_enable(boe->avee); + if (ret < 0) + goto poweroffavdd; + + msleep(100); + + if (boe->enable_gpio) { + gpiod_set_value(boe->enable_gpio, 1); + usleep_range(10000, 12000); + } + + ret = boe_panel_init(boe); + if (ret < 0) { + dev_err(panel->dev, "failed to init panel: %d\n", ret); + goto poweroff; + } + + boe->prepared = true; + + return 0; + +poweroff: + regulator_disable(boe->avee); +poweroffavdd: + regulator_disable(boe->avdd); +poweroff1v8: + usleep_range(5000, 7000); + regulator_disable(boe->pp1800); + if (boe->enable_gpio) + gpiod_set_value(boe->enable_gpio, 0); + return ret; +} + +static int boe_panel_enable(struct drm_panel *panel) +{ + struct boe_panel *boe = to_boe_panel(panel); + int ret; + + if (boe->enabled) + return 0; + + ret = backlight_enable(boe->backlight); + if (ret) { + dev_err(panel->dev, "Failed to enable backlight %d\n", + ret); + return ret; + } + + boe->enabled = true; + + return 0; +} + +static const struct drm_display_mode boe_default_mode = { + .clock = 159425, + .hdisplay = 1200, + .hsync_start = 1200 + 100, + .hsync_end = 1200 + 100 + 40, + .htotal = 1200 + 100 + 40 + 24, + .vdisplay = 1920, + .vsync_start = 1920 + 10, + .vsync_end = 1920 + 10 + 14, + .vtotal = 1920 + 10 + 14 + 4, + .vrefresh = 60, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct panel_desc boe_tv101wum_nl6_desc = { + .modes = &boe_default_mode, + .bpc = 8, + .size = { + .width = 216, + .height = 135, + }, + .lanes = 4, + .format = MIPI_DSI_FMT_RGB888, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_MODE_LPM, + .init_cmds = boe_init_cmd, +}; + +static int boe_panel_get_modes(struct drm_panel *panel) +{ + struct boe_panel *boe = to_boe_panel(panel); + const struct drm_display_mode *m = boe->desc->modes; + struct drm_display_mode *mode; + + mode = drm_mode_duplicate(panel->drm, m); + if (!mode) { + dev_err(panel->dev, "failed to add mode %ux%u@%u\n", + m->hdisplay, m->vdisplay, m->vrefresh); + return -ENOMEM; + } + + drm_mode_set_name(mode); + + drm_mode_probed_add(panel->connector, mode); + + panel->connector->display_info.width_mm = boe->desc->size.width; + panel->connector->display_info.height_mm = boe->desc->size.height; + panel->connector->display_info.bpc = boe->desc->bpc; + + return 1; +} + +static const struct drm_panel_funcs boe_panel_funcs = { + .disable = boe_panel_disable, + .unprepare = boe_panel_unprepare, + .prepare = boe_panel_prepare, + .enable = boe_panel_enable, + .get_modes = boe_panel_get_modes, +}; + +static int boe_panel_add(struct boe_panel *boe) +{ + struct device *dev = &boe->dsi->dev; + + boe->avdd = devm_regulator_get(dev, "avdd"); + if (IS_ERR(boe->avdd)) + return PTR_ERR(boe->avdd); + + boe->avee = devm_regulator_get(dev, "avee"); + if (IS_ERR(boe->avee)) + return PTR_ERR(boe->avee); + + boe->pp1800 = devm_regulator_get(dev, "pp1800"); + if (IS_ERR(boe->pp1800)) + return PTR_ERR(boe->pp1800); + + boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(boe->enable_gpio)) { + dev_err(dev, "cannot get reset-gpios %ld\n", + PTR_ERR(boe->enable_gpio)); + return PTR_ERR(boe->enable_gpio); + } + + gpiod_set_value(boe->enable_gpio, 0); + + boe->backlight = devm_of_find_backlight(dev); + if (IS_ERR(boe->backlight)) + return PTR_ERR(boe->backlight); + + drm_panel_init(&boe->base); + boe->base.funcs = &boe_panel_funcs; + boe->base.dev = &boe->dsi->dev; + + return drm_panel_add(&boe->base); +} + +static int boe_panel_probe(struct mipi_dsi_device *dsi) +{ + struct boe_panel *boe; + int ret; + const struct panel_desc *desc; + + boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL); + if (!boe) + return -ENOMEM; + + desc = of_device_get_match_data(&dsi->dev); + dsi->lanes = desc->lanes; + dsi->format = desc->format; + dsi->mode_flags = desc->mode_flags; + boe->desc = desc; + boe->dsi = dsi; + ret = boe_panel_add(boe); + if (ret < 0) + return ret; + + mipi_dsi_set_drvdata(dsi, boe); + + return mipi_dsi_attach(dsi); +} + +static int boe_panel_remove(struct mipi_dsi_device *dsi) +{ + struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); + int ret; + + ret = boe_panel_disable(&boe->base); + if (ret < 0) + dev_err(&dsi->dev, "failed to disable panel: %d\n", ret); + + ret = mipi_dsi_detach(dsi); + if (ret < 0) + dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); + + if (boe->base.dev) + drm_panel_remove(&boe->base); + + return 0; +} + +static void boe_panel_shutdown(struct mipi_dsi_device *dsi) +{ + struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); + + boe_panel_disable(&boe->base); +} + +static const struct of_device_id boe_of_match[] = { + { .compatible = "boe,tv101wum-nl6", + .data = &boe_tv101wum_nl6_desc + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, boe_of_match); + +static struct mipi_dsi_driver boe_panel_driver = { + .driver = { + .name = "panel-boe-tv101wum-nl6", + .of_match_table = boe_of_match, + }, + .probe = boe_panel_probe, + .remove = boe_panel_remove, + .shutdown = boe_panel_shutdown, +}; +module_mipi_dsi_driver(boe_panel_driver); + +MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>"); +MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver"); +MODULE_LICENSE("GPL v2"); -- 2.21.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel 2019-06-24 6:03 ` [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel Jitao Shi @ 2019-06-24 8:25 ` Nicolas Boichat 2019-06-25 0:42 ` Nicolas Boichat 2019-06-26 3:27 ` Hsin-Yi Wang 1 sibling, 1 reply; 6+ messages in thread From: Nicolas Boichat @ 2019-06-24 8:25 UTC (permalink / raw) To: Jitao Shi Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, linux-pwm, David Airlie, Matthias Brugger, stonea168, dri-devel, Andy Yan, Ajay Kumar, Vincent Palatin, cawa cheng, Russell King, Thierry Reding, devicetree, moderated list:ARM/Mediatek SoC support, Yingjoe Chen, Eddie Huang, linux-arm Mailing List, Rahul Sharma, srv_heupstream, lkml, Sascha Hauer, Sean Paul On Mon, Jun 24, 2019 at 2:04 PM Jitao Shi <jitao.shi@mediatek.com> wrote: > > Add driver for BOE tv101wum-nl6 panel is a 10.1" 1200x1920 panel. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/panel/Kconfig | 10 + > drivers/gpu/drm/panel/Makefile | 1 + > .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 715 ++++++++++++++++++ > 3 files changed, 726 insertions(+) > create mode 100644 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > > diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig > index e36dbb4df867..2b055ce0700b 100644 > --- a/drivers/gpu/drm/panel/Kconfig > +++ b/drivers/gpu/drm/panel/Kconfig > @@ -17,6 +17,15 @@ config DRM_PANEL_ARM_VERSATILE > reference designs. The panel is detected using special registers > in the Versatile family syscon registers. > > +config DRM_PANEL_BOE_TV101WUM_NL6 > + tristate "BOE TV101WUM 1200x1920 panel" > + depends on OF > + depends on DRM_MIPI_DSI > + depends on BACKLIGHT_CLASS_DEVICE > + help > + Say Y here if you want to support for BOE TV101WUM WUXGA PANEL > + DSI Video Mode panel > + > config DRM_PANEL_LVDS > tristate "Generic LVDS panel driver" > depends on OF > @@ -272,4 +281,5 @@ config DRM_PANEL_TRULY_NT35597_WQXGA > help > Say Y here if you want to enable support for Truly NT35597 WQXGA Dual DSI > Video Mode panel > + Drop this change. > endmenu > diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile > index 78e3dc376bdd..8d009223c44e 100644 > --- a/drivers/gpu/drm/panel/Makefile > +++ b/drivers/gpu/drm/panel/Makefile > @@ -1,5 +1,6 @@ > # SPDX-License-Identifier: GPL-2.0 > obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o > +obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o > obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o > obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o > obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > new file mode 100644 > index 000000000000..6e06c8506623 > --- /dev/null > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > @@ -0,0 +1,715 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2018 MediaTek Inc. > + * Author: Jitao Shi <jitao.shi@mediatek.com> > + */ > + > +#include <linux/backlight.h> > +#include <linux/delay.h> > +#include <linux/gpio/consumer.h> > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/of_device.h> > +#include <linux/regulator/consumer.h> > + > +#include <drm/drm_crtc.h> > +#include <drm/drm_mipi_dsi.h> > +#include <drm/drm_panel.h> > + > +#include <video/mipi_display.h> > + > +struct panel_desc { > + const struct drm_display_mode *modes; > + unsigned int bpc; > + > + /** > + * @width: width (in millimeters) of the panel's active display area > + * @height: height (in millimeters) of the panel's active display area > + */ > + struct { > + unsigned int width; > + unsigned int height; > + } size; > + > + unsigned long mode_flags; > + enum mipi_dsi_pixel_format format; > + const struct panel_init_cmd *init_cmds; > + unsigned int lanes; > +}; > + > +struct boe_panel { > + struct drm_panel base; > + struct mipi_dsi_device *dsi; > + > + const struct panel_desc *desc; > + > + struct backlight_device *backlight; > + struct regulator *pp1800; > + struct regulator *avee; > + struct regulator *avdd; > + struct gpio_desc *enable_gpio; > + > + bool prepared; > + bool enabled; > + > + const struct drm_display_mode *mode; > +}; > + > +enum dsi_cmd_type { > + INIT_DCS_CMD, > + DELAY_CMD, > +}; > + > +struct panel_init_cmd { > + enum dsi_cmd_type type; > + size_t len; > + const char *data; > +}; > + > +#define _INIT_DCS_CMD(...) { \ > + .type = INIT_DCS_CMD, \ > + .len = sizeof((char[]){__VA_ARGS__}), \ > + .data = (char[]){__VA_ARGS__} } > + > +#define _INIT_DELAY_CMD(...) { \ > + .type = DELAY_CMD,\ > + .len = sizeof((char[]){__VA_ARGS__}), \ > + .data = (char[]){__VA_ARGS__} } > + > +static const struct panel_init_cmd boe_init_cmd[] = { > + _INIT_DELAY_CMD(24), > + _INIT_DCS_CMD(0xB0, 0x05), > + _INIT_DCS_CMD(0xB1, 0xE5), > + _INIT_DCS_CMD(0xB3, 0x52), > + _INIT_DCS_CMD(0xB0, 0x00), > + _INIT_DCS_CMD(0xB3, 0x88), > + _INIT_DCS_CMD(0xB0, 0x04), > + _INIT_DCS_CMD(0xB8, 0x00), > + _INIT_DCS_CMD(0xB0, 0x00), > + _INIT_DCS_CMD(0xB6, 0x03), > + _INIT_DCS_CMD(0xBA, 0x8B), > + _INIT_DCS_CMD(0xBF, 0x1A), > + _INIT_DCS_CMD(0xC0, 0x0F), > + _INIT_DCS_CMD(0xC2, 0x0C), > + _INIT_DCS_CMD(0xC3, 0x02), > + _INIT_DCS_CMD(0xC4, 0x0C), > + _INIT_DCS_CMD(0xC5, 0x02), > + _INIT_DCS_CMD(0xB0, 0x01), > + _INIT_DCS_CMD(0xE0, 0x26), > + _INIT_DCS_CMD(0xE1, 0x26), > + _INIT_DCS_CMD(0xDC, 0x00), > + _INIT_DCS_CMD(0xDD, 0x00), > + _INIT_DCS_CMD(0xCC, 0x26), > + _INIT_DCS_CMD(0xCD, 0x26), > + _INIT_DCS_CMD(0xC8, 0x00), > + _INIT_DCS_CMD(0xC9, 0x00), > + _INIT_DCS_CMD(0xD2, 0x03), > + _INIT_DCS_CMD(0xD3, 0x03), > + _INIT_DCS_CMD(0xE6, 0x04), > + _INIT_DCS_CMD(0xE7, 0x04), > + _INIT_DCS_CMD(0xC4, 0x09), > + _INIT_DCS_CMD(0xC5, 0x09), > + _INIT_DCS_CMD(0xD8, 0x0A), > + _INIT_DCS_CMD(0xD9, 0x0A), > + _INIT_DCS_CMD(0xC2, 0x0B), > + _INIT_DCS_CMD(0xC3, 0x0B), > + _INIT_DCS_CMD(0xD6, 0x0C), > + _INIT_DCS_CMD(0xD7, 0x0C), > + _INIT_DCS_CMD(0xC0, 0x05), > + _INIT_DCS_CMD(0xC1, 0x05), > + _INIT_DCS_CMD(0xD4, 0x06), > + _INIT_DCS_CMD(0xD5, 0x06), > + _INIT_DCS_CMD(0xCA, 0x07), > + _INIT_DCS_CMD(0xCB, 0x07), > + _INIT_DCS_CMD(0xDE, 0x08), > + _INIT_DCS_CMD(0xDF, 0x08), > + _INIT_DCS_CMD(0xB0, 0x02), > + _INIT_DCS_CMD(0xC0, 0x00), > + _INIT_DCS_CMD(0xC1, 0x0D), > + _INIT_DCS_CMD(0xC2, 0x17), > + _INIT_DCS_CMD(0xC3, 0x26), > + _INIT_DCS_CMD(0xC4, 0x31), > + _INIT_DCS_CMD(0xC5, 0x1C), > + _INIT_DCS_CMD(0xC6, 0x2C), > + _INIT_DCS_CMD(0xC7, 0x33), > + _INIT_DCS_CMD(0xC8, 0x31), > + _INIT_DCS_CMD(0xC9, 0x37), > + _INIT_DCS_CMD(0xCA, 0x37), > + _INIT_DCS_CMD(0xCB, 0x37), > + _INIT_DCS_CMD(0xCC, 0x39), > + _INIT_DCS_CMD(0xCD, 0x2E), > + _INIT_DCS_CMD(0xCE, 0x2F), > + _INIT_DCS_CMD(0xCF, 0x2F), > + _INIT_DCS_CMD(0xD0, 0x07), > + _INIT_DCS_CMD(0xD2, 0x00), > + _INIT_DCS_CMD(0xD3, 0x0D), > + _INIT_DCS_CMD(0xD4, 0x17), > + _INIT_DCS_CMD(0xD5, 0x26), > + _INIT_DCS_CMD(0xD6, 0x31), > + _INIT_DCS_CMD(0xD7, 0x3F), > + _INIT_DCS_CMD(0xD8, 0x3F), > + _INIT_DCS_CMD(0xD9, 0x3F), > + _INIT_DCS_CMD(0xDA, 0x3F), > + _INIT_DCS_CMD(0xDB, 0x37), > + _INIT_DCS_CMD(0xDC, 0x37), > + _INIT_DCS_CMD(0xDD, 0x37), > + _INIT_DCS_CMD(0xDE, 0x39), > + _INIT_DCS_CMD(0xDF, 0x2E), > + _INIT_DCS_CMD(0xE0, 0x2F), > + _INIT_DCS_CMD(0xE1, 0x2F), > + _INIT_DCS_CMD(0xE2, 0x07), > + _INIT_DCS_CMD(0xB0, 0x03), > + _INIT_DCS_CMD(0xC8, 0x0B), > + _INIT_DCS_CMD(0xC9, 0x07), > + _INIT_DCS_CMD(0xC3, 0x00), > + _INIT_DCS_CMD(0xE7, 0x00), > + _INIT_DCS_CMD(0xC5, 0x2A), > + _INIT_DCS_CMD(0xDE, 0x2A), > + _INIT_DCS_CMD(0xCA, 0x43), > + _INIT_DCS_CMD(0xC9, 0x07), > + _INIT_DCS_CMD(0xE4, 0xC0), > + _INIT_DCS_CMD(0xE5, 0x0D), > + _INIT_DCS_CMD(0xCB, 0x00), > + _INIT_DCS_CMD(0xB0, 0x06), > + _INIT_DCS_CMD(0xB8, 0xA5), > + _INIT_DCS_CMD(0xC0, 0xA5), > + _INIT_DCS_CMD(0xC7, 0x0F), > + _INIT_DCS_CMD(0xD5, 0x32), > + _INIT_DCS_CMD(0xB8, 0x00), > + _INIT_DCS_CMD(0xC0, 0x00), > + _INIT_DCS_CMD(0xBC, 0x00), > + _INIT_DCS_CMD(0xB0, 0x07), > + _INIT_DCS_CMD(0xB1, 0x00), > + _INIT_DCS_CMD(0xB2, 0x02), > + _INIT_DCS_CMD(0xB3, 0x0F), > + _INIT_DCS_CMD(0xB4, 0x25), > + _INIT_DCS_CMD(0xB5, 0x39), > + _INIT_DCS_CMD(0xB6, 0x4E), > + _INIT_DCS_CMD(0xB7, 0x72), > + _INIT_DCS_CMD(0xB8, 0x97), > + _INIT_DCS_CMD(0xB9, 0xDC), > + _INIT_DCS_CMD(0xBA, 0x22), > + _INIT_DCS_CMD(0xBB, 0xA4), > + _INIT_DCS_CMD(0xBC, 0x2B), > + _INIT_DCS_CMD(0xBD, 0x2F), > + _INIT_DCS_CMD(0xBE, 0xA9), > + _INIT_DCS_CMD(0xBF, 0x25), > + _INIT_DCS_CMD(0xC0, 0x61), > + _INIT_DCS_CMD(0xC1, 0x97), > + _INIT_DCS_CMD(0xC2, 0xB2), > + _INIT_DCS_CMD(0xC3, 0xCD), > + _INIT_DCS_CMD(0xC4, 0xD9), > + _INIT_DCS_CMD(0xC5, 0xE7), > + _INIT_DCS_CMD(0xC6, 0xF4), > + _INIT_DCS_CMD(0xC7, 0xFA), > + _INIT_DCS_CMD(0xC8, 0xFC), > + _INIT_DCS_CMD(0xC9, 0x00), > + _INIT_DCS_CMD(0xCA, 0x00), > + _INIT_DCS_CMD(0xCB, 0x16), > + _INIT_DCS_CMD(0xCC, 0xAF), > + _INIT_DCS_CMD(0xCD, 0xFF), > + _INIT_DCS_CMD(0xCE, 0xFF), > + _INIT_DCS_CMD(0xB0, 0x08), > + _INIT_DCS_CMD(0xB1, 0x04), > + _INIT_DCS_CMD(0xB2, 0x05), > + _INIT_DCS_CMD(0xB3, 0x11), > + _INIT_DCS_CMD(0xB4, 0x24), > + _INIT_DCS_CMD(0xB5, 0x39), > + _INIT_DCS_CMD(0xB6, 0x4F), > + _INIT_DCS_CMD(0xB7, 0x72), > + _INIT_DCS_CMD(0xB8, 0x98), > + _INIT_DCS_CMD(0xB9, 0xDC), > + _INIT_DCS_CMD(0xBA, 0x23), > + _INIT_DCS_CMD(0xBB, 0xA6), > + _INIT_DCS_CMD(0xBC, 0x2C), > + _INIT_DCS_CMD(0xBD, 0x30), > + _INIT_DCS_CMD(0xBE, 0xAA), > + _INIT_DCS_CMD(0xBF, 0x26), > + _INIT_DCS_CMD(0xC0, 0x62), > + _INIT_DCS_CMD(0xC1, 0x9B), > + _INIT_DCS_CMD(0xC2, 0xB5), > + _INIT_DCS_CMD(0xC3, 0xCF), > + _INIT_DCS_CMD(0xC4, 0xDB), > + _INIT_DCS_CMD(0xC5, 0xE8), > + _INIT_DCS_CMD(0xC6, 0xF5), > + _INIT_DCS_CMD(0xC7, 0xFA), > + _INIT_DCS_CMD(0xC8, 0xFC), > + _INIT_DCS_CMD(0xC9, 0x00), > + _INIT_DCS_CMD(0xCA, 0x00), > + _INIT_DCS_CMD(0xCB, 0x16), > + _INIT_DCS_CMD(0xCC, 0xAF), > + _INIT_DCS_CMD(0xCD, 0xFF), > + _INIT_DCS_CMD(0xCE, 0xFF), > + _INIT_DCS_CMD(0xB0, 0x09), > + _INIT_DCS_CMD(0xB1, 0x04), > + _INIT_DCS_CMD(0xB2, 0x02), > + _INIT_DCS_CMD(0xB3, 0x16), > + _INIT_DCS_CMD(0xB4, 0x24), > + _INIT_DCS_CMD(0xB5, 0x3B), > + _INIT_DCS_CMD(0xB6, 0x4F), > + _INIT_DCS_CMD(0xB7, 0x73), > + _INIT_DCS_CMD(0xB8, 0x99), > + _INIT_DCS_CMD(0xB9, 0xE0), > + _INIT_DCS_CMD(0xBA, 0x26), > + _INIT_DCS_CMD(0xBB, 0xAD), > + _INIT_DCS_CMD(0xBC, 0x36), > + _INIT_DCS_CMD(0xBD, 0x3A), > + _INIT_DCS_CMD(0xBE, 0xAE), > + _INIT_DCS_CMD(0xBF, 0x2A), > + _INIT_DCS_CMD(0xC0, 0x66), > + _INIT_DCS_CMD(0xC1, 0x9E), > + _INIT_DCS_CMD(0xC2, 0xB8), > + _INIT_DCS_CMD(0xC3, 0xD1), > + _INIT_DCS_CMD(0xC4, 0xDD), > + _INIT_DCS_CMD(0xC5, 0xE9), > + _INIT_DCS_CMD(0xC6, 0xF6), > + _INIT_DCS_CMD(0xC7, 0xFA), > + _INIT_DCS_CMD(0xC8, 0xFC), > + _INIT_DCS_CMD(0xC9, 0x00), > + _INIT_DCS_CMD(0xCA, 0x00), > + _INIT_DCS_CMD(0xCB, 0x16), > + _INIT_DCS_CMD(0xCC, 0xAF), > + _INIT_DCS_CMD(0xCD, 0xFF), > + _INIT_DCS_CMD(0xCE, 0xFF), > + _INIT_DCS_CMD(0xB0, 0x0A), > + _INIT_DCS_CMD(0xB1, 0x00), > + _INIT_DCS_CMD(0xB2, 0x02), > + _INIT_DCS_CMD(0xB3, 0x0F), > + _INIT_DCS_CMD(0xB4, 0x25), > + _INIT_DCS_CMD(0xB5, 0x39), > + _INIT_DCS_CMD(0xB6, 0x4E), > + _INIT_DCS_CMD(0xB7, 0x72), > + _INIT_DCS_CMD(0xB8, 0x97), > + _INIT_DCS_CMD(0xB9, 0xDC), > + _INIT_DCS_CMD(0xBA, 0x22), > + _INIT_DCS_CMD(0xBB, 0xA4), > + _INIT_DCS_CMD(0xBC, 0x2B), > + _INIT_DCS_CMD(0xBD, 0x2F), > + _INIT_DCS_CMD(0xBE, 0xA9), > + _INIT_DCS_CMD(0xBF, 0x25), > + _INIT_DCS_CMD(0xC0, 0x61), > + _INIT_DCS_CMD(0xC1, 0x97), > + _INIT_DCS_CMD(0xC2, 0xB2), > + _INIT_DCS_CMD(0xC3, 0xCD), > + _INIT_DCS_CMD(0xC4, 0xD9), > + _INIT_DCS_CMD(0xC5, 0xE7), > + _INIT_DCS_CMD(0xC6, 0xF4), > + _INIT_DCS_CMD(0xC7, 0xFA), > + _INIT_DCS_CMD(0xC8, 0xFC), > + _INIT_DCS_CMD(0xC9, 0x00), > + _INIT_DCS_CMD(0xCA, 0x00), > + _INIT_DCS_CMD(0xCB, 0x16), > + _INIT_DCS_CMD(0xCC, 0xAF), > + _INIT_DCS_CMD(0xCD, 0xFF), > + _INIT_DCS_CMD(0xCE, 0xFF), > + _INIT_DCS_CMD(0xB0, 0x0B), > + _INIT_DCS_CMD(0xB1, 0x04), > + _INIT_DCS_CMD(0xB2, 0x05), > + _INIT_DCS_CMD(0xB3, 0x11), > + _INIT_DCS_CMD(0xB4, 0x24), > + _INIT_DCS_CMD(0xB5, 0x39), > + _INIT_DCS_CMD(0xB6, 0x4F), > + _INIT_DCS_CMD(0xB7, 0x72), > + _INIT_DCS_CMD(0xB8, 0x98), > + _INIT_DCS_CMD(0xB9, 0xDC), > + _INIT_DCS_CMD(0xBA, 0x23), > + _INIT_DCS_CMD(0xBB, 0xA6), > + _INIT_DCS_CMD(0xBC, 0x2C), > + _INIT_DCS_CMD(0xBD, 0x30), > + _INIT_DCS_CMD(0xBE, 0xAA), > + _INIT_DCS_CMD(0xBF, 0x26), > + _INIT_DCS_CMD(0xC0, 0x62), > + _INIT_DCS_CMD(0xC1, 0x9B), > + _INIT_DCS_CMD(0xC2, 0xB5), > + _INIT_DCS_CMD(0xC3, 0xCF), > + _INIT_DCS_CMD(0xC4, 0xDB), > + _INIT_DCS_CMD(0xC5, 0xE8), > + _INIT_DCS_CMD(0xC6, 0xF5), > + _INIT_DCS_CMD(0xC7, 0xFA), > + _INIT_DCS_CMD(0xC8, 0xFC), > + _INIT_DCS_CMD(0xC9, 0x00), > + _INIT_DCS_CMD(0xCA, 0x00), > + _INIT_DCS_CMD(0xCB, 0x16), > + _INIT_DCS_CMD(0xCC, 0xAF), > + _INIT_DCS_CMD(0xCD, 0xFF), > + _INIT_DCS_CMD(0xCE, 0xFF), > + _INIT_DCS_CMD(0xB0, 0x0C), > + _INIT_DCS_CMD(0xB1, 0x04), > + _INIT_DCS_CMD(0xB2, 0x02), > + _INIT_DCS_CMD(0xB3, 0x16), > + _INIT_DCS_CMD(0xB4, 0x24), > + _INIT_DCS_CMD(0xB5, 0x3B), > + _INIT_DCS_CMD(0xB6, 0x4F), > + _INIT_DCS_CMD(0xB7, 0x73), > + _INIT_DCS_CMD(0xB8, 0x99), > + _INIT_DCS_CMD(0xB9, 0xE0), > + _INIT_DCS_CMD(0xBA, 0x26), > + _INIT_DCS_CMD(0xBB, 0xAD), > + _INIT_DCS_CMD(0xBC, 0x36), > + _INIT_DCS_CMD(0xBD, 0x3A), > + _INIT_DCS_CMD(0xBE, 0xAE), > + _INIT_DCS_CMD(0xBF, 0x2A), > + _INIT_DCS_CMD(0xC0, 0x66), > + _INIT_DCS_CMD(0xC1, 0x9E), > + _INIT_DCS_CMD(0xC2, 0xB8), > + _INIT_DCS_CMD(0xC3, 0xD1), > + _INIT_DCS_CMD(0xC4, 0xDD), > + _INIT_DCS_CMD(0xC5, 0xE9), > + _INIT_DCS_CMD(0xC6, 0xF6), > + _INIT_DCS_CMD(0xC7, 0xFA), > + _INIT_DCS_CMD(0xC8, 0xFC), > + _INIT_DCS_CMD(0xC9, 0x00), > + _INIT_DCS_CMD(0xCA, 0x00), > + _INIT_DCS_CMD(0xCB, 0x16), > + _INIT_DCS_CMD(0xCC, 0xAF), > + _INIT_DCS_CMD(0xCD, 0xFF), > + _INIT_DCS_CMD(0xCE, 0xFF), > + _INIT_DCS_CMD(0xB0, 0x00), > + _INIT_DCS_CMD(0xB3, 0x08), > + _INIT_DCS_CMD(0xB0, 0x04), > + _INIT_DCS_CMD(0xB8, 0x68), > + _INIT_DELAY_CMD(150), > + {}, > +}; > + > +static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) > +{ > + return container_of(panel, struct boe_panel, base); > +} > + > +static int boe_panel_init(struct boe_panel *boe) > +{ > + struct mipi_dsi_device *dsi = boe->dsi; > + struct drm_panel *panel = &boe->base; > + int err, i; > + > + if (boe->desc->init_cmds) { > + const struct panel_init_cmd *init_cmds = boe->desc->init_cmds; > + > + for (i = 0; init_cmds[i].len != 0; i++) { > + const struct panel_init_cmd *cmd = &init_cmds[i]; > + > + switch (cmd->type) { > + case DELAY_CMD: > + msleep(cmd->data[0]); > + err = 0; > + break; > + > + case INIT_DCS_CMD: > + err = mipi_dsi_dcs_write(dsi, cmd->data[0], > + cmd->len <= 1 ? NULL : > + &cmd->data[1], > + cmd->len - 1); > + break; > + } > + > + if (err < 0) { > + dev_err(panel->dev, > + "failed to write command %u\n", i); > + return err; > + } > + } > + } > + return 0; > +} > + > +static int boe_panel_off(struct boe_panel *boe) > +{ > + struct mipi_dsi_device *dsi = boe->dsi; > + int ret; > + > + dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; > + > + ret = mipi_dsi_dcs_enter_sleep_mode(dsi); > + if (ret < 0) > + return ret; > + > + return 0; > +} > + > +static int boe_panel_disable(struct drm_panel *panel) > +{ > + struct boe_panel *boe = to_boe_panel(panel); > + > + if (!boe->enabled) > + return 0; > + > + backlight_disable(boe->backlight); > + > + boe->enabled = false; > + > + return 0; > +} > + > +static int boe_panel_unprepare(struct drm_panel *panel) > +{ > + struct boe_panel *boe = to_boe_panel(panel); > + int ret; > + > + if (!boe->prepared) > + return 0; > + > + ret = boe_panel_off(boe); > + if (ret < 0) { > + dev_err(panel->dev, "failed to set panel off: %d\n", ret); > + return ret; > + } > + > + msleep(150); > + if (boe->enable_gpio) > + gpiod_set_value(boe->enable_gpio, 0); > + usleep_range(500, 1000); > + regulator_disable(boe->avee); > + regulator_disable(boe->avdd); > + usleep_range(5000, 7000); > + regulator_disable(boe->pp1800); > + > + boe->prepared = false; > + > + return 0; > +} > + > +static int boe_panel_prepare(struct drm_panel *panel) > +{ > + struct boe_panel *boe = to_boe_panel(panel); > + int ret; > + > + if (boe->prepared) > + return 0; > + > + if (boe->enable_gpio) { > + gpiod_set_value(boe->enable_gpio, 0); > + usleep_range(1000, 1500); > + } > + > + ret = regulator_enable(boe->pp1800); > + if (ret < 0) > + return ret; > + > + usleep_range(3000, 5000); > + > + ret = regulator_enable(boe->avdd); > + if (ret < 0) > + goto poweroff1v8; > + ret = regulator_enable(boe->avee); > + if (ret < 0) > + goto poweroffavdd; > + > + msleep(100); > + > + if (boe->enable_gpio) { > + gpiod_set_value(boe->enable_gpio, 1); > + usleep_range(10000, 12000); > + } > + > + ret = boe_panel_init(boe); > + if (ret < 0) { > + dev_err(panel->dev, "failed to init panel: %d\n", ret); > + goto poweroff; > + } > + > + boe->prepared = true; > + > + return 0; > + > +poweroff: > + regulator_disable(boe->avee); > +poweroffavdd: > + regulator_disable(boe->avdd); > +poweroff1v8: > + usleep_range(5000, 7000); > + regulator_disable(boe->pp1800); > + if (boe->enable_gpio) > + gpiod_set_value(boe->enable_gpio, 0); > + return ret; > +} > + > +static int boe_panel_enable(struct drm_panel *panel) > +{ > + struct boe_panel *boe = to_boe_panel(panel); > + int ret; > + > + if (boe->enabled) > + return 0; > + > + ret = backlight_enable(boe->backlight); > + if (ret) { > + dev_err(panel->dev, "Failed to enable backlight %d\n", > + ret); > + return ret; > + } > + > + boe->enabled = true; > + > + return 0; > +} > + > +static const struct drm_display_mode boe_default_mode = { > + .clock = 159425, > + .hdisplay = 1200, > + .hsync_start = 1200 + 100, > + .hsync_end = 1200 + 100 + 40, > + .htotal = 1200 + 100 + 40 + 24, > + .vdisplay = 1920, > + .vsync_start = 1920 + 10, > + .vsync_end = 1920 + 10 + 14, > + .vtotal = 1920 + 10 + 14 + 4, > + .vrefresh = 60, > + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > +}; > + > +static const struct panel_desc boe_tv101wum_nl6_desc = { > + .modes = &boe_default_mode, > + .bpc = 8, > + .size = { > + .width = 216, > + .height = 135, > + }, > + .lanes = 4, > + .format = MIPI_DSI_FMT_RGB888, > + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > + MIPI_DSI_MODE_LPM, > + .init_cmds = boe_init_cmd, > +}; > + > +static int boe_panel_get_modes(struct drm_panel *panel) > +{ > + struct boe_panel *boe = to_boe_panel(panel); > + const struct drm_display_mode *m = boe->desc->modes; > + struct drm_display_mode *mode; > + > + mode = drm_mode_duplicate(panel->drm, m); > + if (!mode) { > + dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > + m->hdisplay, m->vdisplay, m->vrefresh); > + return -ENOMEM; > + } > + > + drm_mode_set_name(mode); > + Sam suggested adding this here: mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; > + drm_mode_probed_add(panel->connector, mode); > + > + panel->connector->display_info.width_mm = boe->desc->size.width; > + panel->connector->display_info.height_mm = boe->desc->size.height; > + panel->connector->display_info.bpc = boe->desc->bpc; > + > + return 1; > +} > + > +static const struct drm_panel_funcs boe_panel_funcs = { > + .disable = boe_panel_disable, > + .unprepare = boe_panel_unprepare, > + .prepare = boe_panel_prepare, > + .enable = boe_panel_enable, > + .get_modes = boe_panel_get_modes, > +}; > + > +static int boe_panel_add(struct boe_panel *boe) > +{ > + struct device *dev = &boe->dsi->dev; > + > + boe->avdd = devm_regulator_get(dev, "avdd"); > + if (IS_ERR(boe->avdd)) > + return PTR_ERR(boe->avdd); > + > + boe->avee = devm_regulator_get(dev, "avee"); > + if (IS_ERR(boe->avee)) > + return PTR_ERR(boe->avee); > + > + boe->pp1800 = devm_regulator_get(dev, "pp1800"); > + if (IS_ERR(boe->pp1800)) > + return PTR_ERR(boe->pp1800); > + > + boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW); > + if (IS_ERR(boe->enable_gpio)) { > + dev_err(dev, "cannot get reset-gpios %ld\n", > + PTR_ERR(boe->enable_gpio)); > + return PTR_ERR(boe->enable_gpio); > + } > + > + gpiod_set_value(boe->enable_gpio, 0); > + > + boe->backlight = devm_of_find_backlight(dev); > + if (IS_ERR(boe->backlight)) > + return PTR_ERR(boe->backlight); > + > + drm_panel_init(&boe->base); > + boe->base.funcs = &boe_panel_funcs; > + boe->base.dev = &boe->dsi->dev; > + > + return drm_panel_add(&boe->base); > +} > + > +static int boe_panel_probe(struct mipi_dsi_device *dsi) > +{ > + struct boe_panel *boe; > + int ret; > + const struct panel_desc *desc; > + > + boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL); > + if (!boe) > + return -ENOMEM; > + > + desc = of_device_get_match_data(&dsi->dev); > + dsi->lanes = desc->lanes; > + dsi->format = desc->format; > + dsi->mode_flags = desc->mode_flags; > + boe->desc = desc; > + boe->dsi = dsi; > + ret = boe_panel_add(boe); > + if (ret < 0) > + return ret; > + > + mipi_dsi_set_drvdata(dsi, boe); > + > + return mipi_dsi_attach(dsi); > +} > + > +static int boe_panel_remove(struct mipi_dsi_device *dsi) > +{ > + struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); > + int ret; > + > + ret = boe_panel_disable(&boe->base); > + if (ret < 0) > + dev_err(&dsi->dev, "failed to disable panel: %d\n", ret); > + > + ret = mipi_dsi_detach(dsi); > + if (ret < 0) > + dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); > + > + if (boe->base.dev) > + drm_panel_remove(&boe->base); > + > + return 0; > +} > + > +static void boe_panel_shutdown(struct mipi_dsi_device *dsi) > +{ > + struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); > + > + boe_panel_disable(&boe->base); > +} > + > +static const struct of_device_id boe_of_match[] = { > + { .compatible = "boe,tv101wum-nl6", > + .data = &boe_tv101wum_nl6_desc > + }, > + { /* sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, boe_of_match); > + > +static struct mipi_dsi_driver boe_panel_driver = { > + .driver = { > + .name = "panel-boe-tv101wum-nl6", > + .of_match_table = boe_of_match, > + }, > + .probe = boe_panel_probe, > + .remove = boe_panel_remove, > + .shutdown = boe_panel_shutdown, > +}; > +module_mipi_dsi_driver(boe_panel_driver); > + > +MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>"); > +MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver"); > +MODULE_LICENSE("GPL v2"); > -- > 2.21.0 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel 2019-06-24 8:25 ` Nicolas Boichat @ 2019-06-25 0:42 ` Nicolas Boichat 0 siblings, 0 replies; 6+ messages in thread From: Nicolas Boichat @ 2019-06-25 0:42 UTC (permalink / raw) To: Jitao Shi Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, linux-pwm, David Airlie, Matthias Brugger, stonea168, dri-devel, Andy Yan, Ajay Kumar, Vincent Palatin, cawa cheng, Russell King, Thierry Reding, devicetree, moderated list:ARM/Mediatek SoC support, Yingjoe Chen, Eddie Huang, linux-arm Mailing List, Rahul Sharma, srv_heupstream, lkml, Sascha Hauer, Sean Paul On Mon, Jun 24, 2019 at 4:25 PM Nicolas Boichat <drinkcat@chromium.org> wrote: > > On Mon, Jun 24, 2019 at 2:04 PM Jitao Shi <jitao.shi@mediatek.com> wrote: > > > > Add driver for BOE tv101wum-nl6 panel is a 10.1" 1200x1920 panel. > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > drivers/gpu/drm/panel/Kconfig | 10 + > > drivers/gpu/drm/panel/Makefile | 1 + > > .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 715 ++++++++++++++++++ > > 3 files changed, 726 insertions(+) > > create mode 100644 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > > > > diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig > > index e36dbb4df867..2b055ce0700b 100644 > > --- a/drivers/gpu/drm/panel/Kconfig > > +++ b/drivers/gpu/drm/panel/Kconfig > > @@ -17,6 +17,15 @@ config DRM_PANEL_ARM_VERSATILE > > reference designs. The panel is detected using special registers > > in the Versatile family syscon registers. > > > > +config DRM_PANEL_BOE_TV101WUM_NL6 > > + tristate "BOE TV101WUM 1200x1920 panel" > > + depends on OF > > + depends on DRM_MIPI_DSI > > + depends on BACKLIGHT_CLASS_DEVICE > > + help > > + Say Y here if you want to support for BOE TV101WUM WUXGA PANEL > > + DSI Video Mode panel > > + > > config DRM_PANEL_LVDS > > tristate "Generic LVDS panel driver" > > depends on OF > > @@ -272,4 +281,5 @@ config DRM_PANEL_TRULY_NT35597_WQXGA > > help > > Say Y here if you want to enable support for Truly NT35597 WQXGA Dual DSI > > Video Mode panel > > + > > Drop this change. > > > endmenu > > diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile > > index 78e3dc376bdd..8d009223c44e 100644 > > --- a/drivers/gpu/drm/panel/Makefile > > +++ b/drivers/gpu/drm/panel/Makefile > > @@ -1,5 +1,6 @@ > > # SPDX-License-Identifier: GPL-2.0 > > obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o > > +obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o > > obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o > > obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o > > obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o > > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > > new file mode 100644 > > index 000000000000..6e06c8506623 > > --- /dev/null > > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > > @@ -0,0 +1,715 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2018 MediaTek Inc. > > + * Author: Jitao Shi <jitao.shi@mediatek.com> > > + */ > > + > > +#include <linux/backlight.h> > > +#include <linux/delay.h> > > +#include <linux/gpio/consumer.h> > > +#include <linux/module.h> > > +#include <linux/of.h> > > +#include <linux/of_device.h> > > +#include <linux/regulator/consumer.h> > > + > > +#include <drm/drm_crtc.h> > > +#include <drm/drm_mipi_dsi.h> > > +#include <drm/drm_panel.h> > > + > > +#include <video/mipi_display.h> > > + > > +struct panel_desc { > > + const struct drm_display_mode *modes; > > + unsigned int bpc; > > + > > + /** > > + * @width: width (in millimeters) of the panel's active display area > > + * @height: height (in millimeters) of the panel's active display area > > + */ > > + struct { > > + unsigned int width; > > + unsigned int height; > > + } size; > > + > > + unsigned long mode_flags; > > + enum mipi_dsi_pixel_format format; > > + const struct panel_init_cmd *init_cmds; > > + unsigned int lanes; > > +}; > > + > > +struct boe_panel { > > + struct drm_panel base; > > + struct mipi_dsi_device *dsi; > > + > > + const struct panel_desc *desc; > > + > > + struct backlight_device *backlight; > > + struct regulator *pp1800; > > + struct regulator *avee; > > + struct regulator *avdd; > > + struct gpio_desc *enable_gpio; > > + > > + bool prepared; > > + bool enabled; > > + > > + const struct drm_display_mode *mode; > > +}; > > + > > +enum dsi_cmd_type { > > + INIT_DCS_CMD, > > + DELAY_CMD, > > +}; > > + > > +struct panel_init_cmd { > > + enum dsi_cmd_type type; > > + size_t len; > > + const char *data; > > +}; > > + > > +#define _INIT_DCS_CMD(...) { \ > > + .type = INIT_DCS_CMD, \ > > + .len = sizeof((char[]){__VA_ARGS__}), \ > > + .data = (char[]){__VA_ARGS__} } > > + > > +#define _INIT_DELAY_CMD(...) { \ > > + .type = DELAY_CMD,\ > > + .len = sizeof((char[]){__VA_ARGS__}), \ > > + .data = (char[]){__VA_ARGS__} } > > + > > +static const struct panel_init_cmd boe_init_cmd[] = { > > + _INIT_DELAY_CMD(24), > > + _INIT_DCS_CMD(0xB0, 0x05), > > + _INIT_DCS_CMD(0xB1, 0xE5), > > + _INIT_DCS_CMD(0xB3, 0x52), > > + _INIT_DCS_CMD(0xB0, 0x00), > > + _INIT_DCS_CMD(0xB3, 0x88), > > + _INIT_DCS_CMD(0xB0, 0x04), > > + _INIT_DCS_CMD(0xB8, 0x00), > > + _INIT_DCS_CMD(0xB0, 0x00), > > + _INIT_DCS_CMD(0xB6, 0x03), > > + _INIT_DCS_CMD(0xBA, 0x8B), > > + _INIT_DCS_CMD(0xBF, 0x1A), > > + _INIT_DCS_CMD(0xC0, 0x0F), > > + _INIT_DCS_CMD(0xC2, 0x0C), > > + _INIT_DCS_CMD(0xC3, 0x02), > > + _INIT_DCS_CMD(0xC4, 0x0C), > > + _INIT_DCS_CMD(0xC5, 0x02), > > + _INIT_DCS_CMD(0xB0, 0x01), > > + _INIT_DCS_CMD(0xE0, 0x26), > > + _INIT_DCS_CMD(0xE1, 0x26), > > + _INIT_DCS_CMD(0xDC, 0x00), > > + _INIT_DCS_CMD(0xDD, 0x00), > > + _INIT_DCS_CMD(0xCC, 0x26), > > + _INIT_DCS_CMD(0xCD, 0x26), > > + _INIT_DCS_CMD(0xC8, 0x00), > > + _INIT_DCS_CMD(0xC9, 0x00), > > + _INIT_DCS_CMD(0xD2, 0x03), > > + _INIT_DCS_CMD(0xD3, 0x03), > > + _INIT_DCS_CMD(0xE6, 0x04), > > + _INIT_DCS_CMD(0xE7, 0x04), > > + _INIT_DCS_CMD(0xC4, 0x09), > > + _INIT_DCS_CMD(0xC5, 0x09), > > + _INIT_DCS_CMD(0xD8, 0x0A), > > + _INIT_DCS_CMD(0xD9, 0x0A), > > + _INIT_DCS_CMD(0xC2, 0x0B), > > + _INIT_DCS_CMD(0xC3, 0x0B), > > + _INIT_DCS_CMD(0xD6, 0x0C), > > + _INIT_DCS_CMD(0xD7, 0x0C), > > + _INIT_DCS_CMD(0xC0, 0x05), > > + _INIT_DCS_CMD(0xC1, 0x05), > > + _INIT_DCS_CMD(0xD4, 0x06), > > + _INIT_DCS_CMD(0xD5, 0x06), > > + _INIT_DCS_CMD(0xCA, 0x07), > > + _INIT_DCS_CMD(0xCB, 0x07), > > + _INIT_DCS_CMD(0xDE, 0x08), > > + _INIT_DCS_CMD(0xDF, 0x08), > > + _INIT_DCS_CMD(0xB0, 0x02), > > + _INIT_DCS_CMD(0xC0, 0x00), > > + _INIT_DCS_CMD(0xC1, 0x0D), > > + _INIT_DCS_CMD(0xC2, 0x17), > > + _INIT_DCS_CMD(0xC3, 0x26), > > + _INIT_DCS_CMD(0xC4, 0x31), > > + _INIT_DCS_CMD(0xC5, 0x1C), > > + _INIT_DCS_CMD(0xC6, 0x2C), > > + _INIT_DCS_CMD(0xC7, 0x33), > > + _INIT_DCS_CMD(0xC8, 0x31), > > + _INIT_DCS_CMD(0xC9, 0x37), > > + _INIT_DCS_CMD(0xCA, 0x37), > > + _INIT_DCS_CMD(0xCB, 0x37), > > + _INIT_DCS_CMD(0xCC, 0x39), > > + _INIT_DCS_CMD(0xCD, 0x2E), > > + _INIT_DCS_CMD(0xCE, 0x2F), > > + _INIT_DCS_CMD(0xCF, 0x2F), > > + _INIT_DCS_CMD(0xD0, 0x07), > > + _INIT_DCS_CMD(0xD2, 0x00), > > + _INIT_DCS_CMD(0xD3, 0x0D), > > + _INIT_DCS_CMD(0xD4, 0x17), > > + _INIT_DCS_CMD(0xD5, 0x26), > > + _INIT_DCS_CMD(0xD6, 0x31), > > + _INIT_DCS_CMD(0xD7, 0x3F), > > + _INIT_DCS_CMD(0xD8, 0x3F), > > + _INIT_DCS_CMD(0xD9, 0x3F), > > + _INIT_DCS_CMD(0xDA, 0x3F), > > + _INIT_DCS_CMD(0xDB, 0x37), > > + _INIT_DCS_CMD(0xDC, 0x37), > > + _INIT_DCS_CMD(0xDD, 0x37), > > + _INIT_DCS_CMD(0xDE, 0x39), > > + _INIT_DCS_CMD(0xDF, 0x2E), > > + _INIT_DCS_CMD(0xE0, 0x2F), > > + _INIT_DCS_CMD(0xE1, 0x2F), > > + _INIT_DCS_CMD(0xE2, 0x07), > > + _INIT_DCS_CMD(0xB0, 0x03), > > + _INIT_DCS_CMD(0xC8, 0x0B), > > + _INIT_DCS_CMD(0xC9, 0x07), > > + _INIT_DCS_CMD(0xC3, 0x00), > > + _INIT_DCS_CMD(0xE7, 0x00), > > + _INIT_DCS_CMD(0xC5, 0x2A), > > + _INIT_DCS_CMD(0xDE, 0x2A), > > + _INIT_DCS_CMD(0xCA, 0x43), > > + _INIT_DCS_CMD(0xC9, 0x07), > > + _INIT_DCS_CMD(0xE4, 0xC0), > > + _INIT_DCS_CMD(0xE5, 0x0D), > > + _INIT_DCS_CMD(0xCB, 0x00), > > + _INIT_DCS_CMD(0xB0, 0x06), > > + _INIT_DCS_CMD(0xB8, 0xA5), > > + _INIT_DCS_CMD(0xC0, 0xA5), > > + _INIT_DCS_CMD(0xC7, 0x0F), > > + _INIT_DCS_CMD(0xD5, 0x32), > > + _INIT_DCS_CMD(0xB8, 0x00), > > + _INIT_DCS_CMD(0xC0, 0x00), > > + _INIT_DCS_CMD(0xBC, 0x00), > > + _INIT_DCS_CMD(0xB0, 0x07), > > + _INIT_DCS_CMD(0xB1, 0x00), > > + _INIT_DCS_CMD(0xB2, 0x02), > > + _INIT_DCS_CMD(0xB3, 0x0F), > > + _INIT_DCS_CMD(0xB4, 0x25), > > + _INIT_DCS_CMD(0xB5, 0x39), > > + _INIT_DCS_CMD(0xB6, 0x4E), > > + _INIT_DCS_CMD(0xB7, 0x72), > > + _INIT_DCS_CMD(0xB8, 0x97), > > + _INIT_DCS_CMD(0xB9, 0xDC), > > + _INIT_DCS_CMD(0xBA, 0x22), > > + _INIT_DCS_CMD(0xBB, 0xA4), > > + _INIT_DCS_CMD(0xBC, 0x2B), > > + _INIT_DCS_CMD(0xBD, 0x2F), > > + _INIT_DCS_CMD(0xBE, 0xA9), > > + _INIT_DCS_CMD(0xBF, 0x25), > > + _INIT_DCS_CMD(0xC0, 0x61), > > + _INIT_DCS_CMD(0xC1, 0x97), > > + _INIT_DCS_CMD(0xC2, 0xB2), > > + _INIT_DCS_CMD(0xC3, 0xCD), > > + _INIT_DCS_CMD(0xC4, 0xD9), > > + _INIT_DCS_CMD(0xC5, 0xE7), > > + _INIT_DCS_CMD(0xC6, 0xF4), > > + _INIT_DCS_CMD(0xC7, 0xFA), > > + _INIT_DCS_CMD(0xC8, 0xFC), > > + _INIT_DCS_CMD(0xC9, 0x00), > > + _INIT_DCS_CMD(0xCA, 0x00), > > + _INIT_DCS_CMD(0xCB, 0x16), > > + _INIT_DCS_CMD(0xCC, 0xAF), > > + _INIT_DCS_CMD(0xCD, 0xFF), > > + _INIT_DCS_CMD(0xCE, 0xFF), > > + _INIT_DCS_CMD(0xB0, 0x08), > > + _INIT_DCS_CMD(0xB1, 0x04), > > + _INIT_DCS_CMD(0xB2, 0x05), > > + _INIT_DCS_CMD(0xB3, 0x11), > > + _INIT_DCS_CMD(0xB4, 0x24), > > + _INIT_DCS_CMD(0xB5, 0x39), > > + _INIT_DCS_CMD(0xB6, 0x4F), > > + _INIT_DCS_CMD(0xB7, 0x72), > > + _INIT_DCS_CMD(0xB8, 0x98), > > + _INIT_DCS_CMD(0xB9, 0xDC), > > + _INIT_DCS_CMD(0xBA, 0x23), > > + _INIT_DCS_CMD(0xBB, 0xA6), > > + _INIT_DCS_CMD(0xBC, 0x2C), > > + _INIT_DCS_CMD(0xBD, 0x30), > > + _INIT_DCS_CMD(0xBE, 0xAA), > > + _INIT_DCS_CMD(0xBF, 0x26), > > + _INIT_DCS_CMD(0xC0, 0x62), > > + _INIT_DCS_CMD(0xC1, 0x9B), > > + _INIT_DCS_CMD(0xC2, 0xB5), > > + _INIT_DCS_CMD(0xC3, 0xCF), > > + _INIT_DCS_CMD(0xC4, 0xDB), > > + _INIT_DCS_CMD(0xC5, 0xE8), > > + _INIT_DCS_CMD(0xC6, 0xF5), > > + _INIT_DCS_CMD(0xC7, 0xFA), > > + _INIT_DCS_CMD(0xC8, 0xFC), > > + _INIT_DCS_CMD(0xC9, 0x00), > > + _INIT_DCS_CMD(0xCA, 0x00), > > + _INIT_DCS_CMD(0xCB, 0x16), > > + _INIT_DCS_CMD(0xCC, 0xAF), > > + _INIT_DCS_CMD(0xCD, 0xFF), > > + _INIT_DCS_CMD(0xCE, 0xFF), > > + _INIT_DCS_CMD(0xB0, 0x09), > > + _INIT_DCS_CMD(0xB1, 0x04), > > + _INIT_DCS_CMD(0xB2, 0x02), > > + _INIT_DCS_CMD(0xB3, 0x16), > > + _INIT_DCS_CMD(0xB4, 0x24), > > + _INIT_DCS_CMD(0xB5, 0x3B), > > + _INIT_DCS_CMD(0xB6, 0x4F), > > + _INIT_DCS_CMD(0xB7, 0x73), > > + _INIT_DCS_CMD(0xB8, 0x99), > > + _INIT_DCS_CMD(0xB9, 0xE0), > > + _INIT_DCS_CMD(0xBA, 0x26), > > + _INIT_DCS_CMD(0xBB, 0xAD), > > + _INIT_DCS_CMD(0xBC, 0x36), > > + _INIT_DCS_CMD(0xBD, 0x3A), > > + _INIT_DCS_CMD(0xBE, 0xAE), > > + _INIT_DCS_CMD(0xBF, 0x2A), > > + _INIT_DCS_CMD(0xC0, 0x66), > > + _INIT_DCS_CMD(0xC1, 0x9E), > > + _INIT_DCS_CMD(0xC2, 0xB8), > > + _INIT_DCS_CMD(0xC3, 0xD1), > > + _INIT_DCS_CMD(0xC4, 0xDD), > > + _INIT_DCS_CMD(0xC5, 0xE9), > > + _INIT_DCS_CMD(0xC6, 0xF6), > > + _INIT_DCS_CMD(0xC7, 0xFA), > > + _INIT_DCS_CMD(0xC8, 0xFC), > > + _INIT_DCS_CMD(0xC9, 0x00), > > + _INIT_DCS_CMD(0xCA, 0x00), > > + _INIT_DCS_CMD(0xCB, 0x16), > > + _INIT_DCS_CMD(0xCC, 0xAF), > > + _INIT_DCS_CMD(0xCD, 0xFF), > > + _INIT_DCS_CMD(0xCE, 0xFF), > > + _INIT_DCS_CMD(0xB0, 0x0A), > > + _INIT_DCS_CMD(0xB1, 0x00), > > + _INIT_DCS_CMD(0xB2, 0x02), > > + _INIT_DCS_CMD(0xB3, 0x0F), > > + _INIT_DCS_CMD(0xB4, 0x25), > > + _INIT_DCS_CMD(0xB5, 0x39), > > + _INIT_DCS_CMD(0xB6, 0x4E), > > + _INIT_DCS_CMD(0xB7, 0x72), > > + _INIT_DCS_CMD(0xB8, 0x97), > > + _INIT_DCS_CMD(0xB9, 0xDC), > > + _INIT_DCS_CMD(0xBA, 0x22), > > + _INIT_DCS_CMD(0xBB, 0xA4), > > + _INIT_DCS_CMD(0xBC, 0x2B), > > + _INIT_DCS_CMD(0xBD, 0x2F), > > + _INIT_DCS_CMD(0xBE, 0xA9), > > + _INIT_DCS_CMD(0xBF, 0x25), > > + _INIT_DCS_CMD(0xC0, 0x61), > > + _INIT_DCS_CMD(0xC1, 0x97), > > + _INIT_DCS_CMD(0xC2, 0xB2), > > + _INIT_DCS_CMD(0xC3, 0xCD), > > + _INIT_DCS_CMD(0xC4, 0xD9), > > + _INIT_DCS_CMD(0xC5, 0xE7), > > + _INIT_DCS_CMD(0xC6, 0xF4), > > + _INIT_DCS_CMD(0xC7, 0xFA), > > + _INIT_DCS_CMD(0xC8, 0xFC), > > + _INIT_DCS_CMD(0xC9, 0x00), > > + _INIT_DCS_CMD(0xCA, 0x00), > > + _INIT_DCS_CMD(0xCB, 0x16), > > + _INIT_DCS_CMD(0xCC, 0xAF), > > + _INIT_DCS_CMD(0xCD, 0xFF), > > + _INIT_DCS_CMD(0xCE, 0xFF), > > + _INIT_DCS_CMD(0xB0, 0x0B), > > + _INIT_DCS_CMD(0xB1, 0x04), > > + _INIT_DCS_CMD(0xB2, 0x05), > > + _INIT_DCS_CMD(0xB3, 0x11), > > + _INIT_DCS_CMD(0xB4, 0x24), > > + _INIT_DCS_CMD(0xB5, 0x39), > > + _INIT_DCS_CMD(0xB6, 0x4F), > > + _INIT_DCS_CMD(0xB7, 0x72), > > + _INIT_DCS_CMD(0xB8, 0x98), > > + _INIT_DCS_CMD(0xB9, 0xDC), > > + _INIT_DCS_CMD(0xBA, 0x23), > > + _INIT_DCS_CMD(0xBB, 0xA6), > > + _INIT_DCS_CMD(0xBC, 0x2C), > > + _INIT_DCS_CMD(0xBD, 0x30), > > + _INIT_DCS_CMD(0xBE, 0xAA), > > + _INIT_DCS_CMD(0xBF, 0x26), > > + _INIT_DCS_CMD(0xC0, 0x62), > > + _INIT_DCS_CMD(0xC1, 0x9B), > > + _INIT_DCS_CMD(0xC2, 0xB5), > > + _INIT_DCS_CMD(0xC3, 0xCF), > > + _INIT_DCS_CMD(0xC4, 0xDB), > > + _INIT_DCS_CMD(0xC5, 0xE8), > > + _INIT_DCS_CMD(0xC6, 0xF5), > > + _INIT_DCS_CMD(0xC7, 0xFA), > > + _INIT_DCS_CMD(0xC8, 0xFC), > > + _INIT_DCS_CMD(0xC9, 0x00), > > + _INIT_DCS_CMD(0xCA, 0x00), > > + _INIT_DCS_CMD(0xCB, 0x16), > > + _INIT_DCS_CMD(0xCC, 0xAF), > > + _INIT_DCS_CMD(0xCD, 0xFF), > > + _INIT_DCS_CMD(0xCE, 0xFF), > > + _INIT_DCS_CMD(0xB0, 0x0C), > > + _INIT_DCS_CMD(0xB1, 0x04), > > + _INIT_DCS_CMD(0xB2, 0x02), > > + _INIT_DCS_CMD(0xB3, 0x16), > > + _INIT_DCS_CMD(0xB4, 0x24), > > + _INIT_DCS_CMD(0xB5, 0x3B), > > + _INIT_DCS_CMD(0xB6, 0x4F), > > + _INIT_DCS_CMD(0xB7, 0x73), > > + _INIT_DCS_CMD(0xB8, 0x99), > > + _INIT_DCS_CMD(0xB9, 0xE0), > > + _INIT_DCS_CMD(0xBA, 0x26), > > + _INIT_DCS_CMD(0xBB, 0xAD), > > + _INIT_DCS_CMD(0xBC, 0x36), > > + _INIT_DCS_CMD(0xBD, 0x3A), > > + _INIT_DCS_CMD(0xBE, 0xAE), > > + _INIT_DCS_CMD(0xBF, 0x2A), > > + _INIT_DCS_CMD(0xC0, 0x66), > > + _INIT_DCS_CMD(0xC1, 0x9E), > > + _INIT_DCS_CMD(0xC2, 0xB8), > > + _INIT_DCS_CMD(0xC3, 0xD1), > > + _INIT_DCS_CMD(0xC4, 0xDD), > > + _INIT_DCS_CMD(0xC5, 0xE9), > > + _INIT_DCS_CMD(0xC6, 0xF6), > > + _INIT_DCS_CMD(0xC7, 0xFA), > > + _INIT_DCS_CMD(0xC8, 0xFC), > > + _INIT_DCS_CMD(0xC9, 0x00), > > + _INIT_DCS_CMD(0xCA, 0x00), > > + _INIT_DCS_CMD(0xCB, 0x16), > > + _INIT_DCS_CMD(0xCC, 0xAF), > > + _INIT_DCS_CMD(0xCD, 0xFF), > > + _INIT_DCS_CMD(0xCE, 0xFF), > > + _INIT_DCS_CMD(0xB0, 0x00), > > + _INIT_DCS_CMD(0xB3, 0x08), > > + _INIT_DCS_CMD(0xB0, 0x04), > > + _INIT_DCS_CMD(0xB8, 0x68), > > + _INIT_DELAY_CMD(150), > > + {}, > > +}; > > + > > +static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) > > +{ > > + return container_of(panel, struct boe_panel, base); > > +} > > + > > +static int boe_panel_init(struct boe_panel *boe) > > +{ > > + struct mipi_dsi_device *dsi = boe->dsi; > > + struct drm_panel *panel = &boe->base; > > + int err, i; > > + > > + if (boe->desc->init_cmds) { > > + const struct panel_init_cmd *init_cmds = boe->desc->init_cmds; > > + > > + for (i = 0; init_cmds[i].len != 0; i++) { > > + const struct panel_init_cmd *cmd = &init_cmds[i]; > > + > > + switch (cmd->type) { > > + case DELAY_CMD: > > + msleep(cmd->data[0]); > > + err = 0; > > + break; > > + > > + case INIT_DCS_CMD: > > + err = mipi_dsi_dcs_write(dsi, cmd->data[0], > > + cmd->len <= 1 ? NULL : > > + &cmd->data[1], > > + cmd->len - 1); > > + break; > > + } > > + > > + if (err < 0) { > > + dev_err(panel->dev, > > + "failed to write command %u\n", i); > > + return err; > > + } > > + } > > + } > > + return 0; > > +} > > + > > +static int boe_panel_off(struct boe_panel *boe) > > +{ > > + struct mipi_dsi_device *dsi = boe->dsi; > > + int ret; > > + > > + dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; > > + > > + ret = mipi_dsi_dcs_enter_sleep_mode(dsi); > > + if (ret < 0) > > + return ret; > > + > > + return 0; > > +} > > + > > +static int boe_panel_disable(struct drm_panel *panel) > > +{ > > + struct boe_panel *boe = to_boe_panel(panel); > > + > > + if (!boe->enabled) > > + return 0; > > + > > + backlight_disable(boe->backlight); > > + > > + boe->enabled = false; > > + > > + return 0; > > +} > > + > > +static int boe_panel_unprepare(struct drm_panel *panel) > > +{ > > + struct boe_panel *boe = to_boe_panel(panel); > > + int ret; > > + > > + if (!boe->prepared) > > + return 0; > > + > > + ret = boe_panel_off(boe); > > + if (ret < 0) { > > + dev_err(panel->dev, "failed to set panel off: %d\n", ret); > > + return ret; > > + } > > + > > + msleep(150); > > + if (boe->enable_gpio) > > + gpiod_set_value(boe->enable_gpio, 0); > > + usleep_range(500, 1000); > > + regulator_disable(boe->avee); > > + regulator_disable(boe->avdd); > > + usleep_range(5000, 7000); > > + regulator_disable(boe->pp1800); > > + > > + boe->prepared = false; > > + > > + return 0; > > +} > > + > > +static int boe_panel_prepare(struct drm_panel *panel) > > +{ > > + struct boe_panel *boe = to_boe_panel(panel); > > + int ret; > > + > > + if (boe->prepared) > > + return 0; > > + > > + if (boe->enable_gpio) { > > + gpiod_set_value(boe->enable_gpio, 0); > > + usleep_range(1000, 1500); > > + } > > + > > + ret = regulator_enable(boe->pp1800); > > + if (ret < 0) > > + return ret; > > + > > + usleep_range(3000, 5000); > > + > > + ret = regulator_enable(boe->avdd); > > + if (ret < 0) > > + goto poweroff1v8; > > + ret = regulator_enable(boe->avee); > > + if (ret < 0) > > + goto poweroffavdd; > > + > > + msleep(100); > > + > > + if (boe->enable_gpio) { > > + gpiod_set_value(boe->enable_gpio, 1); > > + usleep_range(10000, 12000); > > + } > > + > > + ret = boe_panel_init(boe); > > + if (ret < 0) { > > + dev_err(panel->dev, "failed to init panel: %d\n", ret); > > + goto poweroff; > > + } > > + > > + boe->prepared = true; > > + > > + return 0; > > + > > +poweroff: > > + regulator_disable(boe->avee); > > +poweroffavdd: > > + regulator_disable(boe->avdd); > > +poweroff1v8: > > + usleep_range(5000, 7000); > > + regulator_disable(boe->pp1800); > > + if (boe->enable_gpio) > > + gpiod_set_value(boe->enable_gpio, 0); > > + return ret; > > +} > > + > > +static int boe_panel_enable(struct drm_panel *panel) > > +{ > > + struct boe_panel *boe = to_boe_panel(panel); > > + int ret; > > + > > + if (boe->enabled) > > + return 0; > > + > > + ret = backlight_enable(boe->backlight); > > + if (ret) { > > + dev_err(panel->dev, "Failed to enable backlight %d\n", > > + ret); > > + return ret; > > + } > > + > > + boe->enabled = true; > > + > > + return 0; > > +} > > + > > +static const struct drm_display_mode boe_default_mode = { > > + .clock = 159425, > > + .hdisplay = 1200, > > + .hsync_start = 1200 + 100, > > + .hsync_end = 1200 + 100 + 40, > > + .htotal = 1200 + 100 + 40 + 24, > > + .vdisplay = 1920, > > + .vsync_start = 1920 + 10, > > + .vsync_end = 1920 + 10 + 14, > > + .vtotal = 1920 + 10 + 14 + 4, > > + .vrefresh = 60, > > + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > +}; > > + > > +static const struct panel_desc boe_tv101wum_nl6_desc = { > > + .modes = &boe_default_mode, > > + .bpc = 8, > > + .size = { > > + .width = 216, > > + .height = 135, This is wrong, as this is a portrait panel, should be: width=135, height=216. > > + }, > > + .lanes = 4, > > + .format = MIPI_DSI_FMT_RGB888, > > + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > + MIPI_DSI_MODE_LPM, > > + .init_cmds = boe_init_cmd, > > +}; > > + > > +static int boe_panel_get_modes(struct drm_panel *panel) > > +{ > > + struct boe_panel *boe = to_boe_panel(panel); > > + const struct drm_display_mode *m = boe->desc->modes; > > + struct drm_display_mode *mode; > > + > > + mode = drm_mode_duplicate(panel->drm, m); > > + if (!mode) { > > + dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > > + m->hdisplay, m->vdisplay, m->vrefresh); > > + return -ENOMEM; > > + } > > + > > + drm_mode_set_name(mode); > > + > > Sam suggested adding this here: > mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; Scrap that, I see that you added it in boe_default_mode. > > > + drm_mode_probed_add(panel->connector, mode); > > + > > + panel->connector->display_info.width_mm = boe->desc->size.width; > > + panel->connector->display_info.height_mm = boe->desc->size.height; > > + panel->connector->display_info.bpc = boe->desc->bpc; > > + > > + return 1; > > +} > > + > > +static const struct drm_panel_funcs boe_panel_funcs = { > > + .disable = boe_panel_disable, > > + .unprepare = boe_panel_unprepare, > > + .prepare = boe_panel_prepare, > > + .enable = boe_panel_enable, > > + .get_modes = boe_panel_get_modes, > > +}; > > + > > +static int boe_panel_add(struct boe_panel *boe) > > +{ > > + struct device *dev = &boe->dsi->dev; > > + > > + boe->avdd = devm_regulator_get(dev, "avdd"); > > + if (IS_ERR(boe->avdd)) > > + return PTR_ERR(boe->avdd); > > + > > + boe->avee = devm_regulator_get(dev, "avee"); > > + if (IS_ERR(boe->avee)) > > + return PTR_ERR(boe->avee); > > + > > + boe->pp1800 = devm_regulator_get(dev, "pp1800"); > > + if (IS_ERR(boe->pp1800)) > > + return PTR_ERR(boe->pp1800); > > + > > + boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW); > > + if (IS_ERR(boe->enable_gpio)) { > > + dev_err(dev, "cannot get reset-gpios %ld\n", > > + PTR_ERR(boe->enable_gpio)); > > + return PTR_ERR(boe->enable_gpio); > > + } > > + > > + gpiod_set_value(boe->enable_gpio, 0); > > + > > + boe->backlight = devm_of_find_backlight(dev); > > + if (IS_ERR(boe->backlight)) > > + return PTR_ERR(boe->backlight); > > + > > + drm_panel_init(&boe->base); > > + boe->base.funcs = &boe_panel_funcs; > > + boe->base.dev = &boe->dsi->dev; > > + > > + return drm_panel_add(&boe->base); > > +} > > + > > +static int boe_panel_probe(struct mipi_dsi_device *dsi) > > +{ > > + struct boe_panel *boe; > > + int ret; > > + const struct panel_desc *desc; > > + > > + boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL); > > + if (!boe) > > + return -ENOMEM; > > + > > + desc = of_device_get_match_data(&dsi->dev); > > + dsi->lanes = desc->lanes; > > + dsi->format = desc->format; > > + dsi->mode_flags = desc->mode_flags; > > + boe->desc = desc; > > + boe->dsi = dsi; > > + ret = boe_panel_add(boe); > > + if (ret < 0) > > + return ret; > > + > > + mipi_dsi_set_drvdata(dsi, boe); > > + > > + return mipi_dsi_attach(dsi); > > +} > > + > > +static int boe_panel_remove(struct mipi_dsi_device *dsi) > > +{ > > + struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); > > + int ret; > > + > > + ret = boe_panel_disable(&boe->base); > > + if (ret < 0) > > + dev_err(&dsi->dev, "failed to disable panel: %d\n", ret); > > + > > + ret = mipi_dsi_detach(dsi); > > + if (ret < 0) > > + dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); > > + > > + if (boe->base.dev) > > + drm_panel_remove(&boe->base); > > + > > + return 0; > > +} > > + > > +static void boe_panel_shutdown(struct mipi_dsi_device *dsi) > > +{ > > + struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); > > + > > + boe_panel_disable(&boe->base); > > +} > > + > > +static const struct of_device_id boe_of_match[] = { > > + { .compatible = "boe,tv101wum-nl6", > > + .data = &boe_tv101wum_nl6_desc > > + }, > > + { /* sentinel */ } > > +}; > > +MODULE_DEVICE_TABLE(of, boe_of_match); > > + > > +static struct mipi_dsi_driver boe_panel_driver = { > > + .driver = { > > + .name = "panel-boe-tv101wum-nl6", > > + .of_match_table = boe_of_match, > > + }, > > + .probe = boe_panel_probe, > > + .remove = boe_panel_remove, > > + .shutdown = boe_panel_shutdown, > > +}; > > +module_mipi_dsi_driver(boe_panel_driver); > > + > > +MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>"); > > +MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver"); > > +MODULE_LICENSE("GPL v2"); > > -- > > 2.21.0 > > > > _______________________________________________ > > dri-devel mailing list > > dri-devel@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel 2019-06-24 6:03 ` [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel Jitao Shi 2019-06-24 8:25 ` Nicolas Boichat @ 2019-06-26 3:27 ` Hsin-Yi Wang 1 sibling, 0 replies; 6+ messages in thread From: Hsin-Yi Wang @ 2019-06-26 3:27 UTC (permalink / raw) To: Jitao Shi Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, linux-pwm, David Airlie, Matthias Brugger, stonea168, dri-devel, Andy Yan, Ajay Kumar, Vincent Palatin, cawa.cheng, bibby.hsieh, CK Hu, Russell King, Thierry Reding, devicetree, Philipp Zabel, Inki Dae, linux-mediatek, yingjoe.chen, eddie.huang, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE, Rahul Sharma, srv_heupstream, lkml, Sascha Hauer, Sean Paul On Mon, Jun 24, 2019 at 6:03 AM Jitao Shi <jitao.shi@mediatek.com> wrote: There are some error when unbinding this driver, `` echo 14014000.dsi.0 > /sys/bus/mipi-dsi/drivers/panel-boe-tv101wum-nl6/unbind `` [ 40.404393] WARNING: CPU: 1 PID: 2612 at /mnt/host/source/src/third_party/kernel/v4.19/drivers/regulator/core.c:2054 _regulator_put+0xe4/0xec [ 40.417098] Modules linked in: rfcomm uinput thermal_generic_adc hci_uart btqca bluetooth ecdh_generic mtk_scp mtk_rpmsg mtk_scp_ipi bridge rpmsg_core mt6577_auxadc stp llc nf_nat_tftp nv [ 40.471107] CPU: 1 PID: 2612 Comm: bash Tainted: G S 4.19.53 #99 [ 40.478410] Hardware name: MediaTek krane rev3 sku16 board (DT) [ 40.484327] pstate: 80000005 (Nzcv daif -PAN -UAO) [ 40.489118] pc : _regulator_put+0xe4/0xec [ 40.493127] lr : regulator_put+0x2c/0x40 [ 40.497044] sp : ffffff800cef3b00 [ 40.500354] x29: ffffff800cef3b10 x28: fffffff0e7a22a00 [ 40.505667] x27: 0000000000000000 x26: fffffff13876fc00 [ 40.510979] x25: ffffff800cef3b68 x24: ffffff91f0b92000 [ 40.516291] x23: ffffff91f03f2917 x22: ffffff91f0453a1c [ 40.521604] x21: fffffff13876fe00 x20: ffffff91f0a80988 [ 40.526916] x19: fffffff13876ff00 x18: 0000000000000000 [ 40.532229] x17: 0000000000000000 x16: 0000000000000000 [ 40.537541] x15: 0000000000000000 x14: 0000000000000000 [ 40.542854] x13: 0000000000000010 x12: 0000000000000000 [ 40.548166] x11: 0000000000000000 x10: 0000000000000000 [ 40.553478] x9 : fffffff0e7a22a00 x8 : 0000000000000001 [ 40.558789] x7 : 0004be4200000000 x6 : 0000000042be0400 [ 40.564102] x5 : ffffff91f043a5ef x4 : ffffff91f043a5ef [ 40.569414] x3 : 0000000000000000 x2 : 0000000000000000 [ 40.574726] x1 : 00000000000000fe x0 : fffffff13876ff00 [ 40.580040] Call trace: [ 40.582488] _regulator_put+0xe4/0xec [ 40.586148] regulator_put+0x2c/0x40 [ 40.589724] devm_regulator_release+0x1c/0x28 [ 40.594084] release_nodes+0x1f0/0x244 [ 40.597832] devres_release_all+0x3c/0x54 [ 40.601840] device_release_driver_internal+0x148/0x1ec [ 40.607061] device_release_driver+0x24/0x30 [ 40.611328] unbind_store+0x90/0xdc [ 40.614814] drv_attr_store+0x3c/0x54 [ 40.618478] sysfs_kf_write+0x50/0x68 [ 40.622137] kernfs_fop_write+0x12c/0x1c8 [ 40.626146] __vfs_write+0x54/0x15c [ 40.629631] vfs_write+0xcc/0x188 [ 40.632943] ksys_write+0x78/0xd8 [ 40.636255] __arm64_sys_write+0x20/0x2c [ 40.640181] el0_svc_common+0xa4/0x154 [ 40.643928] el0_svc_compat_handler+0x2c/0x38 [ 40.648283] el0_svc_compat+0x8/0x18 [ 40.651855] ---[ end trace 65d8c8e7436ab6e9 ]--- [ 40.656765] panel-boe-tv101wum-nl6 14014000.dsi.0: Dropping the link to regulator.8 [ 40.664649] WARNING: CPU: 6 PID: 2612 at /mnt/host/source/src/third_party/kernel/v4.19/drivers/regulator/core.c:2054 _regulator_put+0xe4/0xec [ 40.677335] Modules linked in: rfcomm uinput thermal_generic_adc hci_uart btqca bluetooth ecdh_generic mtk_scp mtk_rpmsg mtk_scp_ipi bridge rpmsg_core mt6577_auxadc stp llc nf_nat_tftp nv [ 40.731273] CPU: 6 PID: 2612 Comm: bash Tainted: G S W 4.19.53 #99 [ 40.738574] Hardware name: MediaTek krane rev3 sku16 board (DT) [ 40.744488] pstate: 80000005 (Nzcv daif -PAN -UAO) [ 40.749276] pc : _regulator_put+0xe4/0xec [ 40.753282] lr : regulator_put+0x2c/0x40 [ 40.757197] sp : ffffff800cef3b00 [ 40.760505] x29: ffffff800cef3b10 x28: fffffff0e7a22a00 [ 40.765814] x27: 0000000000000000 x26: fffffff13876fa00 [ 40.771122] x25: ffffff800cef3b68 x24: ffffff91f0b92000 [ 40.776429] x23: ffffff91f03f2917 x22: ffffff91f0453a1c [ 40.781736] x21: fffffff13876fc00 x20: ffffff91f0a80988 [ 40.787044] x19: fffffff13876fd00 x18: 0000000000000020 [ 40.792351] x17: 0000000000000001 x16: 0000000000000000 [ 40.797658] x15: 0000000000000000 x14: 00000000000003f1 [ 40.802966] x13: 0000000000000004 x12: 000000001f80c232 [ 40.808272] x11: 0000000000000000 x10: 0000000000000001 [ 40.813580] x9 : 7ee042d282bebd00 x8 : 0000000000000001 [ 40.818887] x7 : fefeff2f2f37306f x6 : 0000000000000000 [ 40.824194] x5 : 0000000000000000 x4 : ffffff91f0143fdc [ 40.829501] x3 : 0000000000000000 x2 : 0000000000000000 [ 40.834809] x1 : 000000000000038c x0 : fffffff13876fd00 [ 40.840116] Call trace: [ 40.842560] _regulator_put+0xe4/0xec [ 40.846218] regulator_put+0x2c/0x40 [ 40.849791] devm_regulator_release+0x1c/0x28 [ 40.854148] release_nodes+0x1f0/0x244 [ 40.857892] devres_release_all+0x3c/0x54 [ 40.861898] device_release_driver_internal+0x148/0x1ec [ 40.867116] device_release_driver+0x24/0x30 [ 40.871380] unbind_store+0x90/0xdc [ 40.874863] drv_attr_store+0x3c/0x54 [ 40.878524] sysfs_kf_write+0x50/0x68 [ 40.882180] kernfs_fop_write+0x12c/0x1c8 [ 40.886186] __vfs_write+0x54/0x15c [ 40.889668] vfs_write+0xcc/0x188 [ 40.892978] ksys_write+0x78/0xd8 [ 40.896287] __arm64_sys_write+0x20/0x2c [ 40.900208] el0_svc_common+0xa4/0x154 [ 40.903951] el0_svc_compat_handler+0x2c/0x38 [ 40.908302] el0_svc_compat+0x8/0x18 [ 40.911871] ---[ end trace 65d8c8e7436ab6ea ]--- [ 40.916642] panel-boe-tv101wum-nl6 14014000.dsi.0: Dropping the link to regulator.7 [ 40.924511] WARNING: CPU: 6 PID: 2612 at /mnt/host/source/src/third_party/kernel/v4.19/drivers/regulator/core.c:2054 _regulator_put+0xe4/0xec [ 40.937193] Modules linked in: rfcomm uinput thermal_generic_adc hci_uart btqca bluetooth ecdh_generic mtk_scp mtk_rpmsg mtk_scp_ipi bridge rpmsg_core mt6577_auxadc stp llc nf_nat_tftp nv [ 40.991108] CPU: 6 PID: 2612 Comm: bash Tainted: G S W 4.19.53 #99 [ 40.998407] Hardware name: MediaTek krane rev3 sku16 board (DT) [ 41.004320] pstate: 80000005 (Nzcv daif -PAN -UAO) [ 41.009105] pc : _regulator_put+0xe4/0xec [ 41.013109] lr : regulator_put+0x2c/0x40 [ 41.017022] sp : ffffff800cef3b00 [ 41.020329] x29: ffffff800cef3b10 x28: fffffff0e7a22a00 [ 41.025636] x27: 0000000000000000 x26: fffffff13876f900 [ 41.030942] x25: ffffff800cef3b68 x24: ffffff91f0b92000 [ 41.036248] x23: ffffff91f03f2917 x22: ffffff91f0453a1c [ 41.041554] x21: fffffff13876fa00 x20: ffffff91f0a80988 [ 41.046859] x19: fffffff13876fb00 x18: 0000000000000020 [ 41.052166] x17: 0000000000000001 x16: 0000000000000000 [ 41.057472] x15: 00000000ffffffff x14: 00000000000002e3 [ 41.062778] x13: 0000000000000000 x12: 0000000000000000 [ 41.068084] x11: 0000000000000000 x10: 00000000ffffffff [ 41.073389] x9 : 7ee042d282bebd00 x8 : 0000000000000001 [ 41.078696] x7 : 0000000000000000 x6 : ffffff800cef37f0 [ 41.084002] x5 : 0000000000000040 x4 : 0000000000000000 [ 41.089307] x3 : 0000000000000000 x2 : fffffff0e7a22ac0 [ 41.094613] x1 : 0000000000000000 x0 : fffffff13876fb00 [ 41.099918] Call trace: [ 41.102361] _regulator_put+0xe4/0xec [ 41.106017] regulator_put+0x2c/0x40 [ 41.109587] devm_regulator_release+0x1c/0x28 [ 41.113939] release_nodes+0x1f0/0x244 [ 41.117683] devres_release_all+0x3c/0x54 [ 41.121686] device_release_driver_internal+0x148/0x1ec [ 41.126904] device_release_driver+0x24/0x30 [ 41.131167] unbind_store+0x90/0xdc [ 41.134649] drv_attr_store+0x3c/0x54 [ 41.138308] sysfs_kf_write+0x50/0x68 [ 41.141962] kernfs_fop_write+0x12c/0x1c8 [ 41.145965] __vfs_write+0x54/0x15c [ 41.149446] vfs_write+0xcc/0x188 [ 41.152754] ksys_write+0x78/0xd8 [ 41.156061] __arm64_sys_write+0x20/0x2c [ 41.159979] el0_svc_common+0xa4/0x154 [ 41.163722] el0_svc_compat_handler+0x2c/0x38 [ 41.168072] el0_svc_compat+0x8/0x18 [ 41.171640] ---[ end trace 65d8c8e7436ab6eb ]--- [ 41.176405] panel-boe-tv101wum-nl6 14014000.dsi.0: Dropping the link to regulator.6 Also, sometimes when rebinding the driver `` echo 14014000.dsi.0 > /sys/bus/mipi-dsi/drivers/panel-boe-tv101wum-nl6/bind `` UI still failed to show up. ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-06-26 3:30 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-06-24 6:03 [v2 0/2] Add BOE tv101wum-nl6 panel driver Jitao Shi 2019-06-24 6:03 ` [v2 1/2] dt-bindngs: display: panel: Add BOE tv101wum-n16 panel bindings Jitao Shi 2019-06-24 6:03 ` [v2 2/2] drm/panel: support for BOE tv101wum-nl6 wuxga dsi video mode panel Jitao Shi 2019-06-24 8:25 ` Nicolas Boichat 2019-06-25 0:42 ` Nicolas Boichat 2019-06-26 3:27 ` Hsin-Yi Wang
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