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From: Fabio Estevam <festevam@gmail.com>
To: Abel Vesa <abel.vesa@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>,
	Sascha Hauer <kernel@pengutronix.de>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Anson Huang <anson.huang@nxp.com>,
	Andrey Smirnov <andrew.smirnov@gmail.com>,
	Rob Herring <robh@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
	Abel Vesa <abelvesa@linux.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v9 4/5] clk: imx: add imx composite clock
Date: Tue, 25 Sep 2018 13:42:12 -0300	[thread overview]
Message-ID: <CAOMZO5D7yLUzriOub4RWsq1K8_fTj6c0LFOnSZwHyjqMPYu=0A@mail.gmail.com> (raw)
In-Reply-To: <1537785597-26499-5-git-send-email-abel.vesa@nxp.com>

Hi Abel,

On Mon, Sep 24, 2018 at 7:39 AM, Abel Vesa <abel.vesa@nxp.com> wrote:

> +static long imx_clk_composite_divider_round_rate(struct clk_hw *hw,
> +                                               unsigned long rate,
> +                                               unsigned long *prate)
> +{
> +       int prediv_value;
> +       int div_value;
> +
> +       imx_clk_composite_compute_dividers(rate, *prate,
> +                                               &prediv_value, &div_value);
> +
> +       rate = DIV_ROUND_UP_ULL((u64)*prate, prediv_value);

You assing a value to 'rate' here.

> +       rate = DIV_ROUND_UP_ULL((u64)rate, div_value);

And then overwrite it immediately after.

Is this really the intended behavior?

  reply	other threads:[~2018-09-25 16:42 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1537785597-26499-1-git-send-email-abel.vesa@nxp.com>
2018-09-24 10:39 ` [PATCH v9 1/5] dt-bindings: add binding for i.MX8MQ CCM Abel Vesa
2018-10-17 20:00   ` Stephen Boyd
2018-09-24 10:39 ` [PATCH v9 2/5] clk: imx: add fractional PLL output clock Abel Vesa
2018-10-17 19:59   ` Stephen Boyd
2018-11-07 12:25     ` Abel Vesa
2018-09-24 10:39 ` [PATCH v9 3/5] clk: imx: add SCCG PLL type Abel Vesa
2018-10-17 19:55   ` Stephen Boyd
2018-11-07 11:54     ` Abel Vesa
2018-11-07 19:01       ` Stephen Boyd
2018-11-07 20:26         ` Abel Vesa
2018-11-08  0:18           ` Stephen Boyd
2018-11-08 12:29             ` Abel Vesa
2018-11-08 18:28               ` Stephen Boyd
2018-11-10 16:05                 ` A.s. Dong
2018-11-13 14:25                   ` Shawn Guo
2018-11-14 23:21                     ` Stephen Boyd
2018-09-24 10:39 ` [PATCH v9 4/5] clk: imx: add imx composite clock Abel Vesa
2018-09-25 16:42   ` Fabio Estevam [this message]
2018-09-26  6:47     ` Sascha Hauer
2018-09-26 12:02       ` Fabio Estevam
2018-10-17 19:51   ` Stephen Boyd
2018-10-18  9:57     ` Abel Vesa
2018-09-24 10:39 ` [PATCH v9 5/5] clk: imx: add clock driver for i.MX8MQ CCM Abel Vesa
2018-10-17 19:44   ` Stephen Boyd
2018-11-07 12:09     ` Abel Vesa

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