[PATCH 1/2] dt-bindings: mmc: sdhci-msm: correct minimum number of clocks

[PATCH 1/2] dt-bindings: mmc: sdhci-msm: correct minimum number of clocks

[Krzysztof Kozlowski]

In the TXT binding before conversion, the "xo" clock was listed as
optional.  Conversion kept it optional in "clock-names", but not in
"clocks".  This fixes dbts_check warnings like:

  qcom-sdx65-mtp.dtb: mmc@8804000: clocks: [[13, 59], [13, 58]] is too short

Cc: <stable@vger.kernel.org>
Fixes: a45537723f4b ("dt-bindings: mmc: sdhci-msm: Convert bindings to yaml")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 80141eb7fc6b..10f34aa8ba8a 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -69,7 +69,7 @@ properties:
     maxItems: 4
 
   clocks:
-    minItems: 3
+    minItems: 2
     items:
       - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
       - description: SDC MMC clock, MCLK
-- 
2.34.1

[PATCH 2/2] dt-bindings: mmc: sdhci-msm: allow flexible order of optional clocks

[Krzysztof Kozlowski]

The Qualcomm SDHCI controller lists optional clocks, but still expects
fixed order of them and does not allow to skip such clocks if further
one in the list is needed.  These optional clocks are truly optional,
so we need to allow the list to have different orders.  The clocks are:
 - ice: used for Inline Crypto Engine, which is actually separate block
   and merging it with SDHCI is not a requirement,
 - bus: clock for SDCC bus frequency voting,
 - cal and sleep: used for RCLK delay calibration and required for
   certain platforms for such calibration (as expressed in original
   commit 4946b3af5e8e ("mmc: sdhci-msm: Enable delay circuit
   calibration clocks")).  Only MSM8974pro has these clocks.

Relaxing the order fixes dtbs_check warnings:

  qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:3: 'ice' was expected
  qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:4: 'bus' was expected

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 10f34aa8ba8a..69a213965089 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -85,10 +85,10 @@ properties:
       - const: iface
       - const: core
       - const: xo
-      - const: ice
-      - const: bus
-      - const: cal
-      - const: sleep
+      - enum: [ice, bus, cal, sleep]
+      - enum: [ice, bus, cal, sleep]
+      - enum: [ice, bus, cal, sleep]
+      - enum: [ice, bus, cal, sleep]
 
   dma-coherent: true
 
-- 
2.34.1

Re: [PATCH 1/2] dt-bindings: mmc: sdhci-msm: correct minimum number of clocks

[Conor Dooley]

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On Fri, Aug 25, 2023 at 03:55:02PM +0200, Krzysztof Kozlowski wrote:
> In the TXT binding before conversion, the "xo" clock was listed as
> optional.  Conversion kept it optional in "clock-names", but not in
> "clocks".  This fixes dbts_check warnings like:
> 
>   qcom-sdx65-mtp.dtb: mmc@8804000: clocks: [[13, 59], [13, 58]] is too short
> 
> Cc: <stable@vger.kernel.org>
> Fixes: a45537723f4b ("dt-bindings: mmc: sdhci-msm: Convert bindings to yaml")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 80141eb7fc6b..10f34aa8ba8a 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -69,7 +69,7 @@ properties:
>      maxItems: 4
>  
>    clocks:
> -    minItems: 3
> +    minItems: 2
>      items:
>        - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
>        - description: SDC MMC clock, MCLK
> -- 
> 2.34.1
> 

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Re: [PATCH 2/2] dt-bindings: mmc: sdhci-msm: allow flexible order of optional clocks

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2040 bytes --]

On Fri, Aug 25, 2023 at 03:55:03PM +0200, Krzysztof Kozlowski wrote:
> The Qualcomm SDHCI controller lists optional clocks, but still expects
> fixed order of them and does not allow to skip such clocks if further
> one in the list is needed.  These optional clocks are truly optional,
> so we need to allow the list to have different orders.  The clocks are:
>  - ice: used for Inline Crypto Engine, which is actually separate block
>    and merging it with SDHCI is not a requirement,
>  - bus: clock for SDCC bus frequency voting,
>  - cal and sleep: used for RCLK delay calibration and required for
>    certain platforms for such calibration (as expressed in original
>    commit 4946b3af5e8e ("mmc: sdhci-msm: Enable delay circuit
>    calibration clocks")).  Only MSM8974pro has these clocks.
> 
> Relaxing the order fixes dtbs_check warnings:
> 
>   qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:3: 'ice' was expected
>   qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:4: 'bus' was expected
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 10f34aa8ba8a..69a213965089 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -85,10 +85,10 @@ properties:
>        - const: iface
>        - const: core
>        - const: xo
> -      - const: ice
> -      - const: bus
> -      - const: cal
> -      - const: sleep
> +      - enum: [ice, bus, cal, sleep]
> +      - enum: [ice, bus, cal, sleep]
> +      - enum: [ice, bus, cal, sleep]
> +      - enum: [ice, bus, cal, sleep]
>  
>    dma-coherent: true
>  
> -- 
> 2.34.1
> 

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Re: [PATCH 1/2] dt-bindings: mmc: sdhci-msm: correct minimum number of clocks

[Ulf Hansson]

On Fri, 25 Aug 2023 at 15:55, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> In the TXT binding before conversion, the "xo" clock was listed as
> optional.  Conversion kept it optional in "clock-names", but not in
> "clocks".  This fixes dbts_check warnings like:
>
>   qcom-sdx65-mtp.dtb: mmc@8804000: clocks: [[13, 59], [13, 58]] is too short
>
> Cc: <stable@vger.kernel.org>
> Fixes: a45537723f4b ("dt-bindings: mmc: sdhci-msm: Convert bindings to yaml")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Applied for fixes, thanks!

Kind regards
Uffe


> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 80141eb7fc6b..10f34aa8ba8a 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -69,7 +69,7 @@ properties:
>      maxItems: 4
>
>    clocks:
> -    minItems: 3
> +    minItems: 2
>      items:
>        - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
>        - description: SDC MMC clock, MCLK
> --
> 2.34.1
>

Re: [PATCH 2/2] dt-bindings: mmc: sdhci-msm: allow flexible order of optional clocks

[Ulf Hansson]

On Fri, 25 Aug 2023 at 15:55, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> The Qualcomm SDHCI controller lists optional clocks, but still expects
> fixed order of them and does not allow to skip such clocks if further
> one in the list is needed.  These optional clocks are truly optional,
> so we need to allow the list to have different orders.  The clocks are:
>  - ice: used for Inline Crypto Engine, which is actually separate block
>    and merging it with SDHCI is not a requirement,
>  - bus: clock for SDCC bus frequency voting,
>  - cal and sleep: used for RCLK delay calibration and required for
>    certain platforms for such calibration (as expressed in original
>    commit 4946b3af5e8e ("mmc: sdhci-msm: Enable delay circuit
>    calibration clocks")).  Only MSM8974pro has these clocks.
>
> Relaxing the order fixes dtbs_check warnings:
>
>   qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:3: 'ice' was expected
>   qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:4: 'bus' was expected
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 10f34aa8ba8a..69a213965089 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -85,10 +85,10 @@ properties:
>        - const: iface
>        - const: core
>        - const: xo
> -      - const: ice
> -      - const: bus
> -      - const: cal
> -      - const: sleep
> +      - enum: [ice, bus, cal, sleep]
> +      - enum: [ice, bus, cal, sleep]
> +      - enum: [ice, bus, cal, sleep]
> +      - enum: [ice, bus, cal, sleep]
>
>    dma-coherent: true
>
> --
> 2.34.1
>