[PATCH v2 1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically

[PATCH v2 1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically

[Krzysztof Kozlowski]

Order top-level nodes like memory, reserved-memory, opp-table-cpu
alphabetically for easier code maintenance.  No functional change (same
dtx_diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

---

Changes since v1:
1. New patch
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 144 +++++++++++++--------------
 1 file changed, 72 insertions(+), 72 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index ea886cf08b4d..6d3e86ce2936 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -27,8 +27,6 @@ / {
 	#address-cells = <2>;
 	#size-cells = <2>;
 
-	chosen { };
-
 	aliases {
 		mmc1 = &sdhc_1;
 		mmc2 = &sdhc_2;
@@ -54,6 +52,8 @@ aliases {
 		spi11 = &spi11;
 	};
 
+	chosen { };
+
 	clocks {
 		xo_board: xo-board {
 			compatible = "fixed-clock";
@@ -68,62 +68,6 @@ sleep_clk: sleep-clk {
 		};
 	};
 
-	reserved_memory: reserved-memory {
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-
-		hyp_mem: memory@80000000 {
-			reg = <0x0 0x80000000 0x0 0x600000>;
-			no-map;
-		};
-
-		xbl_mem: memory@80600000 {
-			reg = <0x0 0x80600000 0x0 0x200000>;
-			no-map;
-		};
-
-		aop_mem: memory@80800000 {
-			reg = <0x0 0x80800000 0x0 0x20000>;
-			no-map;
-		};
-
-		aop_cmd_db_mem: memory@80820000 {
-			reg = <0x0 0x80820000 0x0 0x20000>;
-			compatible = "qcom,cmd-db";
-			no-map;
-		};
-
-		sec_apps_mem: memory@808ff000 {
-			reg = <0x0 0x808ff000 0x0 0x1000>;
-			no-map;
-		};
-
-		smem_mem: memory@80900000 {
-			reg = <0x0 0x80900000 0x0 0x200000>;
-			no-map;
-		};
-
-		tz_mem: memory@80b00000 {
-			reg = <0x0 0x80b00000 0x0 0x3900000>;
-			no-map;
-		};
-
-		ipa_fw_mem: memory@8b700000 {
-			reg = <0 0x8b700000 0 0x10000>;
-			no-map;
-		};
-
-		rmtfs_mem: memory@94600000 {
-			compatible = "qcom,rmtfs-mem";
-			reg = <0x0 0x94600000 0x0 0x200000>;
-			no-map;
-
-			qcom,client-id = <1>;
-			qcom,vmid = <15>;
-		};
-	};
-
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -398,6 +342,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
 		};
 	};
 
+	firmware {
+		scm {
+			compatible = "qcom,scm-sc7180", "qcom,scm";
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		/* We expect the bootloader to fill in the size */
+		reg = <0 0x80000000 0 0>;
+	};
+
 	cpu0_opp_table: opp-table-cpu0 {
 		compatible = "operating-points-v2";
 		opp-shared;
@@ -538,20 +494,69 @@ cpu6_opp16: opp-2553600000 {
 		};
 	};
 
-	memory@80000000 {
-		device_type = "memory";
-		/* We expect the bootloader to fill in the size */
-		reg = <0 0x80000000 0 0>;
-	};
-
 	pmu {
 		compatible = "arm,armv8-pmuv3";
 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
-	firmware {
-		scm {
-			compatible = "qcom,scm-sc7180", "qcom,scm";
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	reserved_memory: reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		hyp_mem: memory@80000000 {
+			reg = <0x0 0x80000000 0x0 0x600000>;
+			no-map;
+		};
+
+		xbl_mem: memory@80600000 {
+			reg = <0x0 0x80600000 0x0 0x200000>;
+			no-map;
+		};
+
+		aop_mem: memory@80800000 {
+			reg = <0x0 0x80800000 0x0 0x20000>;
+			no-map;
+		};
+
+		aop_cmd_db_mem: memory@80820000 {
+			reg = <0x0 0x80820000 0x0 0x20000>;
+			compatible = "qcom,cmd-db";
+			no-map;
+		};
+
+		sec_apps_mem: memory@808ff000 {
+			reg = <0x0 0x808ff000 0x0 0x1000>;
+			no-map;
+		};
+
+		smem_mem: memory@80900000 {
+			reg = <0x0 0x80900000 0x0 0x200000>;
+			no-map;
+		};
+
+		tz_mem: memory@80b00000 {
+			reg = <0x0 0x80b00000 0x0 0x3900000>;
+			no-map;
+		};
+
+		ipa_fw_mem: memory@8b700000 {
+			reg = <0 0x8b700000 0 0x10000>;
+			no-map;
+		};
+
+		rmtfs_mem: memory@94600000 {
+			compatible = "qcom,rmtfs-mem";
+			reg = <0x0 0x94600000 0x0 0x200000>;
+			no-map;
+
+			qcom,client-id = <1>;
+			qcom,vmid = <15>;
 		};
 	};
 
@@ -640,11 +645,6 @@ ipa_smp2p_in: ipa-modem-to-ap {
 		};
 	};
 
-	psci {
-		compatible = "arm,psci-1.0";
-		method = "smc";
-	};
-
 	soc: soc@0 {
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
2.34.1

[PATCH v2 2/6] arm64: dts: qcom: sdm845: order top-level nodes alphabetically

[Krzysztof Kozlowski]

Order top-level nodes like memory, reserved-memory, opp-table-cpu
alphabetically for easier code maintenance.  No functional change (same
dtx_diff, except phandle changes).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

---

Changes since v1:
1. New patch
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 384 +++++++++++++--------------
 1 file changed, 192 insertions(+), 192 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index a63dbd12230f..88e7d4061aae 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -69,122 +69,18 @@ aliases {
 
 	chosen { };
 
-	memory@80000000 {
-		device_type = "memory";
-		/* We expect the bootloader to fill in the size */
-		reg = <0 0x80000000 0 0>;
-	};
-
-	reserved-memory {
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-
-		hyp_mem: hyp-mem@85700000 {
-			reg = <0 0x85700000 0 0x600000>;
-			no-map;
-		};
-
-		xbl_mem: xbl-mem@85e00000 {
-			reg = <0 0x85e00000 0 0x100000>;
-			no-map;
-		};
-
-		aop_mem: aop-mem@85fc0000 {
-			reg = <0 0x85fc0000 0 0x20000>;
-			no-map;
-		};
-
-		aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 {
-			compatible = "qcom,cmd-db";
-			reg = <0x0 0x85fe0000 0 0x20000>;
-			no-map;
-		};
-
-		smem@86000000 {
-			compatible = "qcom,smem";
-			reg = <0x0 0x86000000 0 0x200000>;
-			no-map;
-			hwlocks = <&tcsr_mutex 3>;
-		};
-
-		tz_mem: tz@86200000 {
-			reg = <0 0x86200000 0 0x2d00000>;
-			no-map;
-		};
-
-		rmtfs_mem: rmtfs@88f00000 {
-			compatible = "qcom,rmtfs-mem";
-			reg = <0 0x88f00000 0 0x200000>;
-			no-map;
-
-			qcom,client-id = <1>;
-			qcom,vmid = <15>;
-		};
-
-		qseecom_mem: qseecom@8ab00000 {
-			reg = <0 0x8ab00000 0 0x1400000>;
-			no-map;
-		};
-
-		camera_mem: camera-mem@8bf00000 {
-			reg = <0 0x8bf00000 0 0x500000>;
-			no-map;
-		};
-
-		ipa_fw_mem: ipa-fw@8c400000 {
-			reg = <0 0x8c400000 0 0x10000>;
-			no-map;
-		};
-
-		ipa_gsi_mem: ipa-gsi@8c410000 {
-			reg = <0 0x8c410000 0 0x5000>;
-			no-map;
-		};
-
-		gpu_mem: gpu@8c415000 {
-			reg = <0 0x8c415000 0 0x2000>;
-			no-map;
-		};
-
-		adsp_mem: adsp@8c500000 {
-			reg = <0 0x8c500000 0 0x1a00000>;
-			no-map;
-		};
-
-		wlan_msa_mem: wlan-msa@8df00000 {
-			reg = <0 0x8df00000 0 0x100000>;
-			no-map;
-		};
-
-		mpss_region: mpss@8e000000 {
-			reg = <0 0x8e000000 0 0x7800000>;
-			no-map;
-		};
-
-		venus_mem: venus@95800000 {
-			reg = <0 0x95800000 0 0x500000>;
-			no-map;
-		};
-
-		cdsp_mem: cdsp@95d00000 {
-			reg = <0 0x95d00000 0 0x800000>;
-			no-map;
-		};
-
-		mba_region: mba@96500000 {
-			reg = <0 0x96500000 0 0x200000>;
-			no-map;
-		};
-
-		slpi_mem: slpi@96700000 {
-			reg = <0 0x96700000 0 0x1400000>;
-			no-map;
+	clocks {
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <38400000>;
+			clock-output-names = "xo_board";
 		};
 
-		spss_mem: spss@97b00000 {
-			reg = <0 0x97b00000 0 0x100000>;
-			no-map;
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32764>;
 		};
 	};
 
@@ -436,6 +332,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
 		};
 	};
 
+	firmware {
+		scm {
+			compatible = "qcom,scm-sdm845", "qcom,scm";
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		/* We expect the bootloader to fill in the size */
+		reg = <0 0x80000000 0 0>;
+	};
+
 	cpu0_opp_table: opp-table-cpu0 {
 		compatible = "operating-points-v2";
 		opp-shared;
@@ -701,32 +609,174 @@ pmu {
 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
-	timer {
-		compatible = "arm,armv8-timer";
-		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
-			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
-			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
-			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
-	};
+	psci: psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
 
-	clocks {
-		xo_board: xo-board {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <38400000>;
-			clock-output-names = "xo_board";
+		CPU_PD0: power-domain-cpu0 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
 		};
 
-		sleep_clk: sleep-clk {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <32764>;
+		CPU_PD1: power-domain-cpu1 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+		};
+
+		CPU_PD2: power-domain-cpu2 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+		};
+
+		CPU_PD3: power-domain-cpu3 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+		};
+
+		CPU_PD4: power-domain-cpu4 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CPU_PD5: power-domain-cpu5 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CPU_PD6: power-domain-cpu6 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CPU_PD7: power-domain-cpu7 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CLUSTER_PD: power-domain-cluster {
+			#power-domain-cells = <0>;
+			domain-idle-states = <&CLUSTER_SLEEP_0>;
 		};
 	};
 
-	firmware {
-		scm {
-			compatible = "qcom,scm-sdm845", "qcom,scm";
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		hyp_mem: hyp-mem@85700000 {
+			reg = <0 0x85700000 0 0x600000>;
+			no-map;
+		};
+
+		xbl_mem: xbl-mem@85e00000 {
+			reg = <0 0x85e00000 0 0x100000>;
+			no-map;
+		};
+
+		aop_mem: aop-mem@85fc0000 {
+			reg = <0 0x85fc0000 0 0x20000>;
+			no-map;
+		};
+
+		aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 {
+			compatible = "qcom,cmd-db";
+			reg = <0x0 0x85fe0000 0 0x20000>;
+			no-map;
+		};
+
+		smem@86000000 {
+			compatible = "qcom,smem";
+			reg = <0x0 0x86000000 0 0x200000>;
+			no-map;
+			hwlocks = <&tcsr_mutex 3>;
+		};
+
+		tz_mem: tz@86200000 {
+			reg = <0 0x86200000 0 0x2d00000>;
+			no-map;
+		};
+
+		rmtfs_mem: rmtfs@88f00000 {
+			compatible = "qcom,rmtfs-mem";
+			reg = <0 0x88f00000 0 0x200000>;
+			no-map;
+
+			qcom,client-id = <1>;
+			qcom,vmid = <15>;
+		};
+
+		qseecom_mem: qseecom@8ab00000 {
+			reg = <0 0x8ab00000 0 0x1400000>;
+			no-map;
+		};
+
+		camera_mem: camera-mem@8bf00000 {
+			reg = <0 0x8bf00000 0 0x500000>;
+			no-map;
+		};
+
+		ipa_fw_mem: ipa-fw@8c400000 {
+			reg = <0 0x8c400000 0 0x10000>;
+			no-map;
+		};
+
+		ipa_gsi_mem: ipa-gsi@8c410000 {
+			reg = <0 0x8c410000 0 0x5000>;
+			no-map;
+		};
+
+		gpu_mem: gpu@8c415000 {
+			reg = <0 0x8c415000 0 0x2000>;
+			no-map;
+		};
+
+		adsp_mem: adsp@8c500000 {
+			reg = <0 0x8c500000 0 0x1a00000>;
+			no-map;
+		};
+
+		wlan_msa_mem: wlan-msa@8df00000 {
+			reg = <0 0x8df00000 0 0x100000>;
+			no-map;
+		};
+
+		mpss_region: mpss@8e000000 {
+			reg = <0 0x8e000000 0 0x7800000>;
+			no-map;
+		};
+
+		venus_mem: venus@95800000 {
+			reg = <0 0x95800000 0 0x500000>;
+			no-map;
+		};
+
+		cdsp_mem: cdsp@95d00000 {
+			reg = <0 0x95d00000 0 0x800000>;
+			no-map;
+		};
+
+		mba_region: mba@96500000 {
+			reg = <0 0x96500000 0 0x200000>;
+			no-map;
+		};
+
+		slpi_mem: slpi@96700000 {
+			reg = <0 0x96700000 0 0x1400000>;
+			no-map;
+		};
+
+		spss_mem: spss@97b00000 {
+			reg = <0 0x97b00000 0 0x100000>;
+			no-map;
 		};
 	};
 
@@ -1018,64 +1068,6 @@ slpi_smp2p_in: slave-kernel {
 		};
 	};
 
-	psci: psci {
-		compatible = "arm,psci-1.0";
-		method = "smc";
-
-		CPU_PD0: power-domain-cpu0 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
-		};
-
-		CPU_PD1: power-domain-cpu1 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
-		};
-
-		CPU_PD2: power-domain-cpu2 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
-		};
-
-		CPU_PD3: power-domain-cpu3 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
-		};
-
-		CPU_PD4: power-domain-cpu4 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
-		};
-
-		CPU_PD5: power-domain-cpu5 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
-		};
-
-		CPU_PD6: power-domain-cpu6 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
-		};
-
-		CPU_PD7: power-domain-cpu7 {
-			#power-domain-cells = <0>;
-			power-domains = <&CLUSTER_PD>;
-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
-		};
-
-		CLUSTER_PD: power-domain-cluster {
-			#power-domain-cells = <0>;
-			domain-idle-states = <&CLUSTER_SLEEP_0>;
-		};
-	};
-
 	soc: soc@0 {
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -5771,4 +5763,12 @@ modem_alert0: trip-point0 {
 			};
 		};
 	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
+	};
 };
-- 
2.34.1

[PATCH v2 3/6] arm64: dts: qcom: sc7180: move QUP and QSPI opp tables out of SoC node

[Krzysztof Kozlowski]

The SoC node is a simple-bus and its schema expect to have nodes only
with unit addresses:

  sc7180-trogdor-lazor-r3.dtb: soc@0: opp-table-qspi: {'compatible': ['operating-points-v2'], 'phandle': [[186]], 'opp-75000000':
    ...  'required-opps': [[47]]}} should not be valid under {'type': 'object'}

Move to top-level OPP tables:
 - QUP which is shared between multiple nodes,
 - QSPI which cannot be placed in its node due to address/size cells.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

---

Changes since v1:
1. Only rebase due to node reorderings.
2. Add Rb tag.
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 76 ++++++++++++++--------------
 1 file changed, 38 insertions(+), 38 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 6d3e86ce2936..eb1e1ea12ff6 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -494,6 +494,44 @@ cpu6_opp16: opp-2553600000 {
 		};
 	};
 
+	qspi_opp_table: opp-table-qspi {
+		compatible = "operating-points-v2";
+
+		opp-75000000 {
+			opp-hz = /bits/ 64 <75000000>;
+			required-opps = <&rpmhpd_opp_low_svs>;
+		};
+
+		opp-150000000 {
+			opp-hz = /bits/ 64 <150000000>;
+			required-opps = <&rpmhpd_opp_svs>;
+		};
+
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			required-opps = <&rpmhpd_opp_nom>;
+		};
+	};
+
+	qup_opp_table: opp-table-qup {
+		compatible = "operating-points-v2";
+
+		opp-75000000 {
+			opp-hz = /bits/ 64 <75000000>;
+			required-opps = <&rpmhpd_opp_low_svs>;
+		};
+
+		opp-100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+			required-opps = <&rpmhpd_opp_svs>;
+		};
+
+		opp-128000000 {
+			opp-hz = /bits/ 64 <128000000>;
+			required-opps = <&rpmhpd_opp_nom>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,armv8-pmuv3";
 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
@@ -739,25 +777,6 @@ opp-384000000 {
 			};
 		};
 
-		qup_opp_table: opp-table-qup {
-			compatible = "operating-points-v2";
-
-			opp-75000000 {
-				opp-hz = /bits/ 64 <75000000>;
-				required-opps = <&rpmhpd_opp_low_svs>;
-			};
-
-			opp-100000000 {
-				opp-hz = /bits/ 64 <100000000>;
-				required-opps = <&rpmhpd_opp_svs>;
-			};
-
-			opp-128000000 {
-				opp-hz = /bits/ 64 <128000000>;
-				required-opps = <&rpmhpd_opp_nom>;
-			};
-		};
-
 		qupv3_id_0: geniqup@8c0000 {
 			compatible = "qcom,geni-se-qup";
 			reg = <0 0x008c0000 0 0x6000>;
@@ -2655,25 +2674,6 @@ opp-202000000 {
 			};
 		};
 
-		qspi_opp_table: opp-table-qspi {
-			compatible = "operating-points-v2";
-
-			opp-75000000 {
-				opp-hz = /bits/ 64 <75000000>;
-				required-opps = <&rpmhpd_opp_low_svs>;
-			};
-
-			opp-150000000 {
-				opp-hz = /bits/ 64 <150000000>;
-				required-opps = <&rpmhpd_opp_svs>;
-			};
-
-			opp-300000000 {
-				opp-hz = /bits/ 64 <300000000>;
-				required-opps = <&rpmhpd_opp_nom>;
-			};
-		};
-
 		qspi: spi@88dc000 {
 			compatible = "qcom,sc7180-qspi", "qcom,qspi-v1";
 			reg = <0 0x088dc000 0 0x600>;
-- 
2.34.1

[PATCH v2 4/6] arm64: dts: qcom: sdm845: move DSI/QUP/QSPI opp tables out of SoC node

[Krzysztof Kozlowski]

The SoC node is a simple-bus and its schema expect to have nodes only
with unit addresses:

  sdm850-lenovo-yoga-c630.dtb: soc@0: opp-table-qup: {'compatible': ['operating-points-v2'], 'phandle': [[60]], 'opp-50000000':
  ... 'required-opps': [[55]]}} should not be valid under {'type': 'object'}

Move to top-level OPP tables:
 - DSI and QUP which are shared between multiple nodes,
 - QSPI which cannot be placed in its node due to address/size cells.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

---

Changes since v1:
1. Only rebase due to node reorderings.
2. Add Rb tag.
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 154 +++++++++++++--------------
 1 file changed, 77 insertions(+), 77 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 88e7d4061aae..8eeb3aa261d5 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -604,6 +604,83 @@ cpu4_opp32: opp-2803200000 {
 		};
 	};
 
+	dsi_opp_table: opp-table-dsi {
+		compatible = "operating-points-v2";
+
+		opp-19200000 {
+			opp-hz = /bits/ 64 <19200000>;
+			required-opps = <&rpmhpd_opp_min_svs>;
+		};
+
+		opp-180000000 {
+			opp-hz = /bits/ 64 <180000000>;
+			required-opps = <&rpmhpd_opp_low_svs>;
+		};
+
+		opp-275000000 {
+			opp-hz = /bits/ 64 <275000000>;
+			required-opps = <&rpmhpd_opp_svs>;
+		};
+
+		opp-328580000 {
+			opp-hz = /bits/ 64 <328580000>;
+			required-opps = <&rpmhpd_opp_svs_l1>;
+		};
+
+		opp-358000000 {
+			opp-hz = /bits/ 64 <358000000>;
+			required-opps = <&rpmhpd_opp_nom>;
+		};
+	};
+
+	qspi_opp_table: opp-table-qspi {
+		compatible = "operating-points-v2";
+
+		opp-19200000 {
+			opp-hz = /bits/ 64 <19200000>;
+			required-opps = <&rpmhpd_opp_min_svs>;
+		};
+
+		opp-100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+			required-opps = <&rpmhpd_opp_low_svs>;
+		};
+
+		opp-150000000 {
+			opp-hz = /bits/ 64 <150000000>;
+			required-opps = <&rpmhpd_opp_svs>;
+		};
+
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			required-opps = <&rpmhpd_opp_nom>;
+		};
+	};
+
+	qup_opp_table: opp-table-qup {
+		compatible = "operating-points-v2";
+
+		opp-50000000 {
+			opp-hz = /bits/ 64 <50000000>;
+			required-opps = <&rpmhpd_opp_min_svs>;
+		};
+
+		opp-75000000 {
+			opp-hz = /bits/ 64 <75000000>;
+			required-opps = <&rpmhpd_opp_low_svs>;
+		};
+
+		opp-100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+			required-opps = <&rpmhpd_opp_svs>;
+		};
+
+		opp-128000000 {
+			opp-hz = /bits/ 64 <128000000>;
+			required-opps = <&rpmhpd_opp_nom>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,armv8-pmuv3";
 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
@@ -1117,30 +1194,6 @@ rng: rng@793000 {
 			clock-names = "core";
 		};
 
-		qup_opp_table: opp-table-qup {
-			compatible = "operating-points-v2";
-
-			opp-50000000 {
-				opp-hz = /bits/ 64 <50000000>;
-				required-opps = <&rpmhpd_opp_min_svs>;
-			};
-
-			opp-75000000 {
-				opp-hz = /bits/ 64 <75000000>;
-				required-opps = <&rpmhpd_opp_low_svs>;
-			};
-
-			opp-100000000 {
-				opp-hz = /bits/ 64 <100000000>;
-				required-opps = <&rpmhpd_opp_svs>;
-			};
-
-			opp-128000000 {
-				opp-hz = /bits/ 64 <128000000>;
-				required-opps = <&rpmhpd_opp_nom>;
-			};
-		};
-
 		gpi_dma0: dma-controller@800000 {
 			#dma-cells = <3>;
 			compatible = "qcom,sdm845-gpi-dma";
@@ -3799,30 +3852,6 @@ opp-201500000 {
 			};
 		};
 
-		qspi_opp_table: opp-table-qspi {
-			compatible = "operating-points-v2";
-
-			opp-19200000 {
-				opp-hz = /bits/ 64 <19200000>;
-				required-opps = <&rpmhpd_opp_min_svs>;
-			};
-
-			opp-100000000 {
-				opp-hz = /bits/ 64 <100000000>;
-				required-opps = <&rpmhpd_opp_low_svs>;
-			};
-
-			opp-150000000 {
-				opp-hz = /bits/ 64 <150000000>;
-				required-opps = <&rpmhpd_opp_svs>;
-			};
-
-			opp-300000000 {
-				opp-hz = /bits/ 64 <300000000>;
-				required-opps = <&rpmhpd_opp_nom>;
-			};
-		};
-
 		qspi: spi@88df000 {
 			compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
 			reg = <0 0x088df000 0 0x600>;
@@ -4420,35 +4449,6 @@ clock_camcc: clock-controller@ad00000 {
 			clock-names = "bi_tcxo";
 		};
 
-		dsi_opp_table: opp-table-dsi {
-			compatible = "operating-points-v2";
-
-			opp-19200000 {
-				opp-hz = /bits/ 64 <19200000>;
-				required-opps = <&rpmhpd_opp_min_svs>;
-			};
-
-			opp-180000000 {
-				opp-hz = /bits/ 64 <180000000>;
-				required-opps = <&rpmhpd_opp_low_svs>;
-			};
-
-			opp-275000000 {
-				opp-hz = /bits/ 64 <275000000>;
-				required-opps = <&rpmhpd_opp_svs>;
-			};
-
-			opp-328580000 {
-				opp-hz = /bits/ 64 <328580000>;
-				required-opps = <&rpmhpd_opp_svs_l1>;
-			};
-
-			opp-358000000 {
-				opp-hz = /bits/ 64 <358000000>;
-				required-opps = <&rpmhpd_opp_nom>;
-			};
-		};
-
 		mdss: mdss@ae00000 {
 			compatible = "qcom,sdm845-mdss";
 			reg = <0 0x0ae00000 0 0x1000>;
-- 
2.34.1

[PATCH v2 5/6] arm64: dts: qcom: sdm845: move sound node out of soc

[Krzysztof Kozlowski]

The sound node is not property of the soc, but rather board as it
describes the sound configuration.  It also does not have unit address:

  sdm845-shift-axolotl.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

---

Changes since v1:
1. Add Rb tag.
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 8eeb3aa261d5..5f1f7cb52c90 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3964,9 +3964,6 @@ lmh_cluster0: lmh@17d78800 {
 			#interrupt-cells = <1>;
 		};
 
-		sound: sound {
-		};
-
 		usb_1_hsphy: phy@88e2000 {
 			compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy";
 			reg = <0 0x088e2000 0 0x400>;
@@ -5341,6 +5338,9 @@ wifi: wifi@18800000 {
 		};
 	};
 
+	sound: sound {
+	};
+
 	thermal-zones {
 		cpu0-thermal {
 			polling-delay-passive = <250>;
-- 
2.34.1

[PATCH v2 6/6] arm64: dts: qcom: sm8250: move sound and codec nodes out of soc

[Krzysztof Kozlowski]

The sound and on-board WCD9380 codec nodes are not properties of the
soc, but rather board as it describes the sound configuration.  They also
does not have unit addresses:

  sm8250-hdk.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

---

Changes since v1:
1. Add Rb tag.
2. Rephrase commit msg.
---
 arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 40 ++++++++++++-------------
 arch/arm64/boot/dts/qcom/sm8250.dtsi    |  6 ++--
 2 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
index 3ed8c84e25b8..b741b7da1afc 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
@@ -27,6 +27,25 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 
+	wcd938x: codec {
+		compatible = "qcom,wcd9380-codec";
+		#sound-dai-cells = <1>;
+		reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+		vdd-buck-supply = <&vreg_s4a_1p8>;
+		vdd-rxtx-supply = <&vreg_s4a_1p8>;
+		vdd-io-supply = <&vreg_s4a_1p8>;
+		vdd-mic-bias-supply = <&vreg_bob>;
+		qcom,micbias1-microvolt = <1800000>;
+		qcom,micbias2-microvolt = <1800000>;
+		qcom,micbias3-microvolt = <1800000>;
+		qcom,micbias4-microvolt = <1800000>;
+		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
+		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+		qcom,rx-device = <&wcd_rx>;
+		qcom,tx-device = <&wcd_tx>;
+	};
+
 	thermal-zones {
 		camera-thermal {
 			polling-delay-passive = <0>;
@@ -631,27 +650,6 @@ &slpi {
 	firmware-name = "qcom/sm8250/slpi.mbn";
 };
 
-&soc {
-	wcd938x: codec {
-		compatible = "qcom,wcd9380-codec";
-		#sound-dai-cells = <1>;
-		reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
-		vdd-buck-supply = <&vreg_s4a_1p8>;
-		vdd-rxtx-supply = <&vreg_s4a_1p8>;
-		vdd-io-supply = <&vreg_s4a_1p8>;
-		vdd-mic-bias-supply = <&vreg_bob>;
-		qcom,micbias1-microvolt = <1800000>;
-		qcom,micbias2-microvolt = <1800000>;
-		qcom,micbias3-microvolt = <1800000>;
-		qcom,micbias4-microvolt = <1800000>;
-		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
-		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
-		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
-		qcom,rx-device = <&wcd_rx>;
-		qcom,tx-device = <&wcd_tx>;
-	};
-};
-
 &sound {
 	compatible = "qcom,sm8250-sndcard";
 	model = "SM8250-MTP-WCD9380-WSA8810-VA-DMIC";
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d517d6a80bdc..fbbbae29e0c2 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2826,9 +2826,6 @@ compute-cb@8 {
 			};
 		};
 
-		sound: sound {
-		};
-
 		usb_1_hsphy: phy@88e3000 {
 			compatible = "qcom,sm8250-usb-hs-phy",
 				     "qcom,usb-snps-hs-7nm-phy";
@@ -4910,6 +4907,9 @@ cpufreq_hw: cpufreq@18591000 {
 		};
 	};
 
+	sound: sound {
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13
-- 
2.34.1

Re: [PATCH v2 1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically

[Konrad Dybcio]

On 12.12.2022 11:02, Krzysztof Kozlowski wrote:
> Order top-level nodes like memory, reserved-memory, opp-table-cpu
> alphabetically for easier code maintenance.  No functional change (same
> dtx_diff).
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
> 
> Changes since v1:
> 1. New patch
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 144 +++++++++++++--------------
>  1 file changed, 72 insertions(+), 72 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index ea886cf08b4d..6d3e86ce2936 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -27,8 +27,6 @@ / {
>  	#address-cells = <2>;
>  	#size-cells = <2>;
>  
> -	chosen { };
> -
>  	aliases {
>  		mmc1 = &sdhc_1;
>  		mmc2 = &sdhc_2;
> @@ -54,6 +52,8 @@ aliases {
>  		spi11 = &spi11;
>  	};
>  
> +	chosen { };
> +
>  	clocks {
>  		xo_board: xo-board {
>  			compatible = "fixed-clock";
> @@ -68,62 +68,6 @@ sleep_clk: sleep-clk {
>  		};
>  	};
>  
> -	reserved_memory: reserved-memory {
> -		#address-cells = <2>;
> -		#size-cells = <2>;
> -		ranges;
> -
> -		hyp_mem: memory@80000000 {
> -			reg = <0x0 0x80000000 0x0 0x600000>;
> -			no-map;
> -		};
> -
> -		xbl_mem: memory@80600000 {
> -			reg = <0x0 0x80600000 0x0 0x200000>;
> -			no-map;
> -		};
> -
> -		aop_mem: memory@80800000 {
> -			reg = <0x0 0x80800000 0x0 0x20000>;
> -			no-map;
> -		};
> -
> -		aop_cmd_db_mem: memory@80820000 {
> -			reg = <0x0 0x80820000 0x0 0x20000>;
> -			compatible = "qcom,cmd-db";
> -			no-map;
> -		};
> -
> -		sec_apps_mem: memory@808ff000 {
> -			reg = <0x0 0x808ff000 0x0 0x1000>;
> -			no-map;
> -		};
> -
> -		smem_mem: memory@80900000 {
> -			reg = <0x0 0x80900000 0x0 0x200000>;
> -			no-map;
> -		};
> -
> -		tz_mem: memory@80b00000 {
> -			reg = <0x0 0x80b00000 0x0 0x3900000>;
> -			no-map;
> -		};
> -
> -		ipa_fw_mem: memory@8b700000 {
> -			reg = <0 0x8b700000 0 0x10000>;
> -			no-map;
> -		};
> -
> -		rmtfs_mem: memory@94600000 {
> -			compatible = "qcom,rmtfs-mem";
> -			reg = <0x0 0x94600000 0x0 0x200000>;
> -			no-map;
> -
> -			qcom,client-id = <1>;
> -			qcom,vmid = <15>;
> -		};
> -	};
> -
>  	cpus {
>  		#address-cells = <2>;
>  		#size-cells = <0>;
> @@ -398,6 +342,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
>  		};
>  	};
>  
> +	firmware {
> +		scm {
> +			compatible = "qcom,scm-sc7180", "qcom,scm";
> +		};
> +	};
> +
> +	memory@80000000 {
> +		device_type = "memory";
> +		/* We expect the bootloader to fill in the size */
> +		reg = <0 0x80000000 0 0>;
> +	};
> +
>  	cpu0_opp_table: opp-table-cpu0 {
>  		compatible = "operating-points-v2";
>  		opp-shared;
> @@ -538,20 +494,69 @@ cpu6_opp16: opp-2553600000 {
>  		};
>  	};
>  
> -	memory@80000000 {
> -		device_type = "memory";
> -		/* We expect the bootloader to fill in the size */
> -		reg = <0 0x80000000 0 0>;
> -	};
> -
>  	pmu {
>  		compatible = "arm,armv8-pmuv3";
>  		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
>  	};
>  
> -	firmware {
> -		scm {
> -			compatible = "qcom,scm-sc7180", "qcom,scm";
> +	psci {
> +		compatible = "arm,psci-1.0";
> +		method = "smc";
> +	};
> +
> +	reserved_memory: reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		hyp_mem: memory@80000000 {
> +			reg = <0x0 0x80000000 0x0 0x600000>;
> +			no-map;
> +		};
> +
> +		xbl_mem: memory@80600000 {
> +			reg = <0x0 0x80600000 0x0 0x200000>;
> +			no-map;
> +		};
> +
> +		aop_mem: memory@80800000 {
> +			reg = <0x0 0x80800000 0x0 0x20000>;
> +			no-map;
> +		};
> +
> +		aop_cmd_db_mem: memory@80820000 {
> +			reg = <0x0 0x80820000 0x0 0x20000>;
> +			compatible = "qcom,cmd-db";
> +			no-map;
> +		};
> +
> +		sec_apps_mem: memory@808ff000 {
> +			reg = <0x0 0x808ff000 0x0 0x1000>;
> +			no-map;
> +		};
> +
> +		smem_mem: memory@80900000 {
> +			reg = <0x0 0x80900000 0x0 0x200000>;
> +			no-map;
> +		};
> +
> +		tz_mem: memory@80b00000 {
> +			reg = <0x0 0x80b00000 0x0 0x3900000>;
> +			no-map;
> +		};
> +
> +		ipa_fw_mem: memory@8b700000 {
> +			reg = <0 0x8b700000 0 0x10000>;
> +			no-map;
> +		};
> +
> +		rmtfs_mem: memory@94600000 {
> +			compatible = "qcom,rmtfs-mem";
> +			reg = <0x0 0x94600000 0x0 0x200000>;
> +			no-map;
> +
> +			qcom,client-id = <1>;
> +			qcom,vmid = <15>;
>  		};
>  	};
>  
> @@ -640,11 +645,6 @@ ipa_smp2p_in: ipa-modem-to-ap {
>  		};
>  	};
>  
> -	psci {
> -		compatible = "arm,psci-1.0";
> -		method = "smc";
> -	};
> -
>  	soc: soc@0 {
>  		#address-cells = <2>;
>  		#size-cells = <2>;

Re: [PATCH v2 2/6] arm64: dts: qcom: sdm845: order top-level nodes alphabetically

[Konrad Dybcio]

On 12.12.2022 11:02, Krzysztof Kozlowski wrote:
> Order top-level nodes like memory, reserved-memory, opp-table-cpu
> alphabetically for easier code maintenance.  No functional change (same
> dtx_diff, except phandle changes).
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
> 
> Changes since v1:
> 1. New patch
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 384 +++++++++++++--------------
>  1 file changed, 192 insertions(+), 192 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index a63dbd12230f..88e7d4061aae 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -69,122 +69,18 @@ aliases {
>  
>  	chosen { };
>  
> -	memory@80000000 {
> -		device_type = "memory";
> -		/* We expect the bootloader to fill in the size */
> -		reg = <0 0x80000000 0 0>;
> -	};
> -
> -	reserved-memory {
> -		#address-cells = <2>;
> -		#size-cells = <2>;
> -		ranges;
> -
> -		hyp_mem: hyp-mem@85700000 {
> -			reg = <0 0x85700000 0 0x600000>;
> -			no-map;
> -		};
> -
> -		xbl_mem: xbl-mem@85e00000 {
> -			reg = <0 0x85e00000 0 0x100000>;
> -			no-map;
> -		};
> -
> -		aop_mem: aop-mem@85fc0000 {
> -			reg = <0 0x85fc0000 0 0x20000>;
> -			no-map;
> -		};
> -
> -		aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 {
> -			compatible = "qcom,cmd-db";
> -			reg = <0x0 0x85fe0000 0 0x20000>;
> -			no-map;
> -		};
> -
> -		smem@86000000 {
> -			compatible = "qcom,smem";
> -			reg = <0x0 0x86000000 0 0x200000>;
> -			no-map;
> -			hwlocks = <&tcsr_mutex 3>;
> -		};
> -
> -		tz_mem: tz@86200000 {
> -			reg = <0 0x86200000 0 0x2d00000>;
> -			no-map;
> -		};
> -
> -		rmtfs_mem: rmtfs@88f00000 {
> -			compatible = "qcom,rmtfs-mem";
> -			reg = <0 0x88f00000 0 0x200000>;
> -			no-map;
> -
> -			qcom,client-id = <1>;
> -			qcom,vmid = <15>;
> -		};
> -
> -		qseecom_mem: qseecom@8ab00000 {
> -			reg = <0 0x8ab00000 0 0x1400000>;
> -			no-map;
> -		};
> -
> -		camera_mem: camera-mem@8bf00000 {
> -			reg = <0 0x8bf00000 0 0x500000>;
> -			no-map;
> -		};
> -
> -		ipa_fw_mem: ipa-fw@8c400000 {
> -			reg = <0 0x8c400000 0 0x10000>;
> -			no-map;
> -		};
> -
> -		ipa_gsi_mem: ipa-gsi@8c410000 {
> -			reg = <0 0x8c410000 0 0x5000>;
> -			no-map;
> -		};
> -
> -		gpu_mem: gpu@8c415000 {
> -			reg = <0 0x8c415000 0 0x2000>;
> -			no-map;
> -		};
> -
> -		adsp_mem: adsp@8c500000 {
> -			reg = <0 0x8c500000 0 0x1a00000>;
> -			no-map;
> -		};
> -
> -		wlan_msa_mem: wlan-msa@8df00000 {
> -			reg = <0 0x8df00000 0 0x100000>;
> -			no-map;
> -		};
> -
> -		mpss_region: mpss@8e000000 {
> -			reg = <0 0x8e000000 0 0x7800000>;
> -			no-map;
> -		};
> -
> -		venus_mem: venus@95800000 {
> -			reg = <0 0x95800000 0 0x500000>;
> -			no-map;
> -		};
> -
> -		cdsp_mem: cdsp@95d00000 {
> -			reg = <0 0x95d00000 0 0x800000>;
> -			no-map;
> -		};
> -
> -		mba_region: mba@96500000 {
> -			reg = <0 0x96500000 0 0x200000>;
> -			no-map;
> -		};
> -
> -		slpi_mem: slpi@96700000 {
> -			reg = <0 0x96700000 0 0x1400000>;
> -			no-map;
> +	clocks {
> +		xo_board: xo-board {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <38400000>;
> +			clock-output-names = "xo_board";
>  		};
>  
> -		spss_mem: spss@97b00000 {
> -			reg = <0 0x97b00000 0 0x100000>;
> -			no-map;
> +		sleep_clk: sleep-clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <32764>;
>  		};
>  	};
>  
> @@ -436,6 +332,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
>  		};
>  	};
>  
> +	firmware {
> +		scm {
> +			compatible = "qcom,scm-sdm845", "qcom,scm";
> +		};
> +	};
> +
> +	memory@80000000 {
> +		device_type = "memory";
> +		/* We expect the bootloader to fill in the size */
> +		reg = <0 0x80000000 0 0>;
> +	};
> +
>  	cpu0_opp_table: opp-table-cpu0 {
>  		compatible = "operating-points-v2";
>  		opp-shared;
> @@ -701,32 +609,174 @@ pmu {
>  		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
>  	};
>  
> -	timer {
> -		compatible = "arm,armv8-timer";
> -		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
> -			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
> -			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
> -			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
> -	};
> +	psci: psci {
> +		compatible = "arm,psci-1.0";
> +		method = "smc";
>  
> -	clocks {
> -		xo_board: xo-board {
> -			compatible = "fixed-clock";
> -			#clock-cells = <0>;
> -			clock-frequency = <38400000>;
> -			clock-output-names = "xo_board";
> +		CPU_PD0: power-domain-cpu0 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>  		};
>  
> -		sleep_clk: sleep-clk {
> -			compatible = "fixed-clock";
> -			#clock-cells = <0>;
> -			clock-frequency = <32764>;
> +		CPU_PD1: power-domain-cpu1 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> +		};
> +
> +		CPU_PD2: power-domain-cpu2 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> +		};
> +
> +		CPU_PD3: power-domain-cpu3 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> +		};
> +
> +		CPU_PD4: power-domain-cpu4 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> +		};
> +
> +		CPU_PD5: power-domain-cpu5 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> +		};
> +
> +		CPU_PD6: power-domain-cpu6 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> +		};
> +
> +		CPU_PD7: power-domain-cpu7 {
> +			#power-domain-cells = <0>;
> +			power-domains = <&CLUSTER_PD>;
> +			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> +		};
> +
> +		CLUSTER_PD: power-domain-cluster {
> +			#power-domain-cells = <0>;
> +			domain-idle-states = <&CLUSTER_SLEEP_0>;
>  		};
>  	};
>  
> -	firmware {
> -		scm {
> -			compatible = "qcom,scm-sdm845", "qcom,scm";
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		hyp_mem: hyp-mem@85700000 {
> +			reg = <0 0x85700000 0 0x600000>;
> +			no-map;
> +		};
> +
> +		xbl_mem: xbl-mem@85e00000 {
> +			reg = <0 0x85e00000 0 0x100000>;
> +			no-map;
> +		};
> +
> +		aop_mem: aop-mem@85fc0000 {
> +			reg = <0 0x85fc0000 0 0x20000>;
> +			no-map;
> +		};
> +
> +		aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 {
> +			compatible = "qcom,cmd-db";
> +			reg = <0x0 0x85fe0000 0 0x20000>;
> +			no-map;
> +		};
> +
> +		smem@86000000 {
> +			compatible = "qcom,smem";
> +			reg = <0x0 0x86000000 0 0x200000>;
> +			no-map;
> +			hwlocks = <&tcsr_mutex 3>;
> +		};
> +
> +		tz_mem: tz@86200000 {
> +			reg = <0 0x86200000 0 0x2d00000>;
> +			no-map;
> +		};
> +
> +		rmtfs_mem: rmtfs@88f00000 {
> +			compatible = "qcom,rmtfs-mem";
> +			reg = <0 0x88f00000 0 0x200000>;
> +			no-map;
> +
> +			qcom,client-id = <1>;
> +			qcom,vmid = <15>;
> +		};
> +
> +		qseecom_mem: qseecom@8ab00000 {
> +			reg = <0 0x8ab00000 0 0x1400000>;
> +			no-map;
> +		};
> +
> +		camera_mem: camera-mem@8bf00000 {
> +			reg = <0 0x8bf00000 0 0x500000>;
> +			no-map;
> +		};
> +
> +		ipa_fw_mem: ipa-fw@8c400000 {
> +			reg = <0 0x8c400000 0 0x10000>;
> +			no-map;
> +		};
> +
> +		ipa_gsi_mem: ipa-gsi@8c410000 {
> +			reg = <0 0x8c410000 0 0x5000>;
> +			no-map;
> +		};
> +
> +		gpu_mem: gpu@8c415000 {
> +			reg = <0 0x8c415000 0 0x2000>;
> +			no-map;
> +		};
> +
> +		adsp_mem: adsp@8c500000 {
> +			reg = <0 0x8c500000 0 0x1a00000>;
> +			no-map;
> +		};
> +
> +		wlan_msa_mem: wlan-msa@8df00000 {
> +			reg = <0 0x8df00000 0 0x100000>;
> +			no-map;
> +		};
> +
> +		mpss_region: mpss@8e000000 {
> +			reg = <0 0x8e000000 0 0x7800000>;
> +			no-map;
> +		};
> +
> +		venus_mem: venus@95800000 {
> +			reg = <0 0x95800000 0 0x500000>;
> +			no-map;
> +		};
> +
> +		cdsp_mem: cdsp@95d00000 {
> +			reg = <0 0x95d00000 0 0x800000>;
> +			no-map;
> +		};
> +
> +		mba_region: mba@96500000 {
> +			reg = <0 0x96500000 0 0x200000>;
> +			no-map;
> +		};
> +
> +		slpi_mem: slpi@96700000 {
> +			reg = <0 0x96700000 0 0x1400000>;
> +			no-map;
> +		};
> +
> +		spss_mem: spss@97b00000 {
> +			reg = <0 0x97b00000 0 0x100000>;
> +			no-map;
>  		};
>  	};
>  
> @@ -1018,64 +1068,6 @@ slpi_smp2p_in: slave-kernel {
>  		};
>  	};
>  
> -	psci: psci {
> -		compatible = "arm,psci-1.0";
> -		method = "smc";
> -
> -		CPU_PD0: power-domain-cpu0 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> -		};
> -
> -		CPU_PD1: power-domain-cpu1 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> -		};
> -
> -		CPU_PD2: power-domain-cpu2 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> -		};
> -
> -		CPU_PD3: power-domain-cpu3 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> -		};
> -
> -		CPU_PD4: power-domain-cpu4 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> -		};
> -
> -		CPU_PD5: power-domain-cpu5 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> -		};
> -
> -		CPU_PD6: power-domain-cpu6 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> -		};
> -
> -		CPU_PD7: power-domain-cpu7 {
> -			#power-domain-cells = <0>;
> -			power-domains = <&CLUSTER_PD>;
> -			domain-idle-states = <&BIG_CPU_SLEEP_0>;
> -		};
> -
> -		CLUSTER_PD: power-domain-cluster {
> -			#power-domain-cells = <0>;
> -			domain-idle-states = <&CLUSTER_SLEEP_0>;
> -		};
> -	};
> -
>  	soc: soc@0 {
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> @@ -5771,4 +5763,12 @@ modem_alert0: trip-point0 {
>  			};
>  		};
>  	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
> +	};
>  };

Re: [PATCH v2 4/6] arm64: dts: qcom: sdm845: move DSI/QUP/QSPI opp tables out of SoC node

[Dmitry Baryshkov]

On 12 December 2022 13:02:30 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>The SoC node is a simple-bus and its schema expect to have nodes only
>with unit addresses:
>
>  sdm850-lenovo-yoga-c630.dtb: soc@0: opp-table-qup: {'compatible': ['operating-points-v2'], 'phandle': [[60]], 'opp-50000000':
>  ... 'required-opps': [[55]]}} should not be valid under {'type': 'object'}
>
>Move to top-level OPP tables:
> - DSI and QUP which are shared between multiple nodes,

This makes me rise a question: on other platforms we have been placing the shared dsi opp table into one of DSI nodes (usually into the second one). Should we also move such tables up to the top level?


> - QSPI which cannot be placed in its node due to address/size cells.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>

>
>---
>
>Changes since v1:
>1. Only rebase due to node reorderings.
>2. Add Rb tag.
>---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 154 +++++++++++++--------------
> 1 file changed, 77 insertions(+), 77 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>index 88e7d4061aae..8eeb3aa261d5 100644
>--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>@@ -604,6 +604,83 @@ cpu4_opp32: opp-2803200000 {
> 		};
> 	};
> 
>+	dsi_opp_table: opp-table-dsi {
>+		compatible = "operating-points-v2";
>+
>+		opp-19200000 {
>+			opp-hz = /bits/ 64 <19200000>;
>+			required-opps = <&rpmhpd_opp_min_svs>;
>+		};
>+
>+		opp-180000000 {
>+			opp-hz = /bits/ 64 <180000000>;
>+			required-opps = <&rpmhpd_opp_low_svs>;
>+		};
>+
>+		opp-275000000 {
>+			opp-hz = /bits/ 64 <275000000>;
>+			required-opps = <&rpmhpd_opp_svs>;
>+		};
>+
>+		opp-328580000 {
>+			opp-hz = /bits/ 64 <328580000>;
>+			required-opps = <&rpmhpd_opp_svs_l1>;
>+		};
>+
>+		opp-358000000 {
>+			opp-hz = /bits/ 64 <358000000>;
>+			required-opps = <&rpmhpd_opp_nom>;
>+		};
>+	};
>+
>+	qspi_opp_table: opp-table-qspi {
>+		compatible = "operating-points-v2";
>+
>+		opp-19200000 {
>+			opp-hz = /bits/ 64 <19200000>;
>+			required-opps = <&rpmhpd_opp_min_svs>;
>+		};
>+
>+		opp-100000000 {
>+			opp-hz = /bits/ 64 <100000000>;
>+			required-opps = <&rpmhpd_opp_low_svs>;
>+		};
>+
>+		opp-150000000 {
>+			opp-hz = /bits/ 64 <150000000>;
>+			required-opps = <&rpmhpd_opp_svs>;
>+		};
>+
>+		opp-300000000 {
>+			opp-hz = /bits/ 64 <300000000>;
>+			required-opps = <&rpmhpd_opp_nom>;
>+		};
>+	};
>+
>+	qup_opp_table: opp-table-qup {
>+		compatible = "operating-points-v2";
>+
>+		opp-50000000 {
>+			opp-hz = /bits/ 64 <50000000>;
>+			required-opps = <&rpmhpd_opp_min_svs>;
>+		};
>+
>+		opp-75000000 {
>+			opp-hz = /bits/ 64 <75000000>;
>+			required-opps = <&rpmhpd_opp_low_svs>;
>+		};
>+
>+		opp-100000000 {
>+			opp-hz = /bits/ 64 <100000000>;
>+			required-opps = <&rpmhpd_opp_svs>;
>+		};
>+
>+		opp-128000000 {
>+			opp-hz = /bits/ 64 <128000000>;
>+			required-opps = <&rpmhpd_opp_nom>;
>+		};
>+	};
>+
> 	pmu {
> 		compatible = "arm,armv8-pmuv3";
> 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
>@@ -1117,30 +1194,6 @@ rng: rng@793000 {
> 			clock-names = "core";
> 		};
> 
>-		qup_opp_table: opp-table-qup {
>-			compatible = "operating-points-v2";
>-
>-			opp-50000000 {
>-				opp-hz = /bits/ 64 <50000000>;
>-				required-opps = <&rpmhpd_opp_min_svs>;
>-			};
>-
>-			opp-75000000 {
>-				opp-hz = /bits/ 64 <75000000>;
>-				required-opps = <&rpmhpd_opp_low_svs>;
>-			};
>-
>-			opp-100000000 {
>-				opp-hz = /bits/ 64 <100000000>;
>-				required-opps = <&rpmhpd_opp_svs>;
>-			};
>-
>-			opp-128000000 {
>-				opp-hz = /bits/ 64 <128000000>;
>-				required-opps = <&rpmhpd_opp_nom>;
>-			};
>-		};
>-
> 		gpi_dma0: dma-controller@800000 {
> 			#dma-cells = <3>;
> 			compatible = "qcom,sdm845-gpi-dma";
>@@ -3799,30 +3852,6 @@ opp-201500000 {
> 			};
> 		};
> 
>-		qspi_opp_table: opp-table-qspi {
>-			compatible = "operating-points-v2";
>-
>-			opp-19200000 {
>-				opp-hz = /bits/ 64 <19200000>;
>-				required-opps = <&rpmhpd_opp_min_svs>;
>-			};
>-
>-			opp-100000000 {
>-				opp-hz = /bits/ 64 <100000000>;
>-				required-opps = <&rpmhpd_opp_low_svs>;
>-			};
>-
>-			opp-150000000 {
>-				opp-hz = /bits/ 64 <150000000>;
>-				required-opps = <&rpmhpd_opp_svs>;
>-			};
>-
>-			opp-300000000 {
>-				opp-hz = /bits/ 64 <300000000>;
>-				required-opps = <&rpmhpd_opp_nom>;
>-			};
>-		};
>-
> 		qspi: spi@88df000 {
> 			compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
> 			reg = <0 0x088df000 0 0x600>;
>@@ -4420,35 +4449,6 @@ clock_camcc: clock-controller@ad00000 {
> 			clock-names = "bi_tcxo";
> 		};
> 
>-		dsi_opp_table: opp-table-dsi {
>-			compatible = "operating-points-v2";
>-
>-			opp-19200000 {
>-				opp-hz = /bits/ 64 <19200000>;
>-				required-opps = <&rpmhpd_opp_min_svs>;
>-			};
>-
>-			opp-180000000 {
>-				opp-hz = /bits/ 64 <180000000>;
>-				required-opps = <&rpmhpd_opp_low_svs>;
>-			};
>-
>-			opp-275000000 {
>-				opp-hz = /bits/ 64 <275000000>;
>-				required-opps = <&rpmhpd_opp_svs>;
>-			};
>-
>-			opp-328580000 {
>-				opp-hz = /bits/ 64 <328580000>;
>-				required-opps = <&rpmhpd_opp_svs_l1>;
>-			};
>-
>-			opp-358000000 {
>-				opp-hz = /bits/ 64 <358000000>;
>-				required-opps = <&rpmhpd_opp_nom>;
>-			};
>-		};
>-
> 		mdss: mdss@ae00000 {
> 			compatible = "qcom,sdm845-mdss";
> 			reg = <0 0x0ae00000 0 0x1000>;

-- 
With best wishes
Dmitry

Re: [PATCH v2 1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically

[Dmitry Baryshkov]

On 12 December 2022 13:02:27 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>Order top-level nodes like memory, reserved-memory, opp-table-cpu
>alphabetically for easier code maintenance.  No functional change (same
>dtx_diff).
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>

>
>---
>
>Changes since v1:
>1. New patch
>---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 144 +++++++++++++--------------
> 1 file changed, 72 insertions(+), 72 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>index ea886cf08b4d..6d3e86ce2936 100644
>--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>@@ -27,8 +27,6 @@ / {
> 	#address-cells = <2>;
> 	#size-cells = <2>;
> 
>-	chosen { };
>-
> 	aliases {
> 		mmc1 = &sdhc_1;
> 		mmc2 = &sdhc_2;
>@@ -54,6 +52,8 @@ aliases {
> 		spi11 = &spi11;
> 	};
> 
>+	chosen { };
>+
> 	clocks {
> 		xo_board: xo-board {
> 			compatible = "fixed-clock";
>@@ -68,62 +68,6 @@ sleep_clk: sleep-clk {
> 		};
> 	};
> 
>-	reserved_memory: reserved-memory {
>-		#address-cells = <2>;
>-		#size-cells = <2>;
>-		ranges;
>-
>-		hyp_mem: memory@80000000 {
>-			reg = <0x0 0x80000000 0x0 0x600000>;
>-			no-map;
>-		};
>-
>-		xbl_mem: memory@80600000 {
>-			reg = <0x0 0x80600000 0x0 0x200000>;
>-			no-map;
>-		};
>-
>-		aop_mem: memory@80800000 {
>-			reg = <0x0 0x80800000 0x0 0x20000>;
>-			no-map;
>-		};
>-
>-		aop_cmd_db_mem: memory@80820000 {
>-			reg = <0x0 0x80820000 0x0 0x20000>;
>-			compatible = "qcom,cmd-db";
>-			no-map;
>-		};
>-
>-		sec_apps_mem: memory@808ff000 {
>-			reg = <0x0 0x808ff000 0x0 0x1000>;
>-			no-map;
>-		};
>-
>-		smem_mem: memory@80900000 {
>-			reg = <0x0 0x80900000 0x0 0x200000>;
>-			no-map;
>-		};
>-
>-		tz_mem: memory@80b00000 {
>-			reg = <0x0 0x80b00000 0x0 0x3900000>;
>-			no-map;
>-		};
>-
>-		ipa_fw_mem: memory@8b700000 {
>-			reg = <0 0x8b700000 0 0x10000>;
>-			no-map;
>-		};
>-
>-		rmtfs_mem: memory@94600000 {
>-			compatible = "qcom,rmtfs-mem";
>-			reg = <0x0 0x94600000 0x0 0x200000>;
>-			no-map;
>-
>-			qcom,client-id = <1>;
>-			qcom,vmid = <15>;
>-		};
>-	};
>-
> 	cpus {
> 		#address-cells = <2>;
> 		#size-cells = <0>;
>@@ -398,6 +342,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
> 		};
> 	};
> 
>+	firmware {
>+		scm {
>+			compatible = "qcom,scm-sc7180", "qcom,scm";
>+		};
>+	};
>+
>+	memory@80000000 {
>+		device_type = "memory";
>+		/* We expect the bootloader to fill in the size */
>+		reg = <0 0x80000000 0 0>;
>+	};
>+
> 	cpu0_opp_table: opp-table-cpu0 {
> 		compatible = "operating-points-v2";
> 		opp-shared;
>@@ -538,20 +494,69 @@ cpu6_opp16: opp-2553600000 {
> 		};
> 	};
> 
>-	memory@80000000 {
>-		device_type = "memory";
>-		/* We expect the bootloader to fill in the size */
>-		reg = <0 0x80000000 0 0>;
>-	};
>-
> 	pmu {
> 		compatible = "arm,armv8-pmuv3";
> 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> 	};
> 
>-	firmware {
>-		scm {
>-			compatible = "qcom,scm-sc7180", "qcom,scm";
>+	psci {
>+		compatible = "arm,psci-1.0";
>+		method = "smc";
>+	};
>+
>+	reserved_memory: reserved-memory {
>+		#address-cells = <2>;
>+		#size-cells = <2>;
>+		ranges;
>+
>+		hyp_mem: memory@80000000 {
>+			reg = <0x0 0x80000000 0x0 0x600000>;
>+			no-map;
>+		};
>+
>+		xbl_mem: memory@80600000 {
>+			reg = <0x0 0x80600000 0x0 0x200000>;
>+			no-map;
>+		};
>+
>+		aop_mem: memory@80800000 {
>+			reg = <0x0 0x80800000 0x0 0x20000>;
>+			no-map;
>+		};
>+
>+		aop_cmd_db_mem: memory@80820000 {
>+			reg = <0x0 0x80820000 0x0 0x20000>;
>+			compatible = "qcom,cmd-db";
>+			no-map;
>+		};
>+
>+		sec_apps_mem: memory@808ff000 {
>+			reg = <0x0 0x808ff000 0x0 0x1000>;
>+			no-map;
>+		};
>+
>+		smem_mem: memory@80900000 {
>+			reg = <0x0 0x80900000 0x0 0x200000>;
>+			no-map;
>+		};
>+
>+		tz_mem: memory@80b00000 {
>+			reg = <0x0 0x80b00000 0x0 0x3900000>;
>+			no-map;
>+		};
>+
>+		ipa_fw_mem: memory@8b700000 {
>+			reg = <0 0x8b700000 0 0x10000>;
>+			no-map;
>+		};
>+
>+		rmtfs_mem: memory@94600000 {
>+			compatible = "qcom,rmtfs-mem";
>+			reg = <0x0 0x94600000 0x0 0x200000>;
>+			no-map;
>+
>+			qcom,client-id = <1>;
>+			qcom,vmid = <15>;
> 		};
> 	};
> 
>@@ -640,11 +645,6 @@ ipa_smp2p_in: ipa-modem-to-ap {
> 		};
> 	};
> 
>-	psci {
>-		compatible = "arm,psci-1.0";
>-		method = "smc";
>-	};
>-
> 	soc: soc@0 {
> 		#address-cells = <2>;
> 		#size-cells = <2>;

-- 
With best wishes
Dmitry

Re: [PATCH v2 2/6] arm64: dts: qcom: sdm845: order top-level nodes alphabetically

[Dmitry Baryshkov]

On 12 December 2022 13:02:28 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>Order top-level nodes like memory, reserved-memory, opp-table-cpu
>alphabetically for easier code maintenance.  No functional change (same
>dtx_diff, except phandle changes).
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>


>
>---
>
>Changes since v1:
>1. New patch
>---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 384 +++++++++++++--------------
> 1 file changed, 192 insertions(+), 192 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>index a63dbd12230f..88e7d4061aae 100644
>--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>@@ -69,122 +69,18 @@ aliases {
> 
> 	chosen { };
> 
>-	memory@80000000 {
>-		device_type = "memory";
>-		/* We expect the bootloader to fill in the size */
>-		reg = <0 0x80000000 0 0>;
>-	};
>-
>-	reserved-memory {
>-		#address-cells = <2>;
>-		#size-cells = <2>;
>-		ranges;
>-
>-		hyp_mem: hyp-mem@85700000 {
>-			reg = <0 0x85700000 0 0x600000>;
>-			no-map;
>-		};
>-
>-		xbl_mem: xbl-mem@85e00000 {
>-			reg = <0 0x85e00000 0 0x100000>;
>-			no-map;
>-		};
>-
>-		aop_mem: aop-mem@85fc0000 {
>-			reg = <0 0x85fc0000 0 0x20000>;
>-			no-map;
>-		};
>-
>-		aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 {
>-			compatible = "qcom,cmd-db";
>-			reg = <0x0 0x85fe0000 0 0x20000>;
>-			no-map;
>-		};
>-
>-		smem@86000000 {
>-			compatible = "qcom,smem";
>-			reg = <0x0 0x86000000 0 0x200000>;
>-			no-map;
>-			hwlocks = <&tcsr_mutex 3>;
>-		};
>-
>-		tz_mem: tz@86200000 {
>-			reg = <0 0x86200000 0 0x2d00000>;
>-			no-map;
>-		};
>-
>-		rmtfs_mem: rmtfs@88f00000 {
>-			compatible = "qcom,rmtfs-mem";
>-			reg = <0 0x88f00000 0 0x200000>;
>-			no-map;
>-
>-			qcom,client-id = <1>;
>-			qcom,vmid = <15>;
>-		};
>-
>-		qseecom_mem: qseecom@8ab00000 {
>-			reg = <0 0x8ab00000 0 0x1400000>;
>-			no-map;
>-		};
>-
>-		camera_mem: camera-mem@8bf00000 {
>-			reg = <0 0x8bf00000 0 0x500000>;
>-			no-map;
>-		};
>-
>-		ipa_fw_mem: ipa-fw@8c400000 {
>-			reg = <0 0x8c400000 0 0x10000>;
>-			no-map;
>-		};
>-
>-		ipa_gsi_mem: ipa-gsi@8c410000 {
>-			reg = <0 0x8c410000 0 0x5000>;
>-			no-map;
>-		};
>-
>-		gpu_mem: gpu@8c415000 {
>-			reg = <0 0x8c415000 0 0x2000>;
>-			no-map;
>-		};
>-
>-		adsp_mem: adsp@8c500000 {
>-			reg = <0 0x8c500000 0 0x1a00000>;
>-			no-map;
>-		};
>-
>-		wlan_msa_mem: wlan-msa@8df00000 {
>-			reg = <0 0x8df00000 0 0x100000>;
>-			no-map;
>-		};
>-
>-		mpss_region: mpss@8e000000 {
>-			reg = <0 0x8e000000 0 0x7800000>;
>-			no-map;
>-		};
>-
>-		venus_mem: venus@95800000 {
>-			reg = <0 0x95800000 0 0x500000>;
>-			no-map;
>-		};
>-
>-		cdsp_mem: cdsp@95d00000 {
>-			reg = <0 0x95d00000 0 0x800000>;
>-			no-map;
>-		};
>-
>-		mba_region: mba@96500000 {
>-			reg = <0 0x96500000 0 0x200000>;
>-			no-map;
>-		};
>-
>-		slpi_mem: slpi@96700000 {
>-			reg = <0 0x96700000 0 0x1400000>;
>-			no-map;
>+	clocks {
>+		xo_board: xo-board {
>+			compatible = "fixed-clock";
>+			#clock-cells = <0>;
>+			clock-frequency = <38400000>;
>+			clock-output-names = "xo_board";
> 		};
> 
>-		spss_mem: spss@97b00000 {
>-			reg = <0 0x97b00000 0 0x100000>;
>-			no-map;
>+		sleep_clk: sleep-clk {
>+			compatible = "fixed-clock";
>+			#clock-cells = <0>;
>+			clock-frequency = <32764>;
> 		};
> 	};
> 
>@@ -436,6 +332,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
> 		};
> 	};
> 
>+	firmware {
>+		scm {
>+			compatible = "qcom,scm-sdm845", "qcom,scm";
>+		};
>+	};
>+
>+	memory@80000000 {
>+		device_type = "memory";
>+		/* We expect the bootloader to fill in the size */
>+		reg = <0 0x80000000 0 0>;
>+	};
>+
> 	cpu0_opp_table: opp-table-cpu0 {
> 		compatible = "operating-points-v2";
> 		opp-shared;
>@@ -701,32 +609,174 @@ pmu {
> 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> 	};
> 
>-	timer {
>-		compatible = "arm,armv8-timer";
>-		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
>-			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
>-			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
>-			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
>-	};
>+	psci: psci {
>+		compatible = "arm,psci-1.0";
>+		method = "smc";
> 
>-	clocks {
>-		xo_board: xo-board {
>-			compatible = "fixed-clock";
>-			#clock-cells = <0>;
>-			clock-frequency = <38400000>;
>-			clock-output-names = "xo_board";
>+		CPU_PD0: power-domain-cpu0 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> 		};
> 
>-		sleep_clk: sleep-clk {
>-			compatible = "fixed-clock";
>-			#clock-cells = <0>;
>-			clock-frequency = <32764>;
>+		CPU_PD1: power-domain-cpu1 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>+		};
>+
>+		CPU_PD2: power-domain-cpu2 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>+		};
>+
>+		CPU_PD3: power-domain-cpu3 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>+		};
>+
>+		CPU_PD4: power-domain-cpu4 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>+		};
>+
>+		CPU_PD5: power-domain-cpu5 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>+		};
>+
>+		CPU_PD6: power-domain-cpu6 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>+		};
>+
>+		CPU_PD7: power-domain-cpu7 {
>+			#power-domain-cells = <0>;
>+			power-domains = <&CLUSTER_PD>;
>+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>+		};
>+
>+		CLUSTER_PD: power-domain-cluster {
>+			#power-domain-cells = <0>;
>+			domain-idle-states = <&CLUSTER_SLEEP_0>;
> 		};
> 	};
> 
>-	firmware {
>-		scm {
>-			compatible = "qcom,scm-sdm845", "qcom,scm";
>+	reserved-memory {
>+		#address-cells = <2>;
>+		#size-cells = <2>;
>+		ranges;
>+
>+		hyp_mem: hyp-mem@85700000 {
>+			reg = <0 0x85700000 0 0x600000>;
>+			no-map;
>+		};
>+
>+		xbl_mem: xbl-mem@85e00000 {
>+			reg = <0 0x85e00000 0 0x100000>;
>+			no-map;
>+		};
>+
>+		aop_mem: aop-mem@85fc0000 {
>+			reg = <0 0x85fc0000 0 0x20000>;
>+			no-map;
>+		};
>+
>+		aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 {
>+			compatible = "qcom,cmd-db";
>+			reg = <0x0 0x85fe0000 0 0x20000>;
>+			no-map;
>+		};
>+
>+		smem@86000000 {
>+			compatible = "qcom,smem";
>+			reg = <0x0 0x86000000 0 0x200000>;
>+			no-map;
>+			hwlocks = <&tcsr_mutex 3>;
>+		};
>+
>+		tz_mem: tz@86200000 {
>+			reg = <0 0x86200000 0 0x2d00000>;
>+			no-map;
>+		};
>+
>+		rmtfs_mem: rmtfs@88f00000 {
>+			compatible = "qcom,rmtfs-mem";
>+			reg = <0 0x88f00000 0 0x200000>;
>+			no-map;
>+
>+			qcom,client-id = <1>;
>+			qcom,vmid = <15>;
>+		};
>+
>+		qseecom_mem: qseecom@8ab00000 {
>+			reg = <0 0x8ab00000 0 0x1400000>;
>+			no-map;
>+		};
>+
>+		camera_mem: camera-mem@8bf00000 {
>+			reg = <0 0x8bf00000 0 0x500000>;
>+			no-map;
>+		};
>+
>+		ipa_fw_mem: ipa-fw@8c400000 {
>+			reg = <0 0x8c400000 0 0x10000>;
>+			no-map;
>+		};
>+
>+		ipa_gsi_mem: ipa-gsi@8c410000 {
>+			reg = <0 0x8c410000 0 0x5000>;
>+			no-map;
>+		};
>+
>+		gpu_mem: gpu@8c415000 {
>+			reg = <0 0x8c415000 0 0x2000>;
>+			no-map;
>+		};
>+
>+		adsp_mem: adsp@8c500000 {
>+			reg = <0 0x8c500000 0 0x1a00000>;
>+			no-map;
>+		};
>+
>+		wlan_msa_mem: wlan-msa@8df00000 {
>+			reg = <0 0x8df00000 0 0x100000>;
>+			no-map;
>+		};
>+
>+		mpss_region: mpss@8e000000 {
>+			reg = <0 0x8e000000 0 0x7800000>;
>+			no-map;
>+		};
>+
>+		venus_mem: venus@95800000 {
>+			reg = <0 0x95800000 0 0x500000>;
>+			no-map;
>+		};
>+
>+		cdsp_mem: cdsp@95d00000 {
>+			reg = <0 0x95d00000 0 0x800000>;
>+			no-map;
>+		};
>+
>+		mba_region: mba@96500000 {
>+			reg = <0 0x96500000 0 0x200000>;
>+			no-map;
>+		};
>+
>+		slpi_mem: slpi@96700000 {
>+			reg = <0 0x96700000 0 0x1400000>;
>+			no-map;
>+		};
>+
>+		spss_mem: spss@97b00000 {
>+			reg = <0 0x97b00000 0 0x100000>;
>+			no-map;
> 		};
> 	};
> 
>@@ -1018,64 +1068,6 @@ slpi_smp2p_in: slave-kernel {
> 		};
> 	};
> 
>-	psci: psci {
>-		compatible = "arm,psci-1.0";
>-		method = "smc";
>-
>-		CPU_PD0: power-domain-cpu0 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>-		};
>-
>-		CPU_PD1: power-domain-cpu1 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>-		};
>-
>-		CPU_PD2: power-domain-cpu2 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>-		};
>-
>-		CPU_PD3: power-domain-cpu3 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
>-		};
>-
>-		CPU_PD4: power-domain-cpu4 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>-		};
>-
>-		CPU_PD5: power-domain-cpu5 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>-		};
>-
>-		CPU_PD6: power-domain-cpu6 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>-		};
>-
>-		CPU_PD7: power-domain-cpu7 {
>-			#power-domain-cells = <0>;
>-			power-domains = <&CLUSTER_PD>;
>-			domain-idle-states = <&BIG_CPU_SLEEP_0>;
>-		};
>-
>-		CLUSTER_PD: power-domain-cluster {
>-			#power-domain-cells = <0>;
>-			domain-idle-states = <&CLUSTER_SLEEP_0>;
>-		};
>-	};
>-
> 	soc: soc@0 {
> 		#address-cells = <2>;
> 		#size-cells = <2>;
>@@ -5771,4 +5763,12 @@ modem_alert0: trip-point0 {
> 			};
> 		};
> 	};
>+
>+	timer {
>+		compatible = "arm,armv8-timer";
>+		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
>+			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
>+			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
>+			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
>+	};
> };

-- 
With best wishes
Dmitry

Re: [PATCH v2 3/6] arm64: dts: qcom: sc7180: move QUP and QSPI opp tables out of SoC node

[Dmitry Baryshkov]

On 12 December 2022 13:02:29 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>The SoC node is a simple-bus and its schema expect to have nodes only
>with unit addresses:
>
>  sc7180-trogdor-lazor-r3.dtb: soc@0: opp-table-qspi: {'compatible': ['operating-points-v2'], 'phandle': [[186]], 'opp-75000000':
>    ...  'required-opps': [[47]]}} should not be valid under {'type': 'object'}
>
>Move to top-level OPP tables:
> - QUP which is shared between multiple nodes,
> - QSPI which cannot be placed in its node due to address/size cells.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>

>
>---
>
>Changes since v1:
>1. Only rebase due to node reorderings.
>2. Add Rb tag.
>---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 76 ++++++++++++++--------------
> 1 file changed, 38 insertions(+), 38 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>index 6d3e86ce2936..eb1e1ea12ff6 100644
>--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>@@ -494,6 +494,44 @@ cpu6_opp16: opp-2553600000 {
> 		};
> 	};
> 
>+	qspi_opp_table: opp-table-qspi {
>+		compatible = "operating-points-v2";
>+
>+		opp-75000000 {
>+			opp-hz = /bits/ 64 <75000000>;
>+			required-opps = <&rpmhpd_opp_low_svs>;
>+		};
>+
>+		opp-150000000 {
>+			opp-hz = /bits/ 64 <150000000>;
>+			required-opps = <&rpmhpd_opp_svs>;
>+		};
>+
>+		opp-300000000 {
>+			opp-hz = /bits/ 64 <300000000>;
>+			required-opps = <&rpmhpd_opp_nom>;
>+		};
>+	};
>+
>+	qup_opp_table: opp-table-qup {
>+		compatible = "operating-points-v2";
>+
>+		opp-75000000 {
>+			opp-hz = /bits/ 64 <75000000>;
>+			required-opps = <&rpmhpd_opp_low_svs>;
>+		};
>+
>+		opp-100000000 {
>+			opp-hz = /bits/ 64 <100000000>;
>+			required-opps = <&rpmhpd_opp_svs>;
>+		};
>+
>+		opp-128000000 {
>+			opp-hz = /bits/ 64 <128000000>;
>+			required-opps = <&rpmhpd_opp_nom>;
>+		};
>+	};
>+
> 	pmu {
> 		compatible = "arm,armv8-pmuv3";
> 		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
>@@ -739,25 +777,6 @@ opp-384000000 {
> 			};
> 		};
> 
>-		qup_opp_table: opp-table-qup {
>-			compatible = "operating-points-v2";
>-
>-			opp-75000000 {
>-				opp-hz = /bits/ 64 <75000000>;
>-				required-opps = <&rpmhpd_opp_low_svs>;
>-			};
>-
>-			opp-100000000 {
>-				opp-hz = /bits/ 64 <100000000>;
>-				required-opps = <&rpmhpd_opp_svs>;
>-			};
>-
>-			opp-128000000 {
>-				opp-hz = /bits/ 64 <128000000>;
>-				required-opps = <&rpmhpd_opp_nom>;
>-			};
>-		};
>-
> 		qupv3_id_0: geniqup@8c0000 {
> 			compatible = "qcom,geni-se-qup";
> 			reg = <0 0x008c0000 0 0x6000>;
>@@ -2655,25 +2674,6 @@ opp-202000000 {
> 			};
> 		};
> 
>-		qspi_opp_table: opp-table-qspi {
>-			compatible = "operating-points-v2";
>-
>-			opp-75000000 {
>-				opp-hz = /bits/ 64 <75000000>;
>-				required-opps = <&rpmhpd_opp_low_svs>;
>-			};
>-
>-			opp-150000000 {
>-				opp-hz = /bits/ 64 <150000000>;
>-				required-opps = <&rpmhpd_opp_svs>;
>-			};
>-
>-			opp-300000000 {
>-				opp-hz = /bits/ 64 <300000000>;
>-				required-opps = <&rpmhpd_opp_nom>;
>-			};
>-		};
>-
> 		qspi: spi@88dc000 {
> 			compatible = "qcom,sc7180-qspi", "qcom,qspi-v1";
> 			reg = <0 0x088dc000 0 0x600>;

-- 
With best wishes
Dmitry

Re: [PATCH v2 5/6] arm64: dts: qcom: sdm845: move sound node out of soc

[Dmitry Baryshkov]

On 12 December 2022 13:02:31 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>The sound node is not property of the soc, but rather board as it
>describes the sound configuration.  It also does not have unit address:
>
>  sdm845-shift-axolotl.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>

>
>---
>
>Changes since v1:
>1. Add Rb tag.
>---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>index 8eeb3aa261d5..5f1f7cb52c90 100644
>--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>@@ -3964,9 +3964,6 @@ lmh_cluster0: lmh@17d78800 {
> 			#interrupt-cells = <1>;
> 		};
> 
>-		sound: sound {
>-		};
>-
> 		usb_1_hsphy: phy@88e2000 {
> 			compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy";
> 			reg = <0 0x088e2000 0 0x400>;
>@@ -5341,6 +5338,9 @@ wifi: wifi@18800000 {
> 		};
> 	};
> 
>+	sound: sound {
>+	};
>+
> 	thermal-zones {
> 		cpu0-thermal {
> 			polling-delay-passive = <250>;

-- 
With best wishes
Dmitry

Re: [PATCH v2 6/6] arm64: dts: qcom: sm8250: move sound and codec nodes out of soc

[Dmitry Baryshkov]

On 12 December 2022 13:02:32 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>The sound and on-board WCD9380 codec nodes are not properties of the
>soc, but rather board as it describes the sound configuration.  They also
>does not have unit addresses:
>
>  sm8250-hdk.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>


>
>---
>
>Changes since v1:
>1. Add Rb tag.
>2. Rephrase commit msg.
>---
> arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 40 ++++++++++++-------------
> arch/arm64/boot/dts/qcom/sm8250.dtsi    |  6 ++--
> 2 files changed, 22 insertions(+), 24 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
>index 3ed8c84e25b8..b741b7da1afc 100644
>--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
>+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
>@@ -27,6 +27,25 @@ chosen {
> 		stdout-path = "serial0:115200n8";
> 	};
> 
>+	wcd938x: codec {
>+		compatible = "qcom,wcd9380-codec";
>+		#sound-dai-cells = <1>;
>+		reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
>+		vdd-buck-supply = <&vreg_s4a_1p8>;
>+		vdd-rxtx-supply = <&vreg_s4a_1p8>;
>+		vdd-io-supply = <&vreg_s4a_1p8>;
>+		vdd-mic-bias-supply = <&vreg_bob>;
>+		qcom,micbias1-microvolt = <1800000>;
>+		qcom,micbias2-microvolt = <1800000>;
>+		qcom,micbias3-microvolt = <1800000>;
>+		qcom,micbias4-microvolt = <1800000>;
>+		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
>+		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
>+		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
>+		qcom,rx-device = <&wcd_rx>;
>+		qcom,tx-device = <&wcd_tx>;
>+	};
>+
> 	thermal-zones {
> 		camera-thermal {
> 			polling-delay-passive = <0>;
>@@ -631,27 +650,6 @@ &slpi {
> 	firmware-name = "qcom/sm8250/slpi.mbn";
> };
> 
>-&soc {
>-	wcd938x: codec {
>-		compatible = "qcom,wcd9380-codec";
>-		#sound-dai-cells = <1>;
>-		reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
>-		vdd-buck-supply = <&vreg_s4a_1p8>;
>-		vdd-rxtx-supply = <&vreg_s4a_1p8>;
>-		vdd-io-supply = <&vreg_s4a_1p8>;
>-		vdd-mic-bias-supply = <&vreg_bob>;
>-		qcom,micbias1-microvolt = <1800000>;
>-		qcom,micbias2-microvolt = <1800000>;
>-		qcom,micbias3-microvolt = <1800000>;
>-		qcom,micbias4-microvolt = <1800000>;
>-		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
>-		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
>-		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
>-		qcom,rx-device = <&wcd_rx>;
>-		qcom,tx-device = <&wcd_tx>;
>-	};
>-};
>-
> &sound {
> 	compatible = "qcom,sm8250-sndcard";
> 	model = "SM8250-MTP-WCD9380-WSA8810-VA-DMIC";
>diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>index d517d6a80bdc..fbbbae29e0c2 100644
>--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>@@ -2826,9 +2826,6 @@ compute-cb@8 {
> 			};
> 		};
> 
>-		sound: sound {
>-		};
>-
> 		usb_1_hsphy: phy@88e3000 {
> 			compatible = "qcom,sm8250-usb-hs-phy",
> 				     "qcom,usb-snps-hs-7nm-phy";
>@@ -4910,6 +4907,9 @@ cpufreq_hw: cpufreq@18591000 {
> 		};
> 	};
> 
>+	sound: sound {
>+	};
>+
> 	timer {
> 		compatible = "arm,armv8-timer";
> 		interrupts = <GIC_PPI 13

-- 
With best wishes
Dmitry

Re: [PATCH v2 4/6] arm64: dts: qcom: sdm845: move DSI/QUP/QSPI opp tables out of SoC node

[Krzysztof Kozlowski]

On 12/12/2022 14:46, Dmitry Baryshkov wrote:
> 
> 
> On 12 December 2022 13:02:30 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>> The SoC node is a simple-bus and its schema expect to have nodes only
>> with unit addresses:
>>
>>  sdm850-lenovo-yoga-c630.dtb: soc@0: opp-table-qup: {'compatible': ['operating-points-v2'], 'phandle': [[60]], 'opp-50000000':
>>  ... 'required-opps': [[55]]}} should not be valid under {'type': 'object'}
>>
>> Move to top-level OPP tables:
>> - DSI and QUP which are shared between multiple nodes,
> 
> This makes me rise a question: on other platforms we have been placing the shared dsi opp table into one of DSI nodes (usually into the second one). Should we also move such tables up to the top level?

Hmm, indeed I see SM8250. The location of the table from
shared/non-shared point of view is one, but second problem is that DSI
has address/size cells. DTC has additional checks for certain buses thus
the QSPI table cannot be inside such node with address/size cells:

Warning (spi_bus_reg): /soc@0/spi@88dc000/opp-table: missing or empty
reg property

This check is not triggered for DSI, but the concept is the same here -
nodes with address/size cells are expected to have only properties, not
other objects. See simple-bus:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/simple-bus.yaml#L59


Best regards,
Krzysztof

Re: (subset) [PATCH v2 1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically

[Bjorn Andersson]

On Mon, 12 Dec 2022 11:02:27 +0100, Krzysztof Kozlowski wrote:
> Order top-level nodes like memory, reserved-memory, opp-table-cpu
> alphabetically for easier code maintenance.  No functional change (same
> dtx_diff).
> 
> 

Applied, thanks!

[1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically
      commit: 41d31fa487fe684ef130d002956b7915584cbabb
[2/6] arm64: dts: qcom: sdm845: order top-level nodes alphabetically
      commit: 3bd21131d884b58c0c14926a710241c521352346
[3/6] arm64: dts: qcom: sc7180: move QUP and QSPI opp tables out of SoC node
      (no commit info)
[4/6] arm64: dts: qcom: sdm845: move DSI/QUP/QSPI opp tables out of SoC node
      (no commit info)
[5/6] arm64: dts: qcom: sdm845: move sound node out of soc
      (no commit info)
[6/6] arm64: dts: qcom: sm8250: move sound and codec nodes out of soc
      (no commit info)

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>