* [PATCH] cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value
@ 2019-10-22 4:39 Anson Huang
2019-10-22 8:24 ` Viresh Kumar
0 siblings, 1 reply; 3+ messages in thread
From: Anson Huang @ 2019-10-22 4:39 UTC (permalink / raw)
To: rafael.j.wysocki, viresh.kumar, shawnguo, s.hauer, kernel,
festevam, linux-pm, linux-arm-kernel, linux-kernel
Cc: Linux-imx
i.MX8MN has different speed grade definition compared to
i.MX8MQ/i.MX8MM, when fuses are NOT written, the default
speed_grade should be set to minimum available OPP defined
in DT which is 1.2GHz, the corresponding speed_grade value
should be 0xb.
Fixes: 5b8010ba70d5 ("cpufreq: imx-cpufreq-dt: Add i.MX8MN support")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
drivers/cpufreq/imx-cpufreq-dt.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c
index 35db14c..26531f0 100644
--- a/drivers/cpufreq/imx-cpufreq-dt.c
+++ b/drivers/cpufreq/imx-cpufreq-dt.c
@@ -44,19 +44,19 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
/*
- * Early samples without fuses written report "0 0" which means
- * consumer segment and minimum speed grading.
- *
- * According to datasheet minimum speed grading is not supported for
- * consumer parts so clamp to 1 to avoid warning for "no OPPs"
+ * Early samples without fuses written report "0 0" which may NOT
+ * match any OPP defined in DT. So clamp to minimum OPP defined in
+ * DT to avoid warning for "no OPPs".
*
* Applies to i.MX8M series SoCs.
*/
- if (mkt_segment == 0 && speed_grade == 0 && (
- of_machine_is_compatible("fsl,imx8mm") ||
- of_machine_is_compatible("fsl,imx8mn") ||
- of_machine_is_compatible("fsl,imx8mq")))
- speed_grade = 1;
+ if (mkt_segment == 0 && speed_grade == 0) {
+ if (of_machine_is_compatible("fsl,imx8mm") ||
+ of_machine_is_compatible("fsl,imx8mq"))
+ speed_grade = 1;
+ if (of_machine_is_compatible("fsl,imx8mn"))
+ speed_grade = 0xb;
+ }
supported_hw[0] = BIT(speed_grade);
supported_hw[1] = BIT(mkt_segment);
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value
2019-10-22 4:39 [PATCH] cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value Anson Huang
@ 2019-10-22 8:24 ` Viresh Kumar
2019-10-22 8:36 ` Anson Huang
0 siblings, 1 reply; 3+ messages in thread
From: Viresh Kumar @ 2019-10-22 8:24 UTC (permalink / raw)
To: Anson Huang
Cc: rafael.j.wysocki, shawnguo, s.hauer, kernel, festevam, linux-pm,
linux-arm-kernel, linux-kernel, Linux-imx
On 22-10-19, 12:39, Anson Huang wrote:
> i.MX8MN has different speed grade definition compared to
> i.MX8MQ/i.MX8MM, when fuses are NOT written, the default
> speed_grade should be set to minimum available OPP defined
> in DT which is 1.2GHz, the corresponding speed_grade value
> should be 0xb.
>
> Fixes: 5b8010ba70d5 ("cpufreq: imx-cpufreq-dt: Add i.MX8MN support")
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> drivers/cpufreq/imx-cpufreq-dt.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c
> index 35db14c..26531f0 100644
> --- a/drivers/cpufreq/imx-cpufreq-dt.c
> +++ b/drivers/cpufreq/imx-cpufreq-dt.c
> @@ -44,19 +44,19 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
> mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
>
> /*
> - * Early samples without fuses written report "0 0" which means
> - * consumer segment and minimum speed grading.
> - *
> - * According to datasheet minimum speed grading is not supported for
> - * consumer parts so clamp to 1 to avoid warning for "no OPPs"
> + * Early samples without fuses written report "0 0" which may NOT
> + * match any OPP defined in DT. So clamp to minimum OPP defined in
> + * DT to avoid warning for "no OPPs".
> *
> * Applies to i.MX8M series SoCs.
> */
> - if (mkt_segment == 0 && speed_grade == 0 && (
> - of_machine_is_compatible("fsl,imx8mm") ||
> - of_machine_is_compatible("fsl,imx8mn") ||
> - of_machine_is_compatible("fsl,imx8mq")))
> - speed_grade = 1;
> + if (mkt_segment == 0 && speed_grade == 0) {
> + if (of_machine_is_compatible("fsl,imx8mm") ||
> + of_machine_is_compatible("fsl,imx8mq"))
of_machine_is_compatible should come right below the above
of_machine_is_compatible here, instead of a leading tab.
> + speed_grade = 1;
> + if (of_machine_is_compatible("fsl,imx8mn"))
> + speed_grade = 0xb;
> + }
>
> supported_hw[0] = BIT(speed_grade);
> supported_hw[1] = BIT(mkt_segment);
> --
> 2.7.4
--
viresh
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH] cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value
2019-10-22 8:24 ` Viresh Kumar
@ 2019-10-22 8:36 ` Anson Huang
0 siblings, 0 replies; 3+ messages in thread
From: Anson Huang @ 2019-10-22 8:36 UTC (permalink / raw)
To: Viresh Kumar
Cc: rafael.j.wysocki, shawnguo, s.hauer, kernel, festevam, linux-pm,
linux-arm-kernel, linux-kernel, dl-linux-imx
Hi, Viresh
> On 22-10-19, 12:39, Anson Huang wrote:
> > i.MX8MN has different speed grade definition compared to
> > i.MX8MQ/i.MX8MM, when fuses are NOT written, the default speed_grade
> > should be set to minimum available OPP defined in DT which is 1.2GHz,
> > the corresponding speed_grade value should be 0xb.
> >
> > Fixes: 5b8010ba70d5 ("cpufreq: imx-cpufreq-dt: Add i.MX8MN support")
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > drivers/cpufreq/imx-cpufreq-dt.c | 20 ++++++++++----------
> > 1 file changed, 10 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/cpufreq/imx-cpufreq-dt.c
> > b/drivers/cpufreq/imx-cpufreq-dt.c
> > index 35db14c..26531f0 100644
> > --- a/drivers/cpufreq/imx-cpufreq-dt.c
> > +++ b/drivers/cpufreq/imx-cpufreq-dt.c
> > @@ -44,19 +44,19 @@ static int imx_cpufreq_dt_probe(struct
> platform_device *pdev)
> > mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >>
> > OCOTP_CFG3_MKT_SEGMENT_SHIFT;
> >
> > /*
> > - * Early samples without fuses written report "0 0" which means
> > - * consumer segment and minimum speed grading.
> > - *
> > - * According to datasheet minimum speed grading is not supported
> for
> > - * consumer parts so clamp to 1 to avoid warning for "no OPPs"
> > + * Early samples without fuses written report "0 0" which may NOT
> > + * match any OPP defined in DT. So clamp to minimum OPP defined
> in
> > + * DT to avoid warning for "no OPPs".
> > *
> > * Applies to i.MX8M series SoCs.
> > */
> > - if (mkt_segment == 0 && speed_grade == 0 && (
> > - of_machine_is_compatible("fsl,imx8mm") ||
> > - of_machine_is_compatible("fsl,imx8mn") ||
> > - of_machine_is_compatible("fsl,imx8mq")))
> > - speed_grade = 1;
> > + if (mkt_segment == 0 && speed_grade == 0) {
> > + if (of_machine_is_compatible("fsl,imx8mm") ||
> > + of_machine_is_compatible("fsl,imx8mq"))
>
> of_machine_is_compatible should come right below the above
> of_machine_is_compatible here, instead of a leading tab.
Ah, yes, fixed in V2.
Thanks,
Anson
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-10-22 4:39 [PATCH] cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value Anson Huang
2019-10-22 8:24 ` Viresh Kumar
2019-10-22 8:36 ` Anson Huang
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