[PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

V2:
 use clk bulk API in driver to support backward compatibility.
 Include a new patch, patch 1.

The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
The current driver/dts/bindings use one CLK. Although it works with
with upstream kernel, but it not match the hardware design. If IPG
clock is disabled, the LPI2C will not work.

There are changes made to ARM32 i.MX7ULP dts, ARM64 i.MX8 dts, dt-bindings,
and the lpi2c driver.

The driver is updated to use bulk clk API to avoid break backward
compatibility. But it is hard to avoid dtbs_check pass, because the dts
and binding update are in separate patches.

Peng Fan (7):
  ARM: dts: imx7ulp: update the LPI2C clock-names
  dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk
  dt-bindings: i2c: i2c-imx-lpi2c: add dmas property
  dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93
  arm64: dts: imx8-ss-dma: add IPG clock for i2c
  ARM: dts: imx7ulp: Add IPG clock for lpi2c
  i2c: imx-lpi2c: use bulk clk API

 .../bindings/i2c/i2c-imx-lpi2c.yaml           | 20 +++++++++++++---
 arch/arm/boot/dts/imx7ulp.dtsi                | 10 ++++----
 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 20 +++++++++-------
 drivers/i2c/busses/i2c-imx-lpi2c.c            | 24 +++++++++----------
 4 files changed, 47 insertions(+), 27 deletions(-)

-- 
2.37.1

[PATCH V2 1/7] ARM: dts: imx7ulp: update the LPI2C clock-names

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The clock name should be per clock, not ipg clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/boot/dts/imx7ulp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index bcec98b96411..9c7abec90a89 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -329,7 +329,7 @@ lpi2c6: i2c@40a40000 {
 			reg = <0x40a40000 0x10000>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
-			clock-names = "ipg";
+			clock-names = "per";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
@@ -341,7 +341,7 @@ lpi2c7: i2c@40a50000 {
 			reg = <0x40a50000 0x10000>;
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
-			clock-names = "ipg";
+			clock-names = "per";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
-- 
2.37.1

[PATCH V2 2/7] dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX LPI2C actually requires dual clock: per clock and ipg clock, so add
both.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index 529bea56d324..e42e35003eae 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -37,10 +37,12 @@ properties:
   clock-frequency: true
 
   clock-names:
-    maxItems: 1
+    items:
+      - const: per
+      - const: ipg
 
   clocks:
-    maxItems: 1
+    maxItems: 2
 
   power-domains:
     maxItems: 1
@@ -63,5 +65,6 @@ examples:
         reg = <0x40A50000 0x10000>;
         interrupt-parent = <&intc>;
         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-        clocks = <&clks IMX7ULP_CLK_LPI2C7>;
+        clocks = <&clks IMX7ULP_CLK_LPI2C7>,
+                 <&clks IMX7ULP_CLK_NIC1_BUS_DIV>;
     };
-- 
2.37.1

[PATCH V2 3/7] dt-bindings: i2c: i2c-imx-lpi2c: add dmas property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX LPI2C has dma capability, so add dmas property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/i2c/i2c-imx-lpi2c.yaml         | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index e42e35003eae..08b81d57d7e1 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -44,6 +44,16 @@ properties:
   clocks:
     maxItems: 2
 
+  dmas:
+    items:
+      - description: DMA controller phandle and request line for TX
+      - description: DMA controller phandle and request line for RX
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
   power-domains:
     maxItems: 1
 
-- 
2.37.1

[PATCH V2 4/7] dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX93 LPI2C compatible string.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index 08b81d57d7e1..4656f5112b84 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -23,6 +23,7 @@ properties:
               - fsl,imx8dxl-lpi2c
               - fsl,imx8qm-lpi2c
               - fsl,imx8ulp-lpi2c
+              - fsl,imx93-lpi2c
           - const: fsl,imx7ulp-lpi2c
 
   reg:
-- 
2.37.1

[PATCH V2 5/7] arm64: dts: imx8-ss-dma: add IPG clock for i2c

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 20 +++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 960a802b8b6e..d7b4229bb4a2 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -111,8 +111,9 @@ uart3_lpcg: clock-controller@5a490000 {
 	i2c0: i2c@5a800000 {
 		reg = <0x5a800000 0x4000>;
 		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c0_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_0>;
@@ -122,8 +123,9 @@ i2c0: i2c@5a800000 {
 	i2c1: i2c@5a810000 {
 		reg = <0x5a810000 0x4000>;
 		interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c1_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_1>;
@@ -133,8 +135,9 @@ i2c1: i2c@5a810000 {
 	i2c2: i2c@5a820000 {
 		reg = <0x5a820000 0x4000>;
 		interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c2_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_2>;
@@ -144,8 +147,9 @@ i2c2: i2c@5a820000 {
 	i2c3: i2c@5a830000 {
 		reg = <0x5a830000 0x4000>;
 		interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c3_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_3>;
-- 
2.37.1

[PATCH V2 6/7] ARM: dts: imx7ulp: Add IPG clock for lpi2c

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

LPI2C requires two clocks, add the missed IPG clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/boot/dts/imx7ulp.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index 9c7abec90a89..7f7d2d5122fb 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -328,8 +328,9 @@ lpi2c6: i2c@40a40000 {
 			compatible = "fsl,imx7ulp-lpi2c";
 			reg = <0x40a40000 0x10000>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
-			clock-names = "per";
+			clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>,
+				 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
+			clock-names = "per", "ipg";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
@@ -340,8 +341,9 @@ lpi2c7: i2c@40a50000 {
 			compatible = "fsl,imx7ulp-lpi2c";
 			reg = <0x40a50000 0x10000>;
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
-			clock-names = "per";
+			clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>,
+				 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
+			clock-names = "per", "ipg";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
-- 
2.37.1

[PATCH V2 7/7] i2c: imx-lpi2c: use bulk clk API

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The current driver only support one clock, however LPI2C requires
two clocks: PER and IPG.

To make sure old dts could work with newer kernel, use bulk clk
API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/i2c/busses/i2c-imx-lpi2c.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c
index b51ab3cad2b1..159c2dc792b1 100644
--- a/drivers/i2c/busses/i2c-imx-lpi2c.c
+++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
@@ -94,7 +94,8 @@ enum lpi2c_imx_pincfg {
 
 struct lpi2c_imx_struct {
 	struct i2c_adapter	adapter;
-	struct clk		*clk;
+	int			num_clks;
+	struct clk_bulk_data	*clks;
 	void __iomem		*base;
 	__u8			*rx_buf;
 	__u8			*tx_buf;
@@ -207,7 +208,7 @@ static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
 
 	lpi2c_imx_set_mode(lpi2c_imx);
 
-	clk_rate = clk_get_rate(lpi2c_imx->clk);
+	clk_rate = clk_get_rate(lpi2c_imx->clks[0].clk);
 	if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
 		filt = 0;
 	else
@@ -561,11 +562,12 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
 	strscpy(lpi2c_imx->adapter.name, pdev->name,
 		sizeof(lpi2c_imx->adapter.name));
 
-	lpi2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
-	if (IS_ERR(lpi2c_imx->clk)) {
-		dev_err(&pdev->dev, "can't get I2C peripheral clock\n");
-		return PTR_ERR(lpi2c_imx->clk);
+	ret = devm_clk_bulk_get_all(&pdev->dev, &lpi2c_imx->clks);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "can't get I2C peripheral clock, ret=%d\n", ret);
+		return ret;
 	}
+	lpi2c_imx->num_clks = ret;
 
 	ret = of_property_read_u32(pdev->dev.of_node,
 				   "clock-frequency", &lpi2c_imx->bitrate);
@@ -582,11 +584,9 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
 	i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
 	platform_set_drvdata(pdev, lpi2c_imx);
 
-	ret = clk_prepare_enable(lpi2c_imx->clk);
-	if (ret) {
-		dev_err(&pdev->dev, "clk enable failed %d\n", ret);
+	ret = clk_bulk_prepare_enable(lpi2c_imx->num_clks, lpi2c_imx->clks);
+	if (ret)
 		return ret;
-	}
 
 	pm_runtime_set_autosuspend_delay(&pdev->dev, I2C_PM_TIMEOUT);
 	pm_runtime_use_autosuspend(&pdev->dev);
@@ -633,7 +633,7 @@ static int __maybe_unused lpi2c_runtime_suspend(struct device *dev)
 {
 	struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
 
-	clk_disable_unprepare(lpi2c_imx->clk);
+	clk_bulk_disable(lpi2c_imx->num_clks, lpi2c_imx->clks);
 	pinctrl_pm_select_sleep_state(dev);
 
 	return 0;
@@ -645,7 +645,7 @@ static int __maybe_unused lpi2c_runtime_resume(struct device *dev)
 	int ret;
 
 	pinctrl_pm_select_default_state(dev);
-	ret = clk_prepare_enable(lpi2c_imx->clk);
+	ret = clk_bulk_prepare_enable(lpi2c_imx->num_clks, lpi2c_imx->clks);
 	if (ret) {
 		dev_err(dev, "failed to enable I2C clock, ret=%d\n", ret);
 		return ret;
-- 
2.37.1

Re: [PATCH V2 7/7] i2c: imx-lpi2c: use bulk clk API

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 145 bytes --]


> -	clk_disable_unprepare(lpi2c_imx->clk);
> +	clk_bulk_disable(lpi2c_imx->num_clks, lpi2c_imx->clks);

Why is there no 'unprepare' with bulk?


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

RE: [PATCH V2 7/7] i2c: imx-lpi2c: use bulk clk API

[Peng Fan]

> Subject: Re: [PATCH V2 7/7] i2c: imx-lpi2c: use bulk clk API
> 
> 
> > -	clk_disable_unprepare(lpi2c_imx->clk);
> > +	clk_bulk_disable(lpi2c_imx->num_clks, lpi2c_imx->clks);
> 
> Why is there no 'unprepare' with bulk?

My bad, will fix in V3.

Thanks,
Peng.

RE: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

> Subject: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

+ Wolfram Sang I2C maintainer.

Krzysztof,

Do you have time to give a look whether this patchset is ok for you?
Please forgive if this is too early ping. Some i.MX93 dts update pending

Thanks,
Peng.

> 
> From: Peng Fan <peng.fan@nxp.com>
> 
> V2:
>  use clk bulk API in driver to support backward compatibility.
>  Include a new patch, patch 1.
> 
> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> The current driver/dts/bindings use one CLK. Although it works with with
> upstream kernel, but it not match the hardware design. If IPG clock is
> disabled, the LPI2C will not work.
> 
> There are changes made to ARM32 i.MX7ULP dts, ARM64 i.MX8 dts, dt-
> bindings, and the lpi2c driver.
> 
> The driver is updated to use bulk clk API to avoid break backward
> compatibility. But it is hard to avoid dtbs_check pass, because the dts and
> binding update are in separate patches.
> 
> Peng Fan (7):
>   ARM: dts: imx7ulp: update the LPI2C clock-names
>   dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk
>   dt-bindings: i2c: i2c-imx-lpi2c: add dmas property
>   dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93
>   arm64: dts: imx8-ss-dma: add IPG clock for i2c
>   ARM: dts: imx7ulp: Add IPG clock for lpi2c
>   i2c: imx-lpi2c: use bulk clk API
> 
>  .../bindings/i2c/i2c-imx-lpi2c.yaml           | 20 +++++++++++++---
>  arch/arm/boot/dts/imx7ulp.dtsi                | 10 ++++----
>  .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 20 +++++++++-------
>  drivers/i2c/busses/i2c-imx-lpi2c.c            | 24 +++++++++----------
>  4 files changed, 47 insertions(+), 27 deletions(-)
> 
> --
> 2.37.1

Re: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 22/08/2022 11:46, Peng Fan wrote:
>> Subject: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock
> 
> + Wolfram Sang I2C maintainer.
> 
> Krzysztof,
> 
> Do you have time to give a look whether this patchset is ok for you?
> Please forgive if this is too early ping. Some i.MX93 dts update pending
> 

I don't understand the ping. You got everything needed from us, why
still pinging? What that DTS has anything to do with us?

Best regards,
Krzysztof

RE: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

> Subject: Re: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock
> 
> On 22/08/2022 11:46, Peng Fan wrote:
> >> Subject: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock
> >
> > + Wolfram Sang I2C maintainer.
> >
> > Krzysztof,
> >
> > Do you have time to give a look whether this patchset is ok for you?
> > Please forgive if this is too early ping. Some i.MX93 dts update
> > pending
> >
> 
> I don't understand the ping. You got everything needed from us, why still
> pinging? What that DTS has anything to do with us?

In last version, you raised a comment that the driver patch broke ABI, not
backward compatible. So I updated the driver patch to be backward
compatible in V3 :)

Thanks for your review for the binding patches, I have included your tag in V3
For driver/dts part, I2C & i.MX maintainer will review.

Thanks,
Peng.

> 
> Best regards,
> Krzysztof

Re: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 23/08/2022 15:49, Peng Fan wrote:
>> Subject: Re: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock
>>
>> On 22/08/2022 11:46, Peng Fan wrote:
>>>> Subject: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock
>>>
>>> + Wolfram Sang I2C maintainer.
>>>
>>> Krzysztof,
>>>
>>> Do you have time to give a look whether this patchset is ok for you?
>>> Please forgive if this is too early ping. Some i.MX93 dts update
>>> pending
>>>
>>
>> I don't understand the ping. You got everything needed from us, why still
>> pinging? What that DTS has anything to do with us?
> 
> In last version, you raised a comment that the driver patch broke ABI, not
> backward compatible. So I updated the driver patch to be backward
> compatible in V3 :)

Awesome! But you don't need my ack after such update. The ack or review
is expected from maintainers and I am not the maintainer of IMX I2C
driver or IMX platform/DTS. There is no need in pinging folks just for
some comments. We are all too busy...

Please read:

https://elixir.bootlin.com/linux/v5.19/source/Documentation/process/submitting-patches.rst

https://elixir.bootlin.com/linux/v5.19/source/Documentation/process/1.Intro.rst
https://elixir.bootlin.com/linux/v5.19/source/Documentation/process/5.Posting.rst
https://elixir.bootlin.com/linux/v5.19/source/Documentation/process/6.Followthrough.rst


Best regards,
Krzysztof

Re: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[wsa]

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Hi Krzysztof,

> Awesome! But you don't need my ack after such update. The ack or review
> is expected from maintainers and I am not the maintainer of IMX I2C
> driver or IMX platform/DTS.

Despite the fact that the ping was in deed too early, I think Peng Fan
has a point. If you suggest a change (Thanks a ton for that!), a quick
comment on the new version if the change reflects what you had in mind,
is fair, I'd say. Something like "Yeah, looks basically good, but the
maintainers have to check the details." I understand the "all too busy"
part, of course...

Thanks,

   Wolfram


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RE: [PATCH V2 0/7] i2c-imx-lpi2c: add IPG clock

[Aisheng Dong]

> From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> Sent: 2022年8月16日 20:55
> 
> V2:
>  use clk bulk API in driver to support backward compatibility.
>  Include a new patch, patch 1.
> 
> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> The current driver/dts/bindings use one CLK. Although it works with with
> upstream kernel, but it not match the hardware design. If IPG clock is disabled,
> the LPI2C will not work.
> 
> There are changes made to ARM32 i.MX7ULP dts, ARM64 i.MX8 dts,
> dt-bindings, and the lpi2c driver.
> 
> The driver is updated to use bulk clk API to avoid break backward compatibility.
> But it is hard to avoid dtbs_check pass, because the dts and binding update are
> in separate patches.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>

Regards
Aisheng