* [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec
@ 2021-06-19 14:36 Mirela Rabulea (OSS)
2021-06-19 14:36 ` [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM " Mirela Rabulea (OSS)
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Mirela Rabulea (OSS) @ 2021-06-19 14:36 UTC (permalink / raw)
To: robh+dt, shawnguo, aisheng.dong, guoniu.zhou, linux-arm-kernel, mchehab
Cc: peng.fan, s.hauer, linux-imx, devicetree, hverkuil-cisco,
linux-media, linux-kernel, paul.kocialkowski, daniel.baluta,
robert.chiras, laurentiu.palcu, p.zabel, ezequiel, kernel,
Mirela Rabulea
From: Mirela Rabulea <mirela.rabulea@nxp.com>
Add the dts files for i.MX8QM/QXP JPEG codec.
The bindings for i.MX8QXP were already upstream, only update with i.MX8QM compatible.
Mirela Rabulea (2):
media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM JPEG codec
arm64: dts: imx8: Add jpeg encoder/decoder nodes
.../bindings/media/nxp,imx8-jpeg.yaml | 19 +++--
.../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 80 +++++++++++++++++++
.../boot/dts/freescale/imx8qm-ss-img.dtsi | 12 +++
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 +
.../boot/dts/freescale/imx8qxp-ss-img.dtsi | 13 +++
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 +
6 files changed, 121 insertions(+), 7 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi
--
2.17.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM JPEG codec 2021-06-19 14:36 [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec Mirela Rabulea (OSS) @ 2021-06-19 14:36 ` Mirela Rabulea (OSS) 2021-06-21 3:46 ` Aisheng Dong 2021-07-12 20:13 ` Rob Herring 2021-06-19 14:36 ` [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes Mirela Rabulea (OSS) 2021-07-14 7:45 ` [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec Shawn Guo 2 siblings, 2 replies; 10+ messages in thread From: Mirela Rabulea (OSS) @ 2021-06-19 14:36 UTC (permalink / raw) To: robh+dt, shawnguo, aisheng.dong, guoniu.zhou, linux-arm-kernel, mchehab Cc: peng.fan, s.hauer, linux-imx, devicetree, hverkuil-cisco, linux-media, linux-kernel, paul.kocialkowski, daniel.baluta, robert.chiras, laurentiu.palcu, p.zabel, ezequiel, kernel, Mirela Rabulea From: Mirela Rabulea <mirela.rabulea@nxp.com> Add two more compatibles: "nxp,imx8qm-jpgdec" and " nxp,imx8qm-jpgenc". Also update the compatible property to ensure mutually exclusive usage of encoder and decoder compatibles. Update examples. Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> --- Changes in v14: Address feedback from Aisheng Dong, do not use anyOf .../bindings/media/nxp,imx8-jpeg.yaml | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml index 5d13cbb5251b..3cc6f42aeb76 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml @@ -16,12 +16,17 @@ description: |- properties: compatible: - items: - - enum: - # JPEG decoder - - nxp,imx8qxp-jpgdec - # JPEG encoder - - nxp,imx8qxp-jpgenc + oneOf: + - items: + enum: + - nxp,imx8qxp-jpgdec + - nxp,imx8qxp-jpgenc + - items: + - const: nxp,imx8qm-jpgdec + - const: nxp,imx8qxp-jpgdec + - items: + - const: nxp,imx8qm-jpgenc + - const: nxp,imx8qxp-jpgenc reg: maxItems: 1 @@ -69,7 +74,7 @@ examples: }; jpegenc: jpegenc@58450000 { - compatible = "nxp,imx8qxp-jpgenc"; + compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc"; reg = <0x58450000 0x00050000 >; interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, -- 2.17.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* RE: [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM JPEG codec 2021-06-19 14:36 ` [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM " Mirela Rabulea (OSS) @ 2021-06-21 3:46 ` Aisheng Dong 2021-07-12 20:13 ` Rob Herring 1 sibling, 0 replies; 10+ messages in thread From: Aisheng Dong @ 2021-06-21 3:46 UTC (permalink / raw) To: Mirela Rabulea (OSS), robh+dt, shawnguo, G.n. Zhou, linux-arm-kernel, mchehab Cc: Peng Fan, s.hauer, dl-linux-imx, devicetree, hverkuil-cisco, linux-media, linux-kernel, paul.kocialkowski, Daniel Baluta, Robert Chiras, Laurentiu Palcu, p.zabel, ezequiel, kernel, Mirela Rabulea > From: Mirela Rabulea (OSS) <mirela.rabulea@oss.nxp.com> > Sent: Saturday, June 19, 2021 10:36 PM > Subject: [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for > i.MX8QM JPEG codec Nitpick: we usually put dt-bindings first. e.g. dt-bindings: media: xxx Anyway it's small problem, so: Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Regards Aisheng > > Add two more compatibles: "nxp,imx8qm-jpgdec" and " nxp,imx8qm-jpgenc". > Also update the compatible property to ensure mutually exclusive usage of > encoder and decoder compatibles. > Update examples. > > Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> > --- > Changes in v14: > Address feedback from Aisheng Dong, do not use anyOf > > .../bindings/media/nxp,imx8-jpeg.yaml | 19 ++++++++++++------- > 1 file changed, 12 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml > b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml > index 5d13cbb5251b..3cc6f42aeb76 100644 > --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml > +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml > @@ -16,12 +16,17 @@ description: |- > > properties: > compatible: > - items: > - - enum: > - # JPEG decoder > - - nxp,imx8qxp-jpgdec > - # JPEG encoder > - - nxp,imx8qxp-jpgenc > + oneOf: > + - items: > + enum: > + - nxp,imx8qxp-jpgdec > + - nxp,imx8qxp-jpgenc > + - items: > + - const: nxp,imx8qm-jpgdec > + - const: nxp,imx8qxp-jpgdec > + - items: > + - const: nxp,imx8qm-jpgenc > + - const: nxp,imx8qxp-jpgenc > > reg: > maxItems: 1 > @@ -69,7 +74,7 @@ examples: > }; > > jpegenc: jpegenc@58450000 { > - compatible = "nxp,imx8qxp-jpgenc"; > + compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc"; > reg = <0x58450000 0x00050000 >; > interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, > -- > 2.17.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM JPEG codec 2021-06-19 14:36 ` [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM " Mirela Rabulea (OSS) 2021-06-21 3:46 ` Aisheng Dong @ 2021-07-12 20:13 ` Rob Herring 1 sibling, 0 replies; 10+ messages in thread From: Rob Herring @ 2021-07-12 20:13 UTC (permalink / raw) To: Mirela Rabulea (OSS) Cc: devicetree, robert.chiras, linux-arm-kernel, daniel.baluta, hverkuil-cisco, peng.fan, aisheng.dong, linux-kernel, linux-imx, s.hauer, Mirela Rabulea, laurentiu.palcu, guoniu.zhou, paul.kocialkowski, mchehab, robh+dt, linux-media, shawnguo, kernel, ezequiel, p.zabel On Sat, 19 Jun 2021 17:36:10 +0300, Mirela Rabulea (OSS) wrote: > From: Mirela Rabulea <mirela.rabulea@nxp.com> > > Add two more compatibles: "nxp,imx8qm-jpgdec" and " nxp,imx8qm-jpgenc". > Also update the compatible property to ensure mutually exclusive usage of > encoder and decoder compatibles. > Update examples. > > Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> > --- > Changes in v14: > Address feedback from Aisheng Dong, do not use anyOf > > .../bindings/media/nxp,imx8-jpeg.yaml | 19 ++++++++++++------- > 1 file changed, 12 insertions(+), 7 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes 2021-06-19 14:36 [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec Mirela Rabulea (OSS) 2021-06-19 14:36 ` [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM " Mirela Rabulea (OSS) @ 2021-06-19 14:36 ` Mirela Rabulea (OSS) 2021-06-21 3:50 ` Aisheng Dong 2021-09-14 7:11 ` Hans Verkuil 2021-07-14 7:45 ` [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec Shawn Guo 2 siblings, 2 replies; 10+ messages in thread From: Mirela Rabulea (OSS) @ 2021-06-19 14:36 UTC (permalink / raw) To: robh+dt, shawnguo, aisheng.dong, guoniu.zhou, linux-arm-kernel, mchehab Cc: peng.fan, s.hauer, linux-imx, devicetree, hverkuil-cisco, linux-media, linux-kernel, paul.kocialkowski, daniel.baluta, robert.chiras, laurentiu.palcu, p.zabel, ezequiel, kernel, Mirela Rabulea From: Mirela Rabulea <mirela.rabulea@nxp.com> Add dts for imaging subsytem, include jpeg nodes here. Tested on imx8qxp/qm. Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> --- Changes in v14: Address feedback from Aisheng Dong and Ezequiel Garcia: - use imx8 instead of imx in patch subject - keep jpeg and LPCGs used by jpeg enabled by default in platform dts (no change here) .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 80 +++++++++++++++++++ .../boot/dts/freescale/imx8qm-ss-img.dtsi | 12 +++ arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 + .../boot/dts/freescale/imx8qxp-ss-img.dtsi | 13 +++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 + 5 files changed, 109 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi new file mode 100644 index 000000000000..a90654155a88 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2021 NXP + * Zhou Guoniu <guoniu.zhou@nxp.com> + */ +img_subsys: bus@58000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x58000000 0x0 0x58000000 0x1000000>; + + img_ipg_clk: clock-img-ipg { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "img_ipg_clk"; + }; + + jpegdec: jpegdec@58400000 { + reg = <0x58400000 0x00050000>; + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; + assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; + assigned-clock-rates = <200000000>, <200000000>; + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, + <&pd IMX_SC_R_MJPEG_DEC_S0>, + <&pd IMX_SC_R_MJPEG_DEC_S1>, + <&pd IMX_SC_R_MJPEG_DEC_S2>, + <&pd IMX_SC_R_MJPEG_DEC_S3>; + }; + + jpegenc: jpegenc@58450000 { + reg = <0x58450000 0x00050000>; + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; + assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; + assigned-clock-rates = <200000000>, <200000000>; + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, + <&pd IMX_SC_R_MJPEG_ENC_S0>, + <&pd IMX_SC_R_MJPEG_ENC_S1>, + <&pd IMX_SC_R_MJPEG_ENC_S2>, + <&pd IMX_SC_R_MJPEG_ENC_S3>; + }; + + img_jpeg_dec_lpcg: clock-controller@585d0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x585d0000 0x10000>; + #clock-cells = <1>; + clocks = <&img_ipg_clk>, <&img_ipg_clk>; + clock-indices = <IMX_LPCG_CLK_0>, + <IMX_LPCG_CLK_4>; + clock-output-names = "img_jpeg_dec_lpcg_clk", + "img_jpeg_dec_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>; + }; + + img_jpeg_enc_lpcg: clock-controller@585f0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x585f0000 0x10000>; + #clock-cells = <1>; + clocks = <&img_ipg_clk>, <&img_ipg_clk>; + clock-indices = <IMX_LPCG_CLK_0>, + <IMX_LPCG_CLK_4>; + clock-output-names = "img_jpeg_enc_lpcg_clk", + "img_jpeg_enc_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi new file mode 100644 index 000000000000..7764b4146e0a --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 NXP + */ + +&jpegdec { + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec"; +}; + +&jpegenc { + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 12cd059b339b..aebbe2b84aa1 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -166,11 +166,13 @@ }; /* sorted in register address */ + #include "imx8-ss-img.dtsi" #include "imx8-ss-dma.dtsi" #include "imx8-ss-conn.dtsi" #include "imx8-ss-lsio.dtsi" }; +#include "imx8qm-ss-img.dtsi" #include "imx8qm-ss-dma.dtsi" #include "imx8qm-ss-conn.dtsi" #include "imx8qm-ss-lsio.dtsi" diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi new file mode 100644 index 000000000000..3a087317591d --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 NXP + * Dong Aisheng <aisheng.dong@nxp.com> + */ + +&jpegdec { + compatible = "nxp,imx8qxp-jpgdec"; +}; + +&jpegenc { + compatible = "nxp,imx8qxp-jpgenc"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 1e6b4995091e..a625fb6bdc62 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -258,12 +258,14 @@ }; /* sorted in register address */ + #include "imx8-ss-img.dtsi" #include "imx8-ss-adma.dtsi" #include "imx8-ss-conn.dtsi" #include "imx8-ss-ddr.dtsi" #include "imx8-ss-lsio.dtsi" }; +#include "imx8qxp-ss-img.dtsi" #include "imx8qxp-ss-adma.dtsi" #include "imx8qxp-ss-conn.dtsi" #include "imx8qxp-ss-lsio.dtsi" -- 2.17.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* RE: [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes 2021-06-19 14:36 ` [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes Mirela Rabulea (OSS) @ 2021-06-21 3:50 ` Aisheng Dong 2021-09-14 7:11 ` Hans Verkuil 1 sibling, 0 replies; 10+ messages in thread From: Aisheng Dong @ 2021-06-21 3:50 UTC (permalink / raw) To: Mirela Rabulea (OSS), robh+dt, shawnguo, G.n. Zhou, linux-arm-kernel, mchehab Cc: Peng Fan, s.hauer, dl-linux-imx, devicetree, hverkuil-cisco, linux-media, linux-kernel, paul.kocialkowski, Daniel Baluta, Robert Chiras, Laurentiu Palcu, p.zabel, ezequiel, kernel, Mirela Rabulea > From: Mirela Rabulea (OSS) <mirela.rabulea@oss.nxp.com> > Sent: Saturday, June 19, 2021 10:36 PM > > Add dts for imaging subsytem, include jpeg nodes here. > Tested on imx8qxp/qm. > > Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Regards Aisheng > --- > Changes in v14: > Address feedback from Aisheng Dong and Ezequiel Garcia: > - use imx8 instead of imx in patch subject > - keep jpeg and LPCGs used by jpeg enabled by default in platform dts (no > change here) > > .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 80 +++++++++++++++++++ > .../boot/dts/freescale/imx8qm-ss-img.dtsi | 12 +++ > arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 + > .../boot/dts/freescale/imx8qxp-ss-img.dtsi | 13 +++ > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 + > 5 files changed, 109 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > new file mode 100644 > index 000000000000..a90654155a88 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > @@ -0,0 +1,80 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2019-2021 NXP > + * Zhou Guoniu <guoniu.zhou@nxp.com> > + */ > +img_subsys: bus@58000000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x58000000 0x0 0x58000000 0x1000000>; > + > + img_ipg_clk: clock-img-ipg { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <200000000>; > + clock-output-names = "img_ipg_clk"; > + }; > + > + jpegdec: jpegdec@58400000 { > + reg = <0x58400000 0x00050000>; > + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > + assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > + assigned-clock-rates = <200000000>, <200000000>; > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, > + <&pd IMX_SC_R_MJPEG_DEC_S0>, > + <&pd IMX_SC_R_MJPEG_DEC_S1>, > + <&pd IMX_SC_R_MJPEG_DEC_S2>, > + <&pd IMX_SC_R_MJPEG_DEC_S3>; > + }; > + > + jpegenc: jpegenc@58450000 { > + reg = <0x58450000 0x00050000>; > + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > + assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > + assigned-clock-rates = <200000000>, <200000000>; > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, > + <&pd IMX_SC_R_MJPEG_ENC_S0>, > + <&pd IMX_SC_R_MJPEG_ENC_S1>, > + <&pd IMX_SC_R_MJPEG_ENC_S2>, > + <&pd IMX_SC_R_MJPEG_ENC_S3>; > + }; > + > + img_jpeg_dec_lpcg: clock-controller@585d0000 { > + compatible = "fsl,imx8qxp-lpcg"; > + reg = <0x585d0000 0x10000>; > + #clock-cells = <1>; > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > + clock-indices = <IMX_LPCG_CLK_0>, > + <IMX_LPCG_CLK_4>; > + clock-output-names = "img_jpeg_dec_lpcg_clk", > + "img_jpeg_dec_lpcg_ipg_clk"; > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>; > + }; > + > + img_jpeg_enc_lpcg: clock-controller@585f0000 { > + compatible = "fsl,imx8qxp-lpcg"; > + reg = <0x585f0000 0x10000>; > + #clock-cells = <1>; > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > + clock-indices = <IMX_LPCG_CLK_0>, > + <IMX_LPCG_CLK_4>; > + clock-output-names = "img_jpeg_enc_lpcg_clk", > + "img_jpeg_enc_lpcg_ipg_clk"; > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > new file mode 100644 > index 000000000000..7764b4146e0a > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > @@ -0,0 +1,12 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2021 NXP > + */ > + > +&jpegdec { > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec"; }; > + > +&jpegenc { > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc"; }; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > index 12cd059b339b..aebbe2b84aa1 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > @@ -166,11 +166,13 @@ > }; > > /* sorted in register address */ > + #include "imx8-ss-img.dtsi" > #include "imx8-ss-dma.dtsi" > #include "imx8-ss-conn.dtsi" > #include "imx8-ss-lsio.dtsi" > }; > > +#include "imx8qm-ss-img.dtsi" > #include "imx8qm-ss-dma.dtsi" > #include "imx8qm-ss-conn.dtsi" > #include "imx8qm-ss-lsio.dtsi" > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > new file mode 100644 > index 000000000000..3a087317591d > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > @@ -0,0 +1,13 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2021 NXP > + * Dong Aisheng <aisheng.dong@nxp.com> > + */ > + > +&jpegdec { > + compatible = "nxp,imx8qxp-jpgdec"; > +}; > + > +&jpegenc { > + compatible = "nxp,imx8qxp-jpgenc"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > index 1e6b4995091e..a625fb6bdc62 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > @@ -258,12 +258,14 @@ > }; > > /* sorted in register address */ > + #include "imx8-ss-img.dtsi" > #include "imx8-ss-adma.dtsi" > #include "imx8-ss-conn.dtsi" > #include "imx8-ss-ddr.dtsi" > #include "imx8-ss-lsio.dtsi" > }; > > +#include "imx8qxp-ss-img.dtsi" > #include "imx8qxp-ss-adma.dtsi" > #include "imx8qxp-ss-conn.dtsi" > #include "imx8qxp-ss-lsio.dtsi" > -- > 2.17.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes 2021-06-19 14:36 ` [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes Mirela Rabulea (OSS) 2021-06-21 3:50 ` Aisheng Dong @ 2021-09-14 7:11 ` Hans Verkuil 2021-09-14 10:42 ` [EXT] " Mirela Rabulea 1 sibling, 1 reply; 10+ messages in thread From: Hans Verkuil @ 2021-09-14 7:11 UTC (permalink / raw) To: Mirela Rabulea (OSS), robh+dt, shawnguo, aisheng.dong, guoniu.zhou, linux-arm-kernel, mchehab Cc: peng.fan, s.hauer, linux-imx, devicetree, linux-media, linux-kernel, paul.kocialkowski, daniel.baluta, robert.chiras, laurentiu.palcu, p.zabel, ezequiel, kernel, Mirela Rabulea Hi Mirela, On 19/06/2021 16:36, Mirela Rabulea (OSS) wrote: > From: Mirela Rabulea <mirela.rabulea@nxp.com> > > Add dts for imaging subsytem, include jpeg nodes here. > Tested on imx8qxp/qm. I've posted a pull request for the first bindings patch for v5.16, so this dts patch can be merged through whatever tree takes such dts patches. Regards, Hans > > Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> > --- > Changes in v14: > Address feedback from Aisheng Dong and Ezequiel Garcia: > - use imx8 instead of imx in patch subject > - keep jpeg and LPCGs used by jpeg enabled by default in platform dts (no change here) > > .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 80 +++++++++++++++++++ > .../boot/dts/freescale/imx8qm-ss-img.dtsi | 12 +++ > arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 + > .../boot/dts/freescale/imx8qxp-ss-img.dtsi | 13 +++ > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 + > 5 files changed, 109 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > new file mode 100644 > index 000000000000..a90654155a88 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > @@ -0,0 +1,80 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2019-2021 NXP > + * Zhou Guoniu <guoniu.zhou@nxp.com> > + */ > +img_subsys: bus@58000000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x58000000 0x0 0x58000000 0x1000000>; > + > + img_ipg_clk: clock-img-ipg { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <200000000>; > + clock-output-names = "img_ipg_clk"; > + }; > + > + jpegdec: jpegdec@58400000 { > + reg = <0x58400000 0x00050000>; > + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > + assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > + assigned-clock-rates = <200000000>, <200000000>; > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, > + <&pd IMX_SC_R_MJPEG_DEC_S0>, > + <&pd IMX_SC_R_MJPEG_DEC_S1>, > + <&pd IMX_SC_R_MJPEG_DEC_S2>, > + <&pd IMX_SC_R_MJPEG_DEC_S3>; > + }; > + > + jpegenc: jpegenc@58450000 { > + reg = <0x58450000 0x00050000>; > + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&img_jpeg_enc_lpcg IMX_LPC[GIT PULL FOR v5.16]G_CLK_0>, > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > + assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > + assigned-clock-rates = <200000000>, <200000000>; > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, > + <&pd IMX_SC_R_MJPEG_ENC_S0>, > + <&pd IMX_SC_R_MJPEG_ENC_S1>, > + <&pd IMX_SC_R_MJPEG_ENC_S2>, > + <&pd IMX_SC_R_MJPEG_ENC_S3>; > + }; > + > + img_jpeg_dec_lpcg: clock-controller@585d0000 { > + compatible = "fsl,imx8qxp-lpcg"; > + reg = <0x585d0000 0x10000>; > + #clock-cells = <1>; > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > + clock-indices = <IMX_LPCG_CLK_0>, > + <IMX_LPCG_CLK_4>; > + clock-output-names = "img_jpeg_dec_lpcg_clk", > + "img_jpeg_dec_lpcg_ipg_clk"; > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>; > + }; > + > + img_jpeg_enc_lpcg: clock-controller@585f0000 { > + compatible = "fsl,imx8qxp-lpcg"; > + reg = <0x585f0000 0x10000>; > + #clock-cells = <1>; > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > + clock-indices = <IMX_LPCG_CLK_0>, > + <IMX_LPCG_CLK_4>; > + clock-output-names = "img_jpeg_enc_lpcg_clk", > + "img_jpeg_enc_lpcg_ipg_clk"; > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > new file mode 100644 > index 000000000000..7764b4146e0a > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > @@ -0,0 +1,12 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2021 NXP > + */ > + > +&jpegdec { > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec"; > +}; > + > +&jpegenc { > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > index 12cd059b339b..aebbe2b84aa1 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > @@ -166,11 +166,13 @@ > }; > > /* sorted in register address */ > + #include "imx8-ss-img.dtsi" > #include "imx8-ss-dma.dtsi" > #include "imx8-ss-conn.dtsi" > #include "imx8-ss-lsio.dtsi" > }; > > +#include "imx8qm-ss-img.dtsi" > #include "imx8qm-ss-dma.dtsi" > #include "imx8qm-ss-conn.dtsi" > #include "imx8qm-ss-lsio.dtsi" > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > new file mode 100644 > index 000000000000..3a087317591d > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > @@ -0,0 +1,13 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2021 NXP > + * Dong Aisheng <aisheng.dong@nxp.com> > + */ > + > +&jpegdec { > + compatible = "nxp,imx8qxp-jpgdec"; > +}; > + > +&jpegenc { > + compatible = "nxp,imx8qxp-jpgenc"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > index 1e6b4995091e..a625fb6bdc62 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > @@ -258,12 +258,14 @@ > }; > > /* sorted in register address */ > + #include "imx8-ss-img.dtsi" > #include "imx8-ss-adma.dtsi" > #include "imx8-ss-conn.dtsi" > #include "imx8-ss-ddr.dtsi" > #include "imx8-ss-lsio.dtsi" > }; > > +#include "imx8qxp-ss-img.dtsi" > #include "imx8qxp-ss-adma.dtsi" > #include "imx8qxp-ss-conn.dtsi" > #include "imx8qxp-ss-lsio.dtsi" > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [EXT] Re: [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes 2021-09-14 7:11 ` Hans Verkuil @ 2021-09-14 10:42 ` Mirela Rabulea 2021-09-14 10:44 ` Hans Verkuil 0 siblings, 1 reply; 10+ messages in thread From: Mirela Rabulea @ 2021-09-14 10:42 UTC (permalink / raw) To: G.n. Zhou, Mirela Rabulea (OSS), shawnguo, linux-arm-kernel, hverkuil-cisco, mchehab, Aisheng Dong, robh+dt Cc: linux-media, Robert Chiras, dl-linux-imx, kernel, s.hauer, Peng Fan, devicetree, linux-kernel, Daniel Baluta, paul.kocialkowski, Laurentiu Palcu, p.zabel, ezequiel Hi Hans, On Tue, 2021-09-14 at 09:11 +0200, Hans Verkuil wrote: > Caution: EXT Email > > Hi Mirela, > > On 19/06/2021 16:36, Mirela Rabulea (OSS) wrote: > > From: Mirela Rabulea <mirela.rabulea@nxp.com> > > > > Add dts for imaging subsytem, include jpeg nodes here. > > Tested on imx8qxp/qm. > > I've posted a pull request for the first bindings patch for v5.16, so > this dts patch can be merged > through whatever tree takes such dts patches. Thanks for the notice. I see the patch is already in linux-next. Any more action required from my behalf? Regards, Mirela > > Regards, > > Hans > > > Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> > > --- > > Changes in v14: > > Address feedback from Aisheng Dong and Ezequiel Garcia: > > - use imx8 instead of imx in patch subject > > - keep jpeg and LPCGs used by jpeg enabled by default in > > platform dts (no change here) > > > > .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 80 > > +++++++++++++++++++ > > .../boot/dts/freescale/imx8qm-ss-img.dtsi | 12 +++ > > arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 + > > .../boot/dts/freescale/imx8qxp-ss-img.dtsi | 13 +++ > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 + > > 5 files changed, 109 insertions(+) > > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss- > > img.dtsi > > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss- > > img.dtsi > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > > b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > > new file mode 100644 > > index 000000000000..a90654155a88 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi > > @@ -0,0 +1,80 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright 2019-2021 NXP > > + * Zhou Guoniu <guoniu.zhou@nxp.com> > > + */ > > +img_subsys: bus@58000000 { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0x58000000 0x0 0x58000000 0x1000000>; > > + > > + img_ipg_clk: clock-img-ipg { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <200000000>; > > + clock-output-names = "img_ipg_clk"; > > + }; > > + > > + jpegdec: jpegdec@58400000 { > > + reg = <0x58400000 0x00050000>; > > + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > > + clock-names = "per", "ipg"; > > + assigned-clocks = <&img_jpeg_dec_lpcg > > IMX_LPCG_CLK_0>, > > + <&img_jpeg_dec_lpcg > > IMX_LPCG_CLK_4>; > > + assigned-clock-rates = <200000000>, <200000000>; > > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, > > + <&pd IMX_SC_R_MJPEG_DEC_S0>, > > + <&pd IMX_SC_R_MJPEG_DEC_S1>, > > + <&pd IMX_SC_R_MJPEG_DEC_S2>, > > + <&pd IMX_SC_R_MJPEG_DEC_S3>; > > + }; > > + > > + jpegenc: jpegenc@58450000 { > > + reg = <0x58450000 0x00050000>; > > + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&img_jpeg_enc_lpcg IMX_LPC[GIT PULL FOR > > v5.16]G_CLK_0>, > > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > > + clock-names = "per", "ipg"; > > + assigned-clocks = <&img_jpeg_enc_lpcg > > IMX_LPCG_CLK_0>, > > + <&img_jpeg_enc_lpcg > > IMX_LPCG_CLK_4>; > > + assigned-clock-rates = <200000000>, <200000000>; > > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, > > + <&pd IMX_SC_R_MJPEG_ENC_S0>, > > + <&pd IMX_SC_R_MJPEG_ENC_S1>, > > + <&pd IMX_SC_R_MJPEG_ENC_S2>, > > + <&pd IMX_SC_R_MJPEG_ENC_S3>; > > + }; > > + > > + img_jpeg_dec_lpcg: clock-controller@585d0000 { > > + compatible = "fsl,imx8qxp-lpcg"; > > + reg = <0x585d0000 0x10000>; > > + #clock-cells = <1>; > > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > > + clock-indices = <IMX_LPCG_CLK_0>, > > + <IMX_LPCG_CLK_4>; > > + clock-output-names = "img_jpeg_dec_lpcg_clk", > > + "img_jpeg_dec_lpcg_ipg_clk"; > > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>; > > + }; > > + > > + img_jpeg_enc_lpcg: clock-controller@585f0000 { > > + compatible = "fsl,imx8qxp-lpcg"; > > + reg = <0x585f0000 0x10000>; > > + #clock-cells = <1>; > > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > > + clock-indices = <IMX_LPCG_CLK_0>, > > + <IMX_LPCG_CLK_4>; > > + clock-output-names = "img_jpeg_enc_lpcg_clk", > > + "img_jpeg_enc_lpcg_ipg_clk"; > > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>; > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > new file mode 100644 > > index 000000000000..7764b4146e0a > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > @@ -0,0 +1,12 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright 2021 NXP > > + */ > > + > > +&jpegdec { > > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec"; > > +}; > > + > > +&jpegenc { > > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc"; > > +}; > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > index 12cd059b339b..aebbe2b84aa1 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > @@ -166,11 +166,13 @@ > > }; > > > > /* sorted in register address */ > > + #include "imx8-ss-img.dtsi" > > #include "imx8-ss-dma.dtsi" > > #include "imx8-ss-conn.dtsi" > > #include "imx8-ss-lsio.dtsi" > > }; > > > > +#include "imx8qm-ss-img.dtsi" > > #include "imx8qm-ss-dma.dtsi" > > #include "imx8qm-ss-conn.dtsi" > > #include "imx8qm-ss-lsio.dtsi" > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > new file mode 100644 > > index 000000000000..3a087317591d > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > @@ -0,0 +1,13 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright 2021 NXP > > + * Dong Aisheng <aisheng.dong@nxp.com> > > + */ > > + > > +&jpegdec { > > + compatible = "nxp,imx8qxp-jpgdec"; > > +}; > > + > > +&jpegenc { > > + compatible = "nxp,imx8qxp-jpgenc"; > > +}; > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > index 1e6b4995091e..a625fb6bdc62 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > @@ -258,12 +258,14 @@ > > }; > > > > /* sorted in register address */ > > + #include "imx8-ss-img.dtsi" > > #include "imx8-ss-adma.dtsi" > > #include "imx8-ss-conn.dtsi" > > #include "imx8-ss-ddr.dtsi" > > #include "imx8-ss-lsio.dtsi" > > }; > > > > +#include "imx8qxp-ss-img.dtsi" > > #include "imx8qxp-ss-adma.dtsi" > > #include "imx8qxp-ss-conn.dtsi" > > #include "imx8qxp-ss-lsio.dtsi" > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [EXT] Re: [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes 2021-09-14 10:42 ` [EXT] " Mirela Rabulea @ 2021-09-14 10:44 ` Hans Verkuil 0 siblings, 0 replies; 10+ messages in thread From: Hans Verkuil @ 2021-09-14 10:44 UTC (permalink / raw) To: Mirela Rabulea, G.n. Zhou, Mirela Rabulea (OSS), shawnguo, linux-arm-kernel, mchehab, Aisheng Dong, robh+dt Cc: linux-media, Robert Chiras, dl-linux-imx, kernel, s.hauer, Peng Fan, devicetree, linux-kernel, Daniel Baluta, paul.kocialkowski, Laurentiu Palcu, p.zabel, ezequiel On 14/09/2021 12:42, Mirela Rabulea wrote: > Hi Hans, > > On Tue, 2021-09-14 at 09:11 +0200, Hans Verkuil wrote: >> Caution: EXT Email >> >> Hi Mirela, >> >> On 19/06/2021 16:36, Mirela Rabulea (OSS) wrote: >>> From: Mirela Rabulea <mirela.rabulea@nxp.com> >>> >>> Add dts for imaging subsytem, include jpeg nodes here. >>> Tested on imx8qxp/qm. >> >> I've posted a pull request for the first bindings patch for v5.16, so >> this dts patch can be merged >> through whatever tree takes such dts patches. > > Thanks for the notice. I see the patch is already in linux-next. Any > more action required from my behalf? No, that's it. Regards, Hans > > Regards, > Mirela > >> >> Regards, >> >> Hans >> >>> Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> >>> --- >>> Changes in v14: >>> Address feedback from Aisheng Dong and Ezequiel Garcia: >>> - use imx8 instead of imx in patch subject >>> - keep jpeg and LPCGs used by jpeg enabled by default in >>> platform dts (no change here) >>> >>> .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 80 >>> +++++++++++++++++++ >>> .../boot/dts/freescale/imx8qm-ss-img.dtsi | 12 +++ >>> arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 + >>> .../boot/dts/freescale/imx8qxp-ss-img.dtsi | 13 +++ >>> arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 + >>> 5 files changed, 109 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi >>> create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss- >>> img.dtsi >>> create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss- >>> img.dtsi >>> >>> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi >>> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi >>> new file mode 100644 >>> index 000000000000..a90654155a88 >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi >>> @@ -0,0 +1,80 @@ >>> +// SPDX-License-Identifier: GPL-2.0+ >>> +/* >>> + * Copyright 2019-2021 NXP >>> + * Zhou Guoniu <guoniu.zhou@nxp.com> >>> + */ >>> +img_subsys: bus@58000000 { >>> + compatible = "simple-bus"; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + ranges = <0x58000000 0x0 0x58000000 0x1000000>; >>> + >>> + img_ipg_clk: clock-img-ipg { >>> + compatible = "fixed-clock"; >>> + #clock-cells = <0>; >>> + clock-frequency = <200000000>; >>> + clock-output-names = "img_ipg_clk"; >>> + }; >>> + >>> + jpegdec: jpegdec@58400000 { >>> + reg = <0x58400000 0x00050000>; >>> + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; >>> + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, >>> + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; >>> + clock-names = "per", "ipg"; >>> + assigned-clocks = <&img_jpeg_dec_lpcg >>> IMX_LPCG_CLK_0>, >>> + <&img_jpeg_dec_lpcg >>> IMX_LPCG_CLK_4>; >>> + assigned-clock-rates = <200000000>, <200000000>; >>> + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, >>> + <&pd IMX_SC_R_MJPEG_DEC_S0>, >>> + <&pd IMX_SC_R_MJPEG_DEC_S1>, >>> + <&pd IMX_SC_R_MJPEG_DEC_S2>, >>> + <&pd IMX_SC_R_MJPEG_DEC_S3>; >>> + }; >>> + >>> + jpegenc: jpegenc@58450000 { >>> + reg = <0x58450000 0x00050000>; >>> + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; >>> + clocks = <&img_jpeg_enc_lpcg IMX_LPC[GIT PULL FOR >>> v5.16]G_CLK_0>, >>> + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; >>> + clock-names = "per", "ipg"; >>> + assigned-clocks = <&img_jpeg_enc_lpcg >>> IMX_LPCG_CLK_0>, >>> + <&img_jpeg_enc_lpcg >>> IMX_LPCG_CLK_4>; >>> + assigned-clock-rates = <200000000>, <200000000>; >>> + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, >>> + <&pd IMX_SC_R_MJPEG_ENC_S0>, >>> + <&pd IMX_SC_R_MJPEG_ENC_S1>, >>> + <&pd IMX_SC_R_MJPEG_ENC_S2>, >>> + <&pd IMX_SC_R_MJPEG_ENC_S3>; >>> + }; >>> + >>> + img_jpeg_dec_lpcg: clock-controller@585d0000 { >>> + compatible = "fsl,imx8qxp-lpcg"; >>> + reg = <0x585d0000 0x10000>; >>> + #clock-cells = <1>; >>> + clocks = <&img_ipg_clk>, <&img_ipg_clk>; >>> + clock-indices = <IMX_LPCG_CLK_0>, >>> + <IMX_LPCG_CLK_4>; >>> + clock-output-names = "img_jpeg_dec_lpcg_clk", >>> + "img_jpeg_dec_lpcg_ipg_clk"; >>> + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>; >>> + }; >>> + >>> + img_jpeg_enc_lpcg: clock-controller@585f0000 { >>> + compatible = "fsl,imx8qxp-lpcg"; >>> + reg = <0x585f0000 0x10000>; >>> + #clock-cells = <1>; >>> + clocks = <&img_ipg_clk>, <&img_ipg_clk>; >>> + clock-indices = <IMX_LPCG_CLK_0>, >>> + <IMX_LPCG_CLK_4>; >>> + clock-output-names = "img_jpeg_enc_lpcg_clk", >>> + "img_jpeg_enc_lpcg_ipg_clk"; >>> + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>; >>> + }; >>> +}; >>> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi >>> b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi >>> new file mode 100644 >>> index 000000000000..7764b4146e0a >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi >>> @@ -0,0 +1,12 @@ >>> +// SPDX-License-Identifier: GPL-2.0+ >>> +/* >>> + * Copyright 2021 NXP >>> + */ >>> + >>> +&jpegdec { >>> + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec"; >>> +}; >>> + >>> +&jpegenc { >>> + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc"; >>> +}; >>> diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi >>> b/arch/arm64/boot/dts/freescale/imx8qm.dtsi >>> index 12cd059b339b..aebbe2b84aa1 100644 >>> --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi >>> +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi >>> @@ -166,11 +166,13 @@ >>> }; >>> >>> /* sorted in register address */ >>> + #include "imx8-ss-img.dtsi" >>> #include "imx8-ss-dma.dtsi" >>> #include "imx8-ss-conn.dtsi" >>> #include "imx8-ss-lsio.dtsi" >>> }; >>> >>> +#include "imx8qm-ss-img.dtsi" >>> #include "imx8qm-ss-dma.dtsi" >>> #include "imx8qm-ss-conn.dtsi" >>> #include "imx8qm-ss-lsio.dtsi" >>> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi >>> b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi >>> new file mode 100644 >>> index 000000000000..3a087317591d >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi >>> @@ -0,0 +1,13 @@ >>> +// SPDX-License-Identifier: GPL-2.0+ >>> +/* >>> + * Copyright 2021 NXP >>> + * Dong Aisheng <aisheng.dong@nxp.com> >>> + */ >>> + >>> +&jpegdec { >>> + compatible = "nxp,imx8qxp-jpgdec"; >>> +}; >>> + >>> +&jpegenc { >>> + compatible = "nxp,imx8qxp-jpgenc"; >>> +}; >>> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi >>> b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi >>> index 1e6b4995091e..a625fb6bdc62 100644 >>> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi >>> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi >>> @@ -258,12 +258,14 @@ >>> }; >>> >>> /* sorted in register address */ >>> + #include "imx8-ss-img.dtsi" >>> #include "imx8-ss-adma.dtsi" >>> #include "imx8-ss-conn.dtsi" >>> #include "imx8-ss-ddr.dtsi" >>> #include "imx8-ss-lsio.dtsi" >>> }; >>> >>> +#include "imx8qxp-ss-img.dtsi" >>> #include "imx8qxp-ss-adma.dtsi" >>> #include "imx8qxp-ss-conn.dtsi" >>> #include "imx8qxp-ss-lsio.dtsi" >>> ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec 2021-06-19 14:36 [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec Mirela Rabulea (OSS) 2021-06-19 14:36 ` [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM " Mirela Rabulea (OSS) 2021-06-19 14:36 ` [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes Mirela Rabulea (OSS) @ 2021-07-14 7:45 ` Shawn Guo 2 siblings, 0 replies; 10+ messages in thread From: Shawn Guo @ 2021-07-14 7:45 UTC (permalink / raw) To: Mirela Rabulea (OSS) Cc: robh+dt, aisheng.dong, guoniu.zhou, linux-arm-kernel, mchehab, peng.fan, s.hauer, linux-imx, devicetree, hverkuil-cisco, linux-media, linux-kernel, paul.kocialkowski, daniel.baluta, robert.chiras, laurentiu.palcu, p.zabel, ezequiel, kernel, Mirela Rabulea On Sat, Jun 19, 2021 at 05:36:09PM +0300, Mirela Rabulea (OSS) wrote: > From: Mirela Rabulea <mirela.rabulea@nxp.com> > > Add the dts files for i.MX8QM/QXP JPEG codec. > The bindings for i.MX8QXP were already upstream, only update with i.MX8QM compatible. > > Mirela Rabulea (2): > media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM JPEG codec I fixed the prefix as Aisheng suggested. > arm64: dts: imx8: Add jpeg encoder/decoder nodes Applied both, thanks. Shawn ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-09-14 10:44 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-06-19 14:36 [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec Mirela Rabulea (OSS) 2021-06-19 14:36 ` [PATCH v14 1/2] media: dt-bindings: imx-jpeg: Add compatible for i.MX8QM " Mirela Rabulea (OSS) 2021-06-21 3:46 ` Aisheng Dong 2021-07-12 20:13 ` Rob Herring 2021-06-19 14:36 ` [PATCH v14 2/2] arm64: dts: imx8: Add jpeg encoder/decoder nodes Mirela Rabulea (OSS) 2021-06-21 3:50 ` Aisheng Dong 2021-09-14 7:11 ` Hans Verkuil 2021-09-14 10:42 ` [EXT] " Mirela Rabulea 2021-09-14 10:44 ` Hans Verkuil 2021-07-14 7:45 ` [PATCH v14 0/2] Add dts and bindings update for i.MX8QM/QXP JPEG codec Shawn Guo
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