[PATCH v3 0/6] gpio: update i.MX93/8ULP and support i.MX95

[PATCH v3 0/6] gpio: update i.MX93/8ULP and support i.MX95

[Peng Fan (OSS)]

From hardware perspective:
- i.MX8ULP/93 GPIO supports two interrupts, 1st for Trustzone non-secure irq,
  2nd for Trustzone secure irq.
- i.MX8ULP/93 only has one register base

The current linux gpio-vf610.c could work with i.MX8ULP/i.MX93, it is
because some trick did in device tree node with offset added to base:
  reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
But actually the register base should be 0x2d010000.

So i.MX8ULP/93 is not HW compatible with i.MX7ULP.

i.MX93 GPIO is directly derived from i.MX8ULP, so make i.MX93 compatible
with i.MX8ULP. i.MX95 GPIO is same as i.MX93, so also compatible with
i.MX8ULP

There maybe dtbs_check failure if only test the 1st patch. After
the patchset applied, no failure.

To make avoid break old bindings from work, update the driver
to support both old/new bindings.

---
Changes in v3:
Update patch v2 2/6
Update commit log in patch v2 5/6
Add A-b from DT maintainer for patch v2 1/6, 3/6
- Link to v2: https://lore.kernel.org/r/20230916-vf610-gpio-v2-0-40823da788d7@nxp.com

Changes in v2:
- Update bindings with describe items, add one reg base for i.MX8ULP/93
- Update driver to support one reg base, support both new/old bindings
- Add a new patch 1 to update gpio-ranges found in dtbs_check
- Link to v1: https://lore.kernel.org/r/20230914-vf610-gpio-v1-0-3ed418182a6a@nxp.com

---
Peng Fan (6):
      dt-bindings: gpio: vf610: update gpio-ranges
      dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93
      dt-bindings: gpio: vf610: add i.MX95 compatible
      gpio: vf610: add i.MX8ULP of_device_id entry
      arm64: dts: imx8ulp: update gpio node
      arm64: dts: imx93: update gpio node

 .../devicetree/bindings/gpio/gpio-vf610.yaml       | 40 +++++++++++++---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi         | 21 +++++----
 arch/arm64/boot/dts/freescale/imx93.dtsi           | 28 ++++++-----
 drivers/gpio/gpio-vf610.c                          | 55 +++++++++++++++++++---
 4 files changed, 111 insertions(+), 33 deletions(-)
---
base-commit: e143016b56ecb0fcda5bb6026b0a25fe55274f56
change-id: 20230914-vf610-gpio-46edacd2b513

Best regards,
-- 
Peng Fan <peng.fan@nxp.com>

[PATCH v3 1/6] dt-bindings: gpio: vf610: update gpio-ranges

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX93 supports four gpio-ranges at max. To fix below issue:
"gpio@43820080: gpio-ranges: [[30, 0, 84, 8], [30, 8, 66, 18],
 [30, 26, 34, 2], [30, 28, 0, 4]] is too long"

 Update the gpio-ranges property

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
index 7c2d152e8617..59427d97adf5 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
@@ -59,7 +59,8 @@ properties:
       - const: port
 
   gpio-ranges:
-    maxItems: 1
+    minItems: 1
+    maxItems: 4
 
 patternProperties:
   "^.+-hog(-[0-9]+)?$":

-- 
2.37.1

[PATCH v3 2/6] dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX8ULP and i.MX93 actually has two interrupts for each gpio
controller, one for Trustzone non-secure world, one for secure world.

And they has one register based, not two as i.MX7ULP or VF610.

Although the Linux Kernel driver gpio-vf610.c could work with
fsl,imx7ulp-gpio compatible, it is based on some tricks did in
device tree with some offset added to base address.

So actually i.MX8ULP/i.MX93 is not compatible with i.MX7ULP.

Last, i.MX93 is directly derived from i.MX8ULP, so make i.MX93 GPIO
compatible with i.MX8ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../devicetree/bindings/gpio/gpio-vf610.yaml       | 36 +++++++++++++++++++---
 1 file changed, 31 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
index 59427d97adf5..5243b4cf1235 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
@@ -20,6 +20,7 @@ description: |
 properties:
   compatible:
     oneOf:
+      - const: fsl,imx8ulp-gpio
       - const: fsl,vf610-gpio
       - items:
           - const: fsl,imx7ulp-gpio
@@ -27,16 +28,17 @@ properties:
       - items:
           - enum:
               - fsl,imx93-gpio
-              - fsl,imx8ulp-gpio
-          - const: fsl,imx7ulp-gpio
+          - const: fsl,imx8ulp-gpio
 
   reg:
-    description: The first reg tuple represents the PORT module, the second tuple
-      represents the GPIO module.
+    minItems: 1
     maxItems: 2
 
   interrupts:
-    maxItems: 1
+    items:
+      - description: GPIO Trustzone non-secure interrupt number
+      - description: GPIO Trustzone secure interrupt number
+    minItems: 1
 
   interrupt-controller: true
 
@@ -78,6 +80,30 @@ required:
   - "#gpio-cells"
   - gpio-controller
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - fsl,vf610-gpio
+              - fsl,imx7ulp-gpio
+    then:
+      properties:
+        interrupts:
+          maxItems: 1
+        reg:
+          items:
+            - description: PORT register base address
+            - description: GPIO register base address
+    else:
+      properties:
+        interrupts:
+          maxItems: 2
+        reg:
+          items:
+            - description: GPIO register base address
+
 additionalProperties: false
 
 examples:

-- 
2.37.1

[PATCH v3 3/6] dt-bindings: gpio: vf610: add i.MX95 compatible

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX95 compatible string which is compatible with i.MX8ULP

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
index 5243b4cf1235..78979b32ebc7 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
@@ -28,6 +28,7 @@ properties:
       - items:
           - enum:
               - fsl,imx93-gpio
+              - fsl,imx95-gpio
           - const: fsl,imx8ulp-gpio
 
   reg:

-- 
2.37.1

[PATCH v3 4/6] gpio: vf610: add i.MX8ULP of_device_id entry

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX8ULP GPIO supports similar feature as i.MX7ULP GPIO, but i.MX8ULP is
not compatible with i.MX7ULP per binding doc. i.MX8ULP only has one
register base, not two base.

Add a new of_device_id entry for i.MX8ULP. But to make the driver could
also support old bindings, check the compatible string first, before
check the device data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/gpio/gpio-vf610.c | 55 +++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 49 insertions(+), 6 deletions(-)

diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index dbc7ba0ee72c..ef2455093708 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -25,6 +25,7 @@
 struct fsl_gpio_soc_data {
 	/* SoCs has a Port Data Direction Register (PDDR) */
 	bool have_paddr;
+	bool is_imx8ulp;
 };
 
 struct vf610_gpio_port {
@@ -60,13 +61,22 @@ struct vf610_gpio_port {
 #define PORT_INT_EITHER_EDGE	0xb
 #define PORT_INT_LOGIC_ONE	0xc
 
+#define IMX8ULP_GPIO_BASE_OFF	0x40
+#define IMX8ULP_BASE_OFF	0x80
+
 static const struct fsl_gpio_soc_data imx_data = {
 	.have_paddr = true,
 };
 
+static const struct fsl_gpio_soc_data imx8ulp_data = {
+	.have_paddr = true,
+	.is_imx8ulp = true,
+};
+
 static const struct of_device_id vf610_gpio_dt_ids[] = {
 	{ .compatible = "fsl,vf610-gpio",	.data = NULL, },
 	{ .compatible = "fsl,imx7ulp-gpio",	.data = &imx_data, },
+	{ .compatible = "fsl,imx8ulp-gpio",	.data = &imx8ulp_data, },
 	{ /* sentinel */ }
 };
 
@@ -255,6 +265,42 @@ static void vf610_gpio_disable_clk(void *data)
 	clk_disable_unprepare(data);
 }
 
+static int vf610_gpio_map_base(struct platform_device *pdev, struct vf610_gpio_port *port)
+{
+	struct device *dev = &pdev->dev;
+	bool dual_base;
+
+	/* support old compatible strings */
+	if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+	    (device_is_compatible(dev, "fsl,imx93-gpio") ||
+	    (device_is_compatible(dev, "fsl,imx8ulp-gpio")))) {
+		dual_base = true;
+	} else if (port->sdata && port->sdata->is_imx8ulp) {
+		dual_base = false;
+	} else {
+		dual_base = true;
+	};
+
+	if (dual_base) {
+		port->base = devm_platform_ioremap_resource(pdev, 0);
+		if (IS_ERR(port->base))
+			return PTR_ERR(port->base);
+
+		port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
+		if (IS_ERR(port->gpio_base))
+			return PTR_ERR(port->gpio_base);
+	} else {
+		port->base = devm_platform_ioremap_resource(pdev, 0);
+		if (IS_ERR(port->base))
+			return PTR_ERR(port->base);
+
+		port->gpio_base = port->base + IMX8ULP_GPIO_BASE_OFF;
+		port->base = port->base + IMX8ULP_BASE_OFF;
+	}
+
+	return 0;
+}
+
 static int vf610_gpio_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -269,13 +315,10 @@ static int vf610_gpio_probe(struct platform_device *pdev)
 		return -ENOMEM;
 
 	port->sdata = of_device_get_match_data(dev);
-	port->base = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(port->base))
-		return PTR_ERR(port->base);
 
-	port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
-	if (IS_ERR(port->gpio_base))
-		return PTR_ERR(port->gpio_base);
+	ret = vf610_gpio_map_base(pdev, port);
+	if (ret)
+		return ret;
 
 	port->irq = platform_get_irq(pdev, 0);
 	if (port->irq < 0)

-- 
2.37.1

[PATCH v3 5/6] arm64: dts: imx8ulp: update gpio node

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The i.MX8ULP GPIO supports two interrupts and one register base,
the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in
gpio-vf610.c driver, it is based on the base address are splited
into two with offset added in device tree node. Now following
hardware design, using one register base in device tree node.

This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX8ULP GPIO.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 8a6596d5a581..3921fdace792 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -484,11 +484,12 @@ fec: ethernet@29950000 {
 		};
 
 		gpioe: gpio@2d000080 {
-				compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
-				reg = <0x2d000080 0x1000>, <0x2d000040 0x40>;
+				compatible = "fsl,imx8ulp-gpio";
+				reg = <0x2d000000 0x1000>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				clocks = <&pcc4 IMX8ULP_CLK_RGPIOE>,
@@ -498,11 +499,12 @@ gpioe: gpio@2d000080 {
 		};
 
 		gpiof: gpio@2d010080 {
-				compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
-				reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
+				compatible = "fsl,imx8ulp-gpio";
+				reg = <0x2d010000 0x1000>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				clocks = <&pcc4 IMX8ULP_CLK_RGPIOF>,
@@ -533,11 +535,12 @@ pcc5: clock-controller@2da70000 {
 		};
 
 		gpiod: gpio@2e200080 {
-			compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
-			reg = <0x2e200080 0x1000>, <0x2e200040 0x40>;
+			compatible = "fsl,imx8ulp-gpio";
+			reg = <0x2e200000 0x1000>;
 			gpio-controller;
 			#gpio-cells = <2>;
-			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			clocks = <&pcc5 IMX8ULP_CLK_RGPIOD>,

-- 
2.37.1

[PATCH v3 6/6] arm64: dts: imx93: update gpio node

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Per binding doc, i.MX93 GPIO supports two interrupts and one register
base, compatible with i.MX8ULP. The current fsl,imx7ulp-gpio compatible
could work for i.MX93 in gpio-vf610.c driver, it is based on the base
address are splited into two with offset added in device tree node.

Now following hardware design, using one register base in device tree node.

This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX93 GPIO.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx93.dtsi | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 6f85a05ee7e1..4b111b8c1931 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -825,11 +825,12 @@ usdhc3: mmc@428b0000 {
 		};
 
 		gpio2: gpio@43810080 {
-			compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
-			reg = <0x43810080 0x1000>, <0x43810040 0x40>;
+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+			reg = <0x43810000 0x1000>;
 			gpio-controller;
 			#gpio-cells = <2>;
-			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			clocks = <&clk IMX93_CLK_GPIO2_GATE>,
@@ -839,11 +840,12 @@ gpio2: gpio@43810080 {
 		};
 
 		gpio3: gpio@43820080 {
-			compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
-			reg = <0x43820080 0x1000>, <0x43820040 0x40>;
+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+			reg = <0x43820000 0x1000>;
 			gpio-controller;
 			#gpio-cells = <2>;
-			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			clocks = <&clk IMX93_CLK_GPIO3_GATE>,
@@ -854,11 +856,12 @@ gpio3: gpio@43820080 {
 		};
 
 		gpio4: gpio@43830080 {
-			compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
-			reg = <0x43830080 0x1000>, <0x43830040 0x40>;
+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+			reg = <0x43830000 0x1000>;
 			gpio-controller;
 			#gpio-cells = <2>;
-			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			clocks = <&clk IMX93_CLK_GPIO4_GATE>,
@@ -868,11 +871,12 @@ gpio4: gpio@43830080 {
 		};
 
 		gpio1: gpio@47400080 {
-			compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
-			reg = <0x47400080 0x1000>, <0x47400040 0x40>;
+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+			reg = <0x47400000 0x1000>;
 			gpio-controller;
 			#gpio-cells = <2>;
-			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			clocks = <&clk IMX93_CLK_GPIO1_GATE>,

-- 
2.37.1

Re: [PATCH v3 2/6] dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 3082 bytes --]

On Mon, Sep 18, 2023 at 04:16:06PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX8ULP and i.MX93 actually has two interrupts for each gpio
> controller, one for Trustzone non-secure world, one for secure world.
> 
> And they has one register based, not two as i.MX7ULP or VF610.
> 
> Although the Linux Kernel driver gpio-vf610.c could work with
> fsl,imx7ulp-gpio compatible, it is based on some tricks did in
> device tree with some offset added to base address.
> 
> So actually i.MX8ULP/i.MX93 is not compatible with i.MX7ULP.
> 
> Last, i.MX93 is directly derived from i.MX8ULP, so make i.MX93 GPIO
> compatible with i.MX8ULP
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../devicetree/bindings/gpio/gpio-vf610.yaml       | 36 +++++++++++++++++++---
>  1 file changed, 31 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> index 59427d97adf5..5243b4cf1235 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> @@ -20,6 +20,7 @@ description: |
>  properties:
>    compatible:
>      oneOf:
> +      - const: fsl,imx8ulp-gpio
>        - const: fsl,vf610-gpio
>        - items:
>            - const: fsl,imx7ulp-gpio
> @@ -27,16 +28,17 @@ properties:
>        - items:
>            - enum:
>                - fsl,imx93-gpio
> -              - fsl,imx8ulp-gpio
> -          - const: fsl,imx7ulp-gpio
> +          - const: fsl,imx8ulp-gpio
>  
>    reg:
> -    description: The first reg tuple represents the PORT module, the second tuple
> -      represents the GPIO module.
> +    minItems: 1
>      maxItems: 2
>  
>    interrupts:
> -    maxItems: 1
> +    items:
> +      - description: GPIO Trustzone non-secure interrupt number
> +      - description: GPIO Trustzone secure interrupt number
> +    minItems: 1
>  
>    interrupt-controller: true
>  
> @@ -78,6 +80,30 @@ required:
>    - "#gpio-cells"
>    - gpio-controller
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - fsl,vf610-gpio
> +              - fsl,imx7ulp-gpio
> +    then:
> +      properties:
> +        interrupts:
> +          maxItems: 1
> +        reg:
> +          items:
> +            - description: PORT register base address
> +            - description: GPIO register base address
> +    else:
> +      properties:
> +        interrupts:
> +          maxItems: 2

Doesn't this default to 2 because there are 2 items in your list of
interrupts as things stand?
Otherwise, this seems fine to me, provided the existing platforms are
going to be broken as you implement the software side of this change.

Thanks,
Conor.

> +        reg:
> +          items:
> +            - description: GPIO register base address
> +
>  additionalProperties: false
>  
>  examples:
> 
> -- 
> 2.37.1
> 

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Re: [PATCH v3 4/6] gpio: vf610: add i.MX8ULP of_device_id entry

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 799 bytes --]

On Mon, Sep 18, 2023 at 04:16:08PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX8ULP GPIO supports similar feature as i.MX7ULP GPIO, but i.MX8ULP is
> not compatible with i.MX7ULP per binding doc. i.MX8ULP only has one
> register base, not two base.

"per binding doc" is a poor justification IMO, as you literally just
changed it earlier in this series. I think the commit message here
should re-explain the problem so that the rationale here is clear in
isolation.

> Add a new of_device_id entry for i.MX8ULP. But to make the driver could
> also support old bindings, check the compatible string first, before
> check the device data.

Sweet, seems like you have addressed the backwards compatibility stuff
for the old binding :)

Thanks,
Conor.

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RE: [PATCH v3 2/6] dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93

[Peng Fan]

> Subject: Re: [PATCH v3 2/6] dt-bindings: gpio: vf610: correct i.MX8ULP and
> i.MX93
> 
> On Mon, Sep 18, 2023 at 04:16:06PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > i.MX8ULP and i.MX93 actually has two interrupts for each gpio
> > controller, one for Trustzone non-secure world, one for secure world.
> >
> > And they has one register based, not two as i.MX7ULP or VF610.
> >
> > Although the Linux Kernel driver gpio-vf610.c could work with
> > fsl,imx7ulp-gpio compatible, it is based on some tricks did in device
> > tree with some offset added to base address.
> >
> > So actually i.MX8ULP/i.MX93 is not compatible with i.MX7ULP.
> >
> > Last, i.MX93 is directly derived from i.MX8ULP, so make i.MX93 GPIO
> > compatible with i.MX8ULP
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../devicetree/bindings/gpio/gpio-vf610.yaml       | 36
> +++++++++++++++++++---
> >  1 file changed, 31 insertions(+), 5 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> > b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> > index 59427d97adf5..5243b4cf1235 100644
> > --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> > +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> > @@ -20,6 +20,7 @@ description: |
> >  properties:
> >    compatible:
> >      oneOf:
> > +      - const: fsl,imx8ulp-gpio
> >        - const: fsl,vf610-gpio
> >        - items:
> >            - const: fsl,imx7ulp-gpio
> > @@ -27,16 +28,17 @@ properties:
> >        - items:
> >            - enum:
> >                - fsl,imx93-gpio
> > -              - fsl,imx8ulp-gpio
> > -          - const: fsl,imx7ulp-gpio
> > +          - const: fsl,imx8ulp-gpio
> >
> >    reg:
> > -    description: The first reg tuple represents the PORT module, the second
> tuple
> > -      represents the GPIO module.
> > +    minItems: 1
> >      maxItems: 2
> >
> >    interrupts:
> > -    maxItems: 1
> > +    items:
> > +      - description: GPIO Trustzone non-secure interrupt number
> > +      - description: GPIO Trustzone secure interrupt number
> > +    minItems: 1
> >
> >    interrupt-controller: true
> >
> > @@ -78,6 +80,30 @@ required:
> >    - "#gpio-cells"
> >    - gpio-controller
> >
> > +allOf:
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - fsl,vf610-gpio
> > +              - fsl,imx7ulp-gpio
> > +    then:
> > +      properties:
> > +        interrupts:
> > +          maxItems: 1
> > +        reg:
> > +          items:
> > +            - description: PORT register base address
> > +            - description: GPIO register base address
> > +    else:
> > +      properties:
> > +        interrupts:
> > +          maxItems: 2
> 
> Doesn't this default to 2 because there are 2 items in your list of interrupts as
> things stand?

Oh, I should set this as minItems: 2. There are two interrupts.

Thanks,
Peng.

> Otherwise, this seems fine to me, provided the existing platforms are going to
> be broken as you implement the software side of this change.
> 
> Thanks,
> Conor.
> 
> > +        reg:
> > +          items:
> > +            - description: GPIO register base address
> > +
> >  additionalProperties: false
> >
> >  examples:
> >
> > --
> > 2.37.1
> >

Re: [PATCH v3 4/6] gpio: vf610: add i.MX8ULP of_device_id entry

[Marco Felsch]

Hi Peng,

please see my notes below.

On 23-09-18, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX8ULP GPIO supports similar feature as i.MX7ULP GPIO, but i.MX8ULP is
> not compatible with i.MX7ULP per binding doc. i.MX8ULP only has one
> register base, not two base.
> 
> Add a new of_device_id entry for i.MX8ULP. But to make the driver could
> also support old bindings, check the compatible string first, before
> check the device data.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/gpio/gpio-vf610.c | 55 +++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 49 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
> index dbc7ba0ee72c..ef2455093708 100644
> --- a/drivers/gpio/gpio-vf610.c
> +++ b/drivers/gpio/gpio-vf610.c
> @@ -25,6 +25,7 @@
>  struct fsl_gpio_soc_data {
>  	/* SoCs has a Port Data Direction Register (PDDR) */
>  	bool have_paddr;
> +	bool is_imx8ulp;

I would invert the logic:

	bool have_dual_base;

>  };
>  
>  struct vf610_gpio_port {
> @@ -60,13 +61,22 @@ struct vf610_gpio_port {
>  #define PORT_INT_EITHER_EDGE	0xb
>  #define PORT_INT_LOGIC_ONE	0xc
>  
> +#define IMX8ULP_GPIO_BASE_OFF	0x40
> +#define IMX8ULP_BASE_OFF	0x80
> +

static const struct fsl_gpio_soc_data vf610_data = {
	.have_dual_base = true,
};

static const struct fsl_gpio_soc_data imx_data = {
	.have_paddr = true,
	.have_dual_base = true,
};

static const struct fsl_gpio_soc_data imx8ulp_data = {
	.have_paddr = true,
};

This also introduces .data pointer for the vf610 case and we could drop
the 'port->sdata' guard from the
'if (port->sdata && port->sdata->paddr)' pattern. This of course would
be an additional patch.

> +
>  static const struct of_device_id vf610_gpio_dt_ids[] = {
>  	{ .compatible = "fsl,vf610-gpio",	.data = NULL, },
>  	{ .compatible = "fsl,imx7ulp-gpio",	.data = &imx_data, },
> +	{ .compatible = "fsl,imx8ulp-gpio",	.data = &imx8ulp_data, },
>  	{ /* sentinel */ }
>  };
>  
> @@ -255,6 +265,42 @@ static void vf610_gpio_disable_clk(void *data)
>  	clk_disable_unprepare(data);
>  }
>  
> +static int vf610_gpio_map_base(struct platform_device *pdev, struct vf610_gpio_port *port)
> +{
> +	struct device *dev = &pdev->dev;
> +	bool dual_base;
> +
> +	/* support old compatible strings */
> +	if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
> +	    (device_is_compatible(dev, "fsl,imx93-gpio") ||
> +	    (device_is_compatible(dev, "fsl,imx8ulp-gpio")))) {
> +		dual_base = true;

Move this part into probe() (see below) and drop the rest.

> +	} else if (port->sdata && port->sdata->is_imx8ulp) {
> +		dual_base = false;
> +	} else {
> +		dual_base = true;
> +	};
> +
> +	if (dual_base) {

	if (port->sdata-have_dual_base) {

> +		port->base = devm_platform_ioremap_resource(pdev, 0);
> +		if (IS_ERR(port->base))
> +			return PTR_ERR(port->base);
> +
> +		port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> +		if (IS_ERR(port->gpio_base))
> +			return PTR_ERR(port->gpio_base);
> +	} else {
> +		port->base = devm_platform_ioremap_resource(pdev, 0);
> +		if (IS_ERR(port->base))
> +			return PTR_ERR(port->base);
> +
> +		port->gpio_base = port->base + IMX8ULP_GPIO_BASE_OFF;
> +		port->base = port->base + IMX8ULP_BASE_OFF;
> +	}
> +
> +	return 0;
> +}
> +
>  static int vf610_gpio_probe(struct platform_device *pdev)
>  {
>  	struct device *dev = &pdev->dev;
> @@ -269,13 +315,10 @@ static int vf610_gpio_probe(struct platform_device *pdev)
>  		return -ENOMEM;
>  
>  	port->sdata = of_device_get_match_data(dev);

	/* Handle old device-tree bindings */
	if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
	    (device_is_compatible(dev, "fsl,imx93-gpio") ||
	    (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
		port->sdata->have_dual_base = true;

> -	port->base = devm_platform_ioremap_resource(pdev, 0);
> -	if (IS_ERR(port->base))
> -		return PTR_ERR(port->base);
>  
> -	port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> -	if (IS_ERR(port->gpio_base))
> -		return PTR_ERR(port->gpio_base);
> +	ret = vf610_gpio_map_base(pdev, port);
> +	if (ret)
> +		return ret;
>  
>  	port->irq = platform_get_irq(pdev, 0);
>  	if (port->irq < 0)

Regards,
  Marco