* [PATCHv2] PCI: designware-ep: Fix the Header Type check
@ 2020-08-18 9:27 Zhiqiang Hou
2020-08-18 13:51 ` Rob Herring
2020-09-07 9:28 ` Lorenzo Pieralisi
0 siblings, 2 replies; 4+ messages in thread
From: Zhiqiang Hou @ 2020-08-18 9:27 UTC (permalink / raw)
To: linux-kernel, linux-pci, lorenzo.pieralisi, robh, bhelgaas,
amurray, jingoohan1, gustavo.pimentel
Cc: Hou Zhiqiang
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The current check will result in the multiple function device
fails to initialize. So fix the check by masking out the
multiple function bit.
Fixes: 0b24134f7888 ("PCI: dwc: Add validation that PCIe core is set to correct mode")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
- Add marco PCI_HEADER_TYPE_MASK and print the masked value.
drivers/pci/controller/dwc/pcie-designware-ep.c | 3 ++-
include/uapi/linux/pci_regs.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 4680a51c49c0..0634bd3a0b96 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -653,7 +653,8 @@ int dw_pcie_ep_init_complete(struct dw_pcie_ep *ep)
u32 reg;
int i;
- hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE);
+ hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) &
+ PCI_HEADER_TYPE_MASK;
if (hdr_type != PCI_HEADER_TYPE_NORMAL) {
dev_err(pci->dev,
"PCIe controller is not set to EP mode (hdr_type:0x%x)!\n",
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index f9701410d3b5..57a222014cd2 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -76,6 +76,7 @@
#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
#define PCI_LATENCY_TIMER 0x0d /* 8 bits */
#define PCI_HEADER_TYPE 0x0e /* 8 bits */
+#define PCI_HEADER_TYPE_MASK 0x7f
#define PCI_HEADER_TYPE_NORMAL 0
#define PCI_HEADER_TYPE_BRIDGE 1
#define PCI_HEADER_TYPE_CARDBUS 2
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCHv2] PCI: designware-ep: Fix the Header Type check
2020-08-18 9:27 [PATCHv2] PCI: designware-ep: Fix the Header Type check Zhiqiang Hou
@ 2020-08-18 13:51 ` Rob Herring
2020-08-19 4:55 ` Z.q. Hou
2020-09-07 9:28 ` Lorenzo Pieralisi
1 sibling, 1 reply; 4+ messages in thread
From: Rob Herring @ 2020-08-18 13:51 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-kernel, PCI, Lorenzo Pieralisi, Bjorn Helgaas,
Andrew Murray, Jingoo Han, Gustavo Pimentel
On Tue, Aug 18, 2020 at 3:35 AM Zhiqiang Hou <Zhiqiang.Hou@nxp.com> wrote:
>
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> The current check will result in the multiple function device
> fails to initialize. So fix the check by masking out the
> multiple function bit.
>
> Fixes: 0b24134f7888 ("PCI: dwc: Add validation that PCIe core is set to correct mode")
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V2:
> - Add marco PCI_HEADER_TYPE_MASK and print the masked value.
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 3 ++-
> include/uapi/linux/pci_regs.h | 1 +
> 2 files changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread* RE: [PATCHv2] PCI: designware-ep: Fix the Header Type check
2020-08-18 13:51 ` Rob Herring
@ 2020-08-19 4:55 ` Z.q. Hou
0 siblings, 0 replies; 4+ messages in thread
From: Z.q. Hou @ 2020-08-19 4:55 UTC (permalink / raw)
To: Rob Herring
Cc: linux-kernel, PCI, Lorenzo Pieralisi, Bjorn Helgaas,
Andrew Murray, Jingoo Han, Gustavo Pimentel
Hi Rob,
Thanks a lot for your review!
Regards,
Zhiqiang
> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: 2020年8月18日 21:52
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: linux-kernel@vger.kernel.org; PCI <linux-pci@vger.kernel.org>; Lorenzo
> Pieralisi <lorenzo.pieralisi@arm.com>; Bjorn Helgaas
> <bhelgaas@google.com>; Andrew Murray
> <amurray@thegoodpenguin.co.uk>; Jingoo Han <jingoohan1@gmail.com>;
> Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> Subject: Re: [PATCHv2] PCI: designware-ep: Fix the Header Type check
>
> On Tue, Aug 18, 2020 at 3:35 AM Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
> wrote:
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The current check will result in the multiple function device fails to
> > initialize. So fix the check by masking out the multiple function bit.
> >
> > Fixes: 0b24134f7888 ("PCI: dwc: Add validation that PCIe core is set
> > to correct mode")
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V2:
> > - Add marco PCI_HEADER_TYPE_MASK and print the masked value.
> >
> > drivers/pci/controller/dwc/pcie-designware-ep.c | 3 ++-
> > include/uapi/linux/pci_regs.h | 1 +
> > 2 files changed, 3 insertions(+), 1 deletion(-)
>
> Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCHv2] PCI: designware-ep: Fix the Header Type check
2020-08-18 9:27 [PATCHv2] PCI: designware-ep: Fix the Header Type check Zhiqiang Hou
2020-08-18 13:51 ` Rob Herring
@ 2020-09-07 9:28 ` Lorenzo Pieralisi
1 sibling, 0 replies; 4+ messages in thread
From: Lorenzo Pieralisi @ 2020-09-07 9:28 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-kernel, linux-pci, robh, bhelgaas, amurray, jingoohan1,
gustavo.pimentel
On Tue, Aug 18, 2020 at 05:27:46PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> The current check will result in the multiple function device
> fails to initialize. So fix the check by masking out the
> multiple function bit.
>
> Fixes: 0b24134f7888 ("PCI: dwc: Add validation that PCIe core is set to correct mode")
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V2:
> - Add marco PCI_HEADER_TYPE_MASK and print the masked value.
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 3 ++-
> include/uapi/linux/pci_regs.h | 1 +
> 2 files changed, 3 insertions(+), 1 deletion(-)
Applied to pci/dwc, thanks.
Lorenzo
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 4680a51c49c0..0634bd3a0b96 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -653,7 +653,8 @@ int dw_pcie_ep_init_complete(struct dw_pcie_ep *ep)
> u32 reg;
> int i;
>
> - hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE);
> + hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) &
> + PCI_HEADER_TYPE_MASK;
> if (hdr_type != PCI_HEADER_TYPE_NORMAL) {
> dev_err(pci->dev,
> "PCIe controller is not set to EP mode (hdr_type:0x%x)!\n",
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index f9701410d3b5..57a222014cd2 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -76,6 +76,7 @@
> #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
> #define PCI_LATENCY_TIMER 0x0d /* 8 bits */
> #define PCI_HEADER_TYPE 0x0e /* 8 bits */
> +#define PCI_HEADER_TYPE_MASK 0x7f
> #define PCI_HEADER_TYPE_NORMAL 0
> #define PCI_HEADER_TYPE_BRIDGE 1
> #define PCI_HEADER_TYPE_CARDBUS 2
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-09-07 9:28 UTC | newest]
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2020-08-18 9:27 [PATCHv2] PCI: designware-ep: Fix the Header Type check Zhiqiang Hou
2020-08-18 13:51 ` Rob Herring
2020-08-19 4:55 ` Z.q. Hou
2020-09-07 9:28 ` Lorenzo Pieralisi
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