From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: Sia Jee Heng <jee.heng.sia@intel.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>
Cc: "andriy.shevchenko@linux.intel.com"
<andriy.shevchenko@linux.intel.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v4 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register()
Date: Thu, 19 Nov 2020 00:10:05 +0000 [thread overview]
Message-ID: <MWHPR1201MB0029DC5ED96606C7C3FDDF03DEE00@MWHPR1201MB0029.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20201117022215.2461-9-jee.heng.sia@intel.com>
Hi Sia,
> Subject: [PATCH v4 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register()
>
> Add support for of_dma_controller_register() so that DMA clients
> can pass in device handshake number to the AxiDMA driver.
>
> DMA clients shall code the device handshake number in the Device tree.
> When DMA activities are needed, DMA clients shall invoke OF helper
> function to pass in the device handshake number to the AxiDMA.
>
> Without register to the of_dma_controller_register(), data transfer
> between memory to device and device to memory operations would failed.
>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com>
> ---
> .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 26 +++++++++++++++++++
> drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 +
> 2 files changed, 27 insertions(+)
>
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> index b5f92f9cb2bc..72871b8738be 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> @@ -20,6 +20,7 @@
> #include <linux/kernel.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_dma.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/property.h>
> @@ -1044,6 +1045,22 @@ static int __maybe_unused axi_dma_runtime_resume(struct device *dev)
> return axi_dma_resume(chip);
> }
>
> +static struct dma_chan *dw_axi_dma_of_xlate(struct of_phandle_args *dma_spec,
> + struct of_dma *ofdma)
> +{
> + struct dw_axi_dma *dw = ofdma->of_dma_data;
> + struct axi_dma_chan *chan;
> + struct dma_chan *dchan;
> +
> + dchan = dma_get_any_slave_channel(&dw->dma);
> + if (!dchan)
> + return NULL;
> +
> + chan = dchan_to_axi_dma_chan(dchan);
> + chan->hw_hs_num = dma_spec->args[0];
> + return dchan;
> +}
> +
> static int parse_device_properties(struct axi_dma_chip *chip)
> {
> struct device *dev = chip->dev;
> @@ -1233,6 +1250,13 @@ static int dw_probe(struct platform_device *pdev)
> if (ret)
> goto err_pm_disable;
>
> + /* Register with OF helpers for DMA lookups */
> + ret = of_dma_controller_register(pdev->dev.of_node,
> + dw_axi_dma_of_xlate, dw);
> + if (ret < 0)
> + dev_warn(&pdev->dev,
> + "Failed to register OF DMA controller, fallback to MEM_TO_MEM mode\n");
> +
> dev_info(chip->dev, "DesignWare AXI DMA Controller, %d channels\n",
> dw->hdata->nr_channels);
>
> @@ -1266,6 +1290,8 @@ static int dw_remove(struct platform_device *pdev)
>
> devm_free_irq(chip->dev, chip->irq, chip);
>
> + of_dma_controller_free(chip->dev->of_node);
> +
> list_for_each_entry_safe(chan, _chan, &dw->dma.channels,
> vc.chan.device_node) {
> list_del(&chan->vc.chan.device_node);
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> index a26b0a242a93..651874e5c88f 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> @@ -37,6 +37,7 @@ struct axi_dma_chan {
> struct axi_dma_chip *chip;
> void __iomem *chan_regs;
> u8 id;
> + u8 hw_hs_num;
Just a nitpick: 'hw_hs_num' sounds quite obfuscated. Could it be 'hw_handshake_num' for example?
> atomic_t descs_allocated;
>
> struct dma_pool *desc_pool;
> --
> 2.18.0
>
next prev parent reply other threads:[~2020-11-19 0:10 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 2:22 [PATCH v4 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 02/15] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 03/15] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 04/15] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 05/15] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 06/15] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 07/15] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2020-11-19 0:10 ` Eugeniy Paltsev [this message]
2020-11-20 0:47 ` Sia, Jee Heng
2020-11-17 2:22 ` [PATCH v4 09/15] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 10/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 11/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2020-11-18 23:58 ` Eugeniy Paltsev
2020-11-20 0:40 ` Sia, Jee Heng
2020-11-17 2:22 ` [PATCH v4 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 13/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2020-11-18 23:59 ` Eugeniy Paltsev
2020-11-20 0:46 ` Sia, Jee Heng
2020-11-20 8:56 ` Sia, Jee Heng
2020-11-17 2:22 ` [PATCH v4 14/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2020-11-17 2:22 ` [PATCH v4 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Sia Jee Heng
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