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* [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
@ 2022-02-07 15:14 Mark Jonas
  2022-02-14 16:44 ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Mark Jonas @ 2022-02-07 15:14 UTC (permalink / raw)
  To: Philipp Zabel, David Airlie, Daniel Vetter
  Cc: dri-devel, linux-kernel, tingquan.ruan, mark.jonas

From: Leo Ruan <tingquan.ruan@cn.bosch.com>

This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the fixed point math had a flaw and calculated error of 0.2%.

Before:
  Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
  IPU clock can give 27000000 with divider 10, error 0.2%
  Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz

After:
  Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
  IPU clock can give 27000000 with divider 10, error -0.8%
  Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz

Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
---
 drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c
index b4a31d506fcc..74eca68891ad 100644
--- a/drivers/gpu/ipu-v3/ipu-di.c
+++ b/drivers/gpu/ipu-v3/ipu-di.c
@@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,
 
 		error = rate / (sig->mode.pixelclock / 1000);
 
-		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider %u, error %d.%u%%\n",
-			rate, div, (signed)(error - 1000) / 10, error % 10);
+		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider %u, error %c%d.%d%%\n",
+			rate, div, error < 1000 ? '-' : '+',
+			abs(error - 1000) / 10, abs(error - 1000) % 10);
 
 		/* Allow a 1% error */
 		if (error < 1010 && error >= 990) {
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* AW: [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
  2022-02-07 15:14 [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output Mark Jonas
@ 2022-02-14 16:44 ` Jonas Mark (BT-FIR/ENG1-Grb)
  2022-02-14 17:24   ` Lucas Stach
  2022-02-16 16:09 ` Philipp Zabel
  2022-03-29 16:42 ` Philipp Zabel
  2 siblings, 1 reply; 6+ messages in thread
From: Jonas Mark (BT-FIR/ENG1-Grb) @ 2022-02-14 16:44 UTC (permalink / raw)
  To: Jonas Mark (BT-FIR/ENG1-Grb), Philipp Zabel, David Airlie, Daniel Vetter
  Cc: dri-devel, linux-kernel, RUAN Tingquan (BT-FIR/ENG1-Zhu)

Hi,

> From: Leo Ruan <tingquan.ruan@cn.bosch.com>
> 
> This commit corrects the printing of the IPU clock error percentage if it is
> between -0.1% to -0.9%. For example, if the pixel clock requested is 27.2
> MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
> But the fixed point math had a flaw and calculated error of 0.2%.
> 
> Before:
>   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
>   IPU clock can give 27000000 with divider 10, error 0.2%
>   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> 
> After:
>   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
>   IPU clock can give 27000000 with divider 10, error -0.8%
>   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> 
> Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
> Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
> ---
>  drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c index
> b4a31d506fcc..74eca68891ad 100644
> --- a/drivers/gpu/ipu-v3/ipu-di.c
> +++ b/drivers/gpu/ipu-v3/ipu-di.c
> @@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,
> 
>  		error = rate / (sig->mode.pixelclock / 1000);
> 
> -		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider
> %u, error %d.%u%%\n",
> -			rate, div, (signed)(error - 1000) / 10, error % 10);
> +		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider
> %u, error %c%d.%d%%\n",
> +			rate, div, error < 1000 ? '-' : '+',
> +			abs(error - 1000) / 10, abs(error - 1000) % 10);
> 
>  		/* Allow a 1% error */
>  		if (error < 1010 && error >= 990) {

Is there anything I can do to help getting this patch mainline?

Cheers,
Mark

Mark Jonas 

Building Technologies, Panel Software Fire (BT-FIR/ENG1-Grb)
Bosch Sicherheitssysteme GmbH | Postfach 11 11 | 85626 Grasbrunn | GERMANY | www.boschsecurity.com

Sitz: Stuttgart, Registergericht: Amtsgericht Stuttgart HRB 23118
Aufsichtsratsvorsitzender: Christian Fischer; Geschäftsführung: Thomas Quante, Peter Löffler, Henrik Siegle

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
  2022-02-14 16:44 ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
@ 2022-02-14 17:24   ` Lucas Stach
  0 siblings, 0 replies; 6+ messages in thread
From: Lucas Stach @ 2022-02-14 17:24 UTC (permalink / raw)
  To: Jonas Mark (BT-FIR/ENG1-Grb), Philipp Zabel, David Airlie, Daniel Vetter
  Cc: RUAN Tingquan (BT-FIR/ENG1-Zhu), linux-kernel, dri-devel

Am Montag, dem 14.02.2022 um 16:44 +0000 schrieb Jonas Mark (BT-FIR/ENG1-Grb):
> Hi,
> 
> > From: Leo Ruan <tingquan.ruan@cn.bosch.com>
> > 
> > This commit corrects the printing of the IPU clock error percentage if it is
> > between -0.1% to -0.9%. For example, if the pixel clock requested is 27.2
> > MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
> > But the fixed point math had a flaw and calculated error of 0.2%.
> > 
> > Before:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error 0.2%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> > 27000000Hz
> > 
> > After:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error -0.8%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> > 27000000Hz
> > 
> > Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
> > Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
> > ---
> >  drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c index
> > b4a31d506fcc..74eca68891ad 100644
> > --- a/drivers/gpu/ipu-v3/ipu-di.c
> > +++ b/drivers/gpu/ipu-v3/ipu-di.c
> > @@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,
> > 
> >  		error = rate / (sig->mode.pixelclock / 1000);
> > 
> > -		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider
> > %u, error %d.%u%%\n",
> > -			rate, div, (signed)(error - 1000) / 10, error % 10);
> > +		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider
> > %u, error %c%d.%d%%\n",
> > +			rate, div, error < 1000 ? '-' : '+',
> > +			abs(error - 1000) / 10, abs(error - 1000) % 10);
> > 
> >  		/* Allow a 1% error */
> >  		if (error < 1010 && error >= 990) {
> 
> Is there anything I can do to help getting this patch mainline?

Philipp is still on vacation, but will be back in a few days. I guess
he will take a look at those patches then.

Regards,
Lucas


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
  2022-02-07 15:14 [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output Mark Jonas
  2022-02-14 16:44 ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
@ 2022-02-16 16:09 ` Philipp Zabel
  2022-03-25 18:01   ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
  2022-03-29 16:42 ` Philipp Zabel
  2 siblings, 1 reply; 6+ messages in thread
From: Philipp Zabel @ 2022-02-16 16:09 UTC (permalink / raw)
  To: Mark Jonas, David Airlie, Daniel Vetter
  Cc: dri-devel, linux-kernel, tingquan.ruan

Hi Mark,

On Mon, 2022-02-07 at 16:14 +0100, Mark Jonas wrote:
> From: Leo Ruan <tingquan.ruan@cn.bosch.com>
> 
> This commit corrects the printing of the IPU clock error percentage if
> it is between -0.1% to -0.9%. For example, if the pixel clock requested
> is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
> But the fixed point math had a flaw and calculated error of 0.2%.
> 
> Before:
>   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
>   IPU clock can give 27000000 with divider 10, error 0.2%
>   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz
> 
> After:
>   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
>   IPU clock can give 27000000 with divider 10, error -0.8%
>   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz
> 
> Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
> Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
> ---
>  drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c
> index b4a31d506fcc..74eca68891ad 100644
> --- a/drivers/gpu/ipu-v3/ipu-di.c
> +++ b/drivers/gpu/ipu-v3/ipu-di.c
> @@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,
>  
>                 error = rate / (sig->mode.pixelclock / 1000);
>  
> -               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider %u, error %d.%u%%\n",
> -                       rate, div, (signed)(error - 1000) / 10, error % 10);
> +               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider %u, error %c%d.%d%%\n",
> +                       rate, div, error < 1000 ? '-' : '+',
> +                       abs(error - 1000) / 10, abs(error - 1000) % 10);
>  
>                 /* Allow a 1% error */
>                 if (error < 1010 && error >= 990) {

Rounding (always down) is still a bit unintuitive, but this certainly
improves things.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

regards
Philipp

^ permalink raw reply	[flat|nested] 6+ messages in thread

* AW: [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
  2022-02-16 16:09 ` Philipp Zabel
@ 2022-03-25 18:01   ` Jonas Mark (BT-FIR/ENG1-Grb)
  0 siblings, 0 replies; 6+ messages in thread
From: Jonas Mark (BT-FIR/ENG1-Grb) @ 2022-03-25 18:01 UTC (permalink / raw)
  To: Philipp Zabel, David Airlie, Daniel Vetter
  Cc: dri-devel, linux-kernel, RUAN Tingquan (BT-FIR/ENG1-Zhu),
	Jonas Mark (BT-FIR/ENG1-Grb)

Hi,

> > This commit corrects the printing of the IPU clock error percentage if
> > it is between -0.1% to -0.9%. For example, if the pixel clock
> > requested is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -
> 0.8%.
> > But the fixed point math had a flaw and calculated error of 0.2%.
> >
> > Before:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error 0.2%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> >
> > After:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error -0.8%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> >
> > Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
> > Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
> > ---
> >  drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c
> > index b4a31d506fcc..74eca68891ad 100644
> > --- a/drivers/gpu/ipu-v3/ipu-di.c
> > +++ b/drivers/gpu/ipu-v3/ipu-di.c
> > @@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,
> >
> >                 error = rate / (sig->mode.pixelclock / 1000);
> >
> > -               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> > divider %u, error %d.%u%%\n",
> > -                       rate, div, (signed)(error - 1000) / 10, error
> > % 10);
> > +               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> > +divider %u, error %c%d.%d%%\n",
> > +                       rate, div, error < 1000 ? '-' : '+',
> > +                       abs(error - 1000) / 10, abs(error - 1000) %
> > +10);
> >
> >                 /* Allow a 1% error */
> >                 if (error < 1010 && error >= 990) {
> 
> Rounding (always down) is still a bit unintuitive, but this certainly improves
> things.
> 
> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

What are the chances of getting this patch into 5.18?

Can I do something to support the process?

Cheers,
Mark

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
  2022-02-07 15:14 [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output Mark Jonas
  2022-02-14 16:44 ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
  2022-02-16 16:09 ` Philipp Zabel
@ 2022-03-29 16:42 ` Philipp Zabel
  2 siblings, 0 replies; 6+ messages in thread
From: Philipp Zabel @ 2022-03-29 16:42 UTC (permalink / raw)
  To: Mark Jonas, David Airlie, Daniel Vetter
  Cc: dri-devel, linux-kernel, tingquan.ruan

On Mo, 2022-02-07 at 16:14 +0100, Mark Jonas wrote:
> From: Leo Ruan <tingquan.ruan@cn.bosch.com>
> 
> This commit corrects the printing of the IPU clock error percentage
> if
> it is between -0.1% to -0.9%. For example, if the pixel clock
> requested
> is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
> But the fixed point math had a flaw and calculated error of 0.2%.
> 
> Before:
>   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
>   IPU clock can give 27000000 with divider 10, error 0.2%
>   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz
> 
> After:
>   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
>   IPU clock can give 27000000 with divider 10, error -0.8%
>   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz
> 
> Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
> Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
> ---
>  drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-
> di.c
> index b4a31d506fcc..74eca68891ad 100644
> --- a/drivers/gpu/ipu-v3/ipu-di.c
> +++ b/drivers/gpu/ipu-v3/ipu-di.c
> @@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di
> *di,
>  
>                 error = rate / (sig->mode.pixelclock / 1000);
>  
> -               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> divider %u, error %d.%u%%\n",
> -                       rate, div, (signed)(error - 1000) / 10, error
> % 10);
> +               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> divider %u, error %c%d.%d%%\n",
> +                       rate, div, error < 1000 ? '-' : '+',
> +                       abs(error - 1000) / 10, abs(error - 1000) %
> 10);
>  
>                 /* Allow a 1% error */
>                 if (error < 1010 && error >= 990) {

Thank you, applied to imx-drm/fixes.

regards
Philipp

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-03-29 16:42 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-07 15:14 [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output Mark Jonas
2022-02-14 16:44 ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
2022-02-14 17:24   ` Lucas Stach
2022-02-16 16:09 ` Philipp Zabel
2022-03-25 18:01   ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
2022-03-29 16:42 ` Philipp Zabel

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