* [PATCH] arm64: dts: layerscape: correct watchdog clocks for LS1088A
@ 2020-09-14 7:52 Qiang Zhao
2020-09-22 2:18 ` Shawn Guo
0 siblings, 1 reply; 3+ messages in thread
From: Qiang Zhao @ 2020-09-14 7:52 UTC (permalink / raw)
To: shawnguo, robh+dt; +Cc: linux-kernel, devicetree, Zhao Qiang
From: Zhao Qiang <qiang.zhao@nxp.com>
On LS1088A, watchdog clk are divided by 16, correct it in dts.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index b0bbe57..2bd0a71 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -712,56 +712,56 @@
cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core2_watchdog: wdt@c020000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc020000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core3_watchdog: wdt@c030000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc030000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core2_watchdog: wdt@c120000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc120000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core3_watchdog: wdt@c130000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc130000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: layerscape: correct watchdog clocks for LS1088A
2020-09-14 7:52 [PATCH] arm64: dts: layerscape: correct watchdog clocks for LS1088A Qiang Zhao
@ 2020-09-22 2:18 ` Shawn Guo
2020-09-22 3:41 ` Qiang Zhao
0 siblings, 1 reply; 3+ messages in thread
From: Shawn Guo @ 2020-09-22 2:18 UTC (permalink / raw)
To: Qiang Zhao; +Cc: robh+dt, linux-kernel, devicetree
On Mon, Sep 14, 2020 at 03:52:02PM +0800, Qiang Zhao wrote:
> From: Zhao Qiang <qiang.zhao@nxp.com>
>
> On LS1088A, watchdog clk are divided by 16, correct it in dts.
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
It doesn't apply to my imx/dt64 branch.
Shawn
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index b0bbe57..2bd0a71 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -712,56 +712,56 @@
> cluster1_core0_watchdog: wdt@c000000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc000000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> cluster1_core1_watchdog: wdt@c010000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc010000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> cluster1_core2_watchdog: wdt@c020000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc020000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> cluster1_core3_watchdog: wdt@c030000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc030000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> cluster2_core0_watchdog: wdt@c100000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc100000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> cluster2_core1_watchdog: wdt@c110000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc110000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> cluster2_core2_watchdog: wdt@c120000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc120000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> cluster2_core3_watchdog: wdt@c130000 {
> compatible = "arm,sp805-wdt", "arm,primecell";
> reg = <0x0 0xc130000 0x0 0x1000>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 15>, <&clockgen 4 15>;
> clock-names = "apb_pclk", "wdog_clk";
> };
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH] arm64: dts: layerscape: correct watchdog clocks for LS1088A
2020-09-22 2:18 ` Shawn Guo
@ 2020-09-22 3:41 ` Qiang Zhao
0 siblings, 0 replies; 3+ messages in thread
From: Qiang Zhao @ 2020-09-22 3:41 UTC (permalink / raw)
To: Shawn Guo; +Cc: robh+dt, linux-kernel, devicetree
On Mon, Sep 14, 2020 at 03:52:02PM +0800, Qiang Zhao wrote:
> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2020年9月22日 10:18
> To: Qiang Zhao <qiang.zhao@nxp.com>
> Cc: robh+dt@kernel.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org
> Subject: Re: [PATCH] arm64: dts: layerscape: correct watchdog clocks for
> LS1088A
>
> On Mon, Sep 14, 2020 at 03:52:02PM +0800, Qiang Zhao wrote:
> > From: Zhao Qiang <qiang.zhao@nxp.com>
> >
> > On LS1088A, watchdog clk are divided by 16, correct it in dts.
> >
> > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
>
> It doesn't apply to my imx/dt64 branch.
>
> Shawn
>
Have pushed version 2 to rebase.
Best Regards
Qiang Zhao
^ permalink raw reply [flat|nested] 3+ messages in thread
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