* [PATCH v5 0/2] Add pixel formats used in Synatpics SoC @ 2022-11-30 9:21 Hsia-Jun Li 2022-11-30 9:21 ` [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers Hsia-Jun Li 2022-11-30 9:21 ` [PATCH v5 2/2] Documentation/gpu: Add Synaptics tiling formats documentation Hsia-Jun Li 0 siblings, 2 replies; 8+ messages in thread From: Hsia-Jun Li @ 2022-11-30 9:21 UTC (permalink / raw) To: dri-devel Cc: airlied, ayaka, sakari.ailus, ezequiel, tzimmermann, linux-kernel, laurent.pinchart, mchehab, tfiga, mripard, ribalda, maarten.lankhorst, linux-media, sebastian.hesselbarth, helen.koike, nicolas, linux-arm-kernel, Hsia-Jun Li Those pixel formats are used in Synaptics's VideoSmart series SoCs, likes VS640, VS680. I just disclose the pixel formats used in the video codecs and display pipeline this time. Actually any device connected to the MTR module could support those tiling and compressed pixel formats. https://synaptics.com/products/multimedia-solutions Changelog: v5: Moving back the document and rewriting the description. v4: Removed the patches for V4L2, V4L2 would use the drm_fourcc.h . Moving the documents to the mesa project. v3: There was a mistake in format macro. Correcting the description of 64L4 variant modifiers. v2: The DRM modifiers in the first draft is too simple, it can't tell the tiles in group attribute in memory layout. Removing the v4l2 fourcc. Adding a document for the future v4l2 extended fmt. v1: first draft of DRM modifiers Try to put basic tile formats into v4l2 fourcc Hsia-Jun(Randy) Li (1): drm/fourcc: Add Synaptics VideoSmart tiled modifiers Randy Li (1): Documentation/gpu: Add Synaptics tiling formats documentation Documentation/gpu/drivers.rst | 1 + Documentation/gpu/synaptics.rst | 104 ++++++++++++++++++++++++++++++++ include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++ 3 files changed, 181 insertions(+) create mode 100644 Documentation/gpu/synaptics.rst -- 2.37.3 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers 2022-11-30 9:21 [PATCH v5 0/2] Add pixel formats used in Synatpics SoC Hsia-Jun Li @ 2022-11-30 9:21 ` Hsia-Jun Li 2022-11-30 11:30 ` Daniel Vetter 2022-11-30 9:21 ` [PATCH v5 2/2] Documentation/gpu: Add Synaptics tiling formats documentation Hsia-Jun Li 1 sibling, 1 reply; 8+ messages in thread From: Hsia-Jun Li @ 2022-11-30 9:21 UTC (permalink / raw) To: dri-devel Cc: airlied, ayaka, sakari.ailus, ezequiel, tzimmermann, linux-kernel, laurent.pinchart, mchehab, tfiga, mripard, ribalda, maarten.lankhorst, linux-media, sebastian.hesselbarth, helen.koike, nicolas, linux-arm-kernel, Hsia-Jun(Randy) Li From: "Hsia-Jun(Randy) Li" <randy.li@synaptics.com> Those modifiers only record the parameters would effort pixel layout or memory layout. Whether physical memory page mapping is used is not a part of format. Signed-off-by: Hsia-Jun(Randy) Li <randy.li@synaptics.com> --- include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index bc056f2d537d..e0905f573f43 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -407,6 +407,7 @@ extern "C" { #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a +#define DRM_FORMAT_MOD_VENDOR_SYNAPTICS 0x0b /* add more to the end as needed */ @@ -1507,6 +1508,81 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) #define AMD_FMT_MOD_CLEAR(field) \ (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) +/* + * Synaptics VideoSmart modifiers + * + * Tiles could be arranged in Groups of Tiles (GOTs), it is a small tile + * within a tile. GOT size and layout varies based on platform and + * performance concern. + * + * Besides, an 8 length 4 bytes arrary (32 bytes) would be need to store + * some compression parameters for a compression metadata plane. + * + * Further information can be found in + * Documentation/gpu/synaptics.rst + * + * Macro + * Bits Param Description + * ---- ----- ----------------------------------------------------------------- + * + * 7:0 f Scan direction description. + * + * 0 = Invalid + * 1 = V4, the scan would always start from vertical for 4 pixel + * then move back to the start pixel of the next horizontal + * direction. + * 2 = Reserved for future use. + * + * 15:8 m The times of pattern repeat in the right angle direction from + * the first scan direction. + * + * 19:16 p The padding bits after the whole scan, could be zero. + * + * 20:20 g GOT packing flag. + * + * 23:21 - Reserved for future use. Must be zero. + * + * 27:24 h log2(horizontal) of pixels, in GOTs. + * + * 31:28 v log2(vertical) of pixels, in GOTs. + * + * 35:32 - Reserved for future use. Must be zero. + * + * 36:36 c Compression flag. + * + * 55:37 - Reserved for future use. Must be zero. + * + */ + +#define DRM_FORMAT_MOD_SYNA_V4_TILED fourcc_mod_code(SYNAPTICS, 1) + +#define DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(f, m, p, g, h, v, c) \ + fourcc_mod_code(SYNAPTICS, ((__u64)((f) & 0xff) | \ + ((__u64)((m) & 0xff) << 8) | \ + ((__u64)((p) & 0xf) << 16) | \ + ((__u64)((g) & 0x1) << 20) | \ + ((__u64)((h) & 0xf) << 24) | \ + ((__u64)((v) & 0xf) << 28) | \ + ((__u64)((c) & 0x1) << 36))) + +#define DRM_FORMAT_MOD_SYNA_V4H1 \ + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 0, 0, 0, 0) + +#define DRM_FORMAT_MOD_SYNA_V4H3P8 \ + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 0, 0, 0, 0) + +#define DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED \ + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 6, 2, 1) + +#define DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED \ + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 6, 2, 1) + +#define DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED \ + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 7, 7, 1) + +#define DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED \ + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 7, 7, 1) + #if defined(__cplusplus) } #endif -- 2.37.3 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers 2022-11-30 9:21 ` [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers Hsia-Jun Li @ 2022-11-30 11:30 ` Daniel Vetter 2022-11-30 16:49 ` Randy Li 0 siblings, 1 reply; 8+ messages in thread From: Daniel Vetter @ 2022-11-30 11:30 UTC (permalink / raw) To: Hsia-Jun Li Cc: dri-devel, nicolas, sakari.ailus, airlied, ayaka, linux-kernel, tfiga, helen.koike, linux-media, ezequiel, tzimmermann, ribalda, sebastian.hesselbarth, mchehab, linux-arm-kernel, laurent.pinchart On Wed, Nov 30, 2022 at 05:21:48PM +0800, Hsia-Jun Li wrote: > From: "Hsia-Jun(Randy) Li" <randy.li@synaptics.com> > > Those modifiers only record the parameters would effort pixel > layout or memory layout. Whether physical memory page mapping > is used is not a part of format. > > Signed-off-by: Hsia-Jun(Randy) Li <randy.li@synaptics.com> > --- > include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++++++++++++++ > 1 file changed, 76 insertions(+) > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index bc056f2d537d..e0905f573f43 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -407,6 +407,7 @@ extern "C" { > #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 > #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 > #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a > +#define DRM_FORMAT_MOD_VENDOR_SYNAPTICS 0x0b > > /* add more to the end as needed */ > > @@ -1507,6 +1508,81 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > #define AMD_FMT_MOD_CLEAR(field) \ > (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > +/* > + * Synaptics VideoSmart modifiers > + * > + * Tiles could be arranged in Groups of Tiles (GOTs), it is a small tile > + * within a tile. GOT size and layout varies based on platform and > + * performance concern. > + * > + * Besides, an 8 length 4 bytes arrary (32 bytes) would be need to store > + * some compression parameters for a compression metadata plane. > + * > + * Further information can be found in > + * Documentation/gpu/synaptics.rst > + * > + * Macro > + * Bits Param Description > + * ---- ----- ----------------------------------------------------------------- > + * > + * 7:0 f Scan direction description. > + * > + * 0 = Invalid > + * 1 = V4, the scan would always start from vertical for 4 pixel > + * then move back to the start pixel of the next horizontal > + * direction. > + * 2 = Reserved for future use. > + * > + * 15:8 m The times of pattern repeat in the right angle direction from > + * the first scan direction. > + * > + * 19:16 p The padding bits after the whole scan, could be zero. > + * > + * 20:20 g GOT packing flag. > + * > + * 23:21 - Reserved for future use. Must be zero. Can you pls fold all the future use reservations into the top end? Also I think it'd be good to at least reserve maybe the top 8 bits or so for a synaptics specific format indicator, so that it's easier to extend this in the future ... -Daniel > + * > + * 27:24 h log2(horizontal) of pixels, in GOTs. > + * > + * 31:28 v log2(vertical) of pixels, in GOTs. > + * > + * 35:32 - Reserved for future use. Must be zero. > + * > + * 36:36 c Compression flag. > + * > + * 55:37 - Reserved for future use. Must be zero. > + * > + */ > + > +#define DRM_FORMAT_MOD_SYNA_V4_TILED fourcc_mod_code(SYNAPTICS, 1) > + > +#define DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(f, m, p, g, h, v, c) \ > + fourcc_mod_code(SYNAPTICS, ((__u64)((f) & 0xff) | \ > + ((__u64)((m) & 0xff) << 8) | \ > + ((__u64)((p) & 0xf) << 16) | \ > + ((__u64)((g) & 0x1) << 20) | \ > + ((__u64)((h) & 0xf) << 24) | \ > + ((__u64)((v) & 0xf) << 28) | \ > + ((__u64)((c) & 0x1) << 36))) > + > +#define DRM_FORMAT_MOD_SYNA_V4H1 \ > + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 0, 0, 0, 0) > + > +#define DRM_FORMAT_MOD_SYNA_V4H3P8 \ > + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 0, 0, 0, 0) > + > +#define DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED \ > + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 6, 2, 1) > + > +#define DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED \ > + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 6, 2, 1) > + > +#define DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED \ > + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 7, 7, 1) > + > +#define DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED \ > + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 7, 7, 1) > + > #if defined(__cplusplus) > } > #endif > -- > 2.37.3 > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers 2022-11-30 11:30 ` Daniel Vetter @ 2022-11-30 16:49 ` Randy Li 2022-12-01 9:38 ` Daniel Vetter 0 siblings, 1 reply; 8+ messages in thread From: Randy Li @ 2022-11-30 16:49 UTC (permalink / raw) To: Daniel Vetter Cc: Hsia-Jun Li, dri-devel, nicolas, sakari.ailus, airlied, ayaka, linux-kernel, tfiga, helen.koike, linux-media, ezequiel, tzimmermann, ribalda, sebastian.hesselbarth, mchehab, linux-arm-kernel, laurent.pinchart Sent from my iPad > On Nov 30, 2022, at 7:30 PM, Daniel Vetter <daniel@ffwll.ch> wrote: > > CAUTION: Email originated externally, do not click links or open attachments unless you recognize the sender and know the content is safe. > > >> On Wed, Nov 30, 2022 at 05:21:48PM +0800, Hsia-Jun Li wrote: >> From: "Hsia-Jun(Randy) Li" <randy.li@synaptics.com> >> >> Those modifiers only record the parameters would effort pixel >> layout or memory layout. Whether physical memory page mapping >> is used is not a part of format. >> >> Signed-off-by: Hsia-Jun(Randy) Li <randy.li@synaptics.com> >> --- >> include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 76 insertions(+) >> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h >> index bc056f2d537d..e0905f573f43 100644 >> --- a/include/uapi/drm/drm_fourcc.h >> +++ b/include/uapi/drm/drm_fourcc.h >> @@ -407,6 +407,7 @@ extern "C" { >> #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 >> #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 >> #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a >> +#define DRM_FORMAT_MOD_VENDOR_SYNAPTICS 0x0b >> >> /* add more to the end as needed */ >> >> @@ -1507,6 +1508,81 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) >> #define AMD_FMT_MOD_CLEAR(field) \ >> (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) >> >> +/* >> + * Synaptics VideoSmart modifiers >> + * >> + * Tiles could be arranged in Groups of Tiles (GOTs), it is a small tile >> + * within a tile. GOT size and layout varies based on platform and >> + * performance concern. >> + * >> + * Besides, an 8 length 4 bytes arrary (32 bytes) would be need to store >> + * some compression parameters for a compression metadata plane. >> + * >> + * Further information can be found in >> + * Documentation/gpu/synaptics.rst >> + * >> + * Macro >> + * Bits Param Description >> + * ---- ----- ----------------------------------------------------------------- >> + * >> + * 7:0 f Scan direction description. >> + * >> + * 0 = Invalid >> + * 1 = V4, the scan would always start from vertical for 4 pixel >> + * then move back to the start pixel of the next horizontal >> + * direction. >> + * 2 = Reserved for future use. >> + * >> + * 15:8 m The times of pattern repeat in the right angle direction from >> + * the first scan direction. >> + * >> + * 19:16 p The padding bits after the whole scan, could be zero. >> + * >> + * 20:20 g GOT packing flag. >> + * >> + * 23:21 - Reserved for future use. Must be zero. > > Can you pls fold all the future use reservations into the top end? You see we could put more related flag in each of reserved area. Here is for the group of tiles flag. Bit 35 to 32 could be used for describing the dimension of the group of tiles. > Also I > think it'd be good to at least reserve maybe the top 8 bits or so for a > synaptics specific format indicator, so that it's easier to extend this in > the future ... I think the bit 56 to 63 are used for storing the vendor id. That is why I didn’t include them below. Or you mean the bit 7 to 0? Do yo > -Daniel > > >> + * >> + * 27:24 h log2(horizontal) of pixels, in GOTs. >> + * >> + * 31:28 v log2(vertical) of pixels, in GOTs. >> + * >> + * 35:32 - Reserved for future use. Must be zero. >> + * >> + * 36:36 c Compression flag. >> + * >> + * 55:37 - Reserved for future use. Must be zero. >> + * >> + */ >> + >> +#define DRM_FORMAT_MOD_SYNA_V4_TILED fourcc_mod_code(SYNAPTICS, 1) >> + >> +#define DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(f, m, p, g, h, v, c) \ >> + fourcc_mod_code(SYNAPTICS, ((__u64)((f) & 0xff) | \ >> + ((__u64)((m) & 0xff) << 8) | \ >> + ((__u64)((p) & 0xf) << 16) | \ >> + ((__u64)((g) & 0x1) << 20) | \ >> + ((__u64)((h) & 0xf) << 24) | \ >> + ((__u64)((v) & 0xf) << 28) | \ >> + ((__u64)((c) & 0x1) << 36))) >> + >> +#define DRM_FORMAT_MOD_SYNA_V4H1 \ >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 0, 0, 0, 0) >> + >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8 \ >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 0, 0, 0, 0) >> + >> +#define DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED \ >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 6, 2, 1) >> + >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED \ >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 6, 2, 1) >> + >> +#define DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED \ >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 7, 7, 1) >> + >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED \ >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 7, 7, 1) >> + >> #if defined(__cplusplus) >> } >> #endif >> -- >> 2.37.3 >> > > -- > Daniel Vetter > Software Engineer, Intel Corporation > https://urldefense.proofpoint.com/v2/url?u=http-3A__blog.ffwll.ch&d=DwIBAg&c=7dfBJ8cXbWjhc0BhImu8wVIoUFmBzj1s88r8EGyM0UY&r=P4xb2_7biqBxD4LGGPrSV6j-jf3C3xlR7PXU-mLTeZE&m=d1mgHWc-ItDXK9dSnz0WGYs9xoXTTk9LqbifMtn2LOxmaHHsc4ieCoE78BFkHI1i&s=8ptqPzTUwb3X3fBSyQA6nVAA6DchubUUsMRgmLIp1lY&e= ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers 2022-11-30 16:49 ` Randy Li @ 2022-12-01 9:38 ` Daniel Vetter 2022-12-01 13:59 ` Randy Li 0 siblings, 1 reply; 8+ messages in thread From: Daniel Vetter @ 2022-12-01 9:38 UTC (permalink / raw) To: Randy Li Cc: Daniel Vetter, Hsia-Jun Li, dri-devel, nicolas, sakari.ailus, airlied, ayaka, linux-kernel, tfiga, helen.koike, linux-media, ezequiel, tzimmermann, ribalda, sebastian.hesselbarth, mchehab, linux-arm-kernel, laurent.pinchart On Thu, Dec 01, 2022 at 12:49:16AM +0800, Randy Li wrote: > > > Sent from my iPad > > > On Nov 30, 2022, at 7:30 PM, Daniel Vetter <daniel@ffwll.ch> wrote: > > > > CAUTION: Email originated externally, do not click links or open attachments unless you recognize the sender and know the content is safe. > > > > > >> On Wed, Nov 30, 2022 at 05:21:48PM +0800, Hsia-Jun Li wrote: > >> From: "Hsia-Jun(Randy) Li" <randy.li@synaptics.com> > >> > >> Those modifiers only record the parameters would effort pixel > >> layout or memory layout. Whether physical memory page mapping > >> is used is not a part of format. > >> > >> Signed-off-by: Hsia-Jun(Randy) Li <randy.li@synaptics.com> > >> --- > >> include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++++++++++++++ > >> 1 file changed, 76 insertions(+) > >> > >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > >> index bc056f2d537d..e0905f573f43 100644 > >> --- a/include/uapi/drm/drm_fourcc.h > >> +++ b/include/uapi/drm/drm_fourcc.h > >> @@ -407,6 +407,7 @@ extern "C" { > >> #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 > >> #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 > >> #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a > >> +#define DRM_FORMAT_MOD_VENDOR_SYNAPTICS 0x0b > >> > >> /* add more to the end as needed */ > >> > >> @@ -1507,6 +1508,81 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > >> #define AMD_FMT_MOD_CLEAR(field) \ > >> (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > >> > >> +/* > >> + * Synaptics VideoSmart modifiers > >> + * > >> + * Tiles could be arranged in Groups of Tiles (GOTs), it is a small tile > >> + * within a tile. GOT size and layout varies based on platform and > >> + * performance concern. > >> + * > >> + * Besides, an 8 length 4 bytes arrary (32 bytes) would be need to store > >> + * some compression parameters for a compression metadata plane. > >> + * > >> + * Further information can be found in > >> + * Documentation/gpu/synaptics.rst > >> + * > >> + * Macro > >> + * Bits Param Description > >> + * ---- ----- ----------------------------------------------------------------- > >> + * > >> + * 7:0 f Scan direction description. > >> + * > >> + * 0 = Invalid > >> + * 1 = V4, the scan would always start from vertical for 4 pixel > >> + * then move back to the start pixel of the next horizontal > >> + * direction. > >> + * 2 = Reserved for future use. > >> + * > >> + * 15:8 m The times of pattern repeat in the right angle direction from > >> + * the first scan direction. > >> + * > >> + * 19:16 p The padding bits after the whole scan, could be zero. > >> + * > >> + * 20:20 g GOT packing flag. > >> + * > >> + * 23:21 - Reserved for future use. Must be zero. > > > > Can you pls fold all the future use reservations into the top end? > You see we could put more related flag in each of reserved area. > Here is for the group of tiles flag. > Bit 35 to 32 could be used for describing the dimension of the group of tiles. Oh also on the dimension thing, this is the tile size and has nothing to do with the overall buffer size, right? Because the overall buffer size is meant to be carried in separate metadata (like the drm_framebuffer structure or ADDFB2 ioctl data). drm fourcc/modifier assume that height, width, offset and stride are specified per plane already (unless the auxiary plane has a fixed layout and is not tracked as a separate plane for this format). > > Also I > > think it'd be good to at least reserve maybe the top 8 bits or so for a > > synaptics specific format indicator, so that it's easier to extend this in > > the future ... > I think the bit 56 to 63 are used for storing the vendor id. That is why I didn’t include them below. Or you mean the bit 7 to 0? > Do yo Yeah there's 8 bit vendor id, but you could reserve another 8 bit at the top (so 48:55 or something like that) to enumerate within the synaptics space. Just to future proof the schema, because experience says that hw engineers absolutely do love to change this stuff eventually. -Daniel > > -Daniel > > > > > >> + * > >> + * 27:24 h log2(horizontal) of pixels, in GOTs. > >> + * > >> + * 31:28 v log2(vertical) of pixels, in GOTs. > >> + * > >> + * 35:32 - Reserved for future use. Must be zero. > >> + * > >> + * 36:36 c Compression flag. > >> + * > >> + * 55:37 - Reserved for future use. Must be zero. > >> + * > >> + */ > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4_TILED fourcc_mod_code(SYNAPTICS, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(f, m, p, g, h, v, c) \ > >> + fourcc_mod_code(SYNAPTICS, ((__u64)((f) & 0xff) | \ > >> + ((__u64)((m) & 0xff) << 8) | \ > >> + ((__u64)((p) & 0xf) << 16) | \ > >> + ((__u64)((g) & 0x1) << 20) | \ > >> + ((__u64)((h) & 0xf) << 24) | \ > >> + ((__u64)((v) & 0xf) << 28) | \ > >> + ((__u64)((c) & 0x1) << 36))) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1 \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 0, 0, 0, 0) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8 \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 0, 0, 0, 0) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 6, 2, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 6, 2, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 7, 7, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 7, 7, 1) > >> + > >> #if defined(__cplusplus) > >> } > >> #endif > >> -- > >> 2.37.3 > >> > > > > -- > > Daniel Vetter > > Software Engineer, Intel Corporation > > https://urldefense.proofpoint.com/v2/url?u=http-3A__blog.ffwll.ch&d=DwIBAg&c=7dfBJ8cXbWjhc0BhImu8wVIoUFmBzj1s88r8EGyM0UY&r=P4xb2_7biqBxD4LGGPrSV6j-jf3C3xlR7PXU-mLTeZE&m=d1mgHWc-ItDXK9dSnz0WGYs9xoXTTk9LqbifMtn2LOxmaHHsc4ieCoE78BFkHI1i&s=8ptqPzTUwb3X3fBSyQA6nVAA6DchubUUsMRgmLIp1lY&e= -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers 2022-12-01 9:38 ` Daniel Vetter @ 2022-12-01 13:59 ` Randy Li 0 siblings, 0 replies; 8+ messages in thread From: Randy Li @ 2022-12-01 13:59 UTC (permalink / raw) To: Daniel Vetter Cc: Hsia-Jun Li, dri-devel, nicolas, sakari.ailus, airlied, ayaka, linux-kernel, tfiga, helen.koike, linux-media, ezequiel, tzimmermann, ribalda, sebastian.hesselbarth, mchehab, linux-arm-kernel, laurent.pinchart Sent from my iPad > On Dec 1, 2022, at 5:39 PM, Daniel Vetter <daniel@ffwll.ch> wrote: > CAUTION: Email originated externally, do not click links or open attachments unless you recognize the sender and know the content is safe. > > >> On Thu, Dec 01, 2022 at 12:49:16AM +0800, Randy Li wrote: >> >> >> Sent from my iPad >> >>>> On Nov 30, 2022, at 7:30 PM, Daniel Vetter <daniel@ffwll.ch> wrote: >>> CAUTION: Email originated externally, do not click links or open attachments unless you recognize the sender and know the content is safe. >>>> On Wed, Nov 30, 2022 at 05:21:48PM +0800, Hsia-Jun Li wrote: >>>> From: "Hsia-Jun(Randy) Li" <randy.li@synaptics.com> >>>> Those modifiers only record the parameters would effort pixel >>>> layout or memory layout. Whether physical memory page mapping >>>> is used is not a part of format. >>>> Signed-off-by: Hsia-Jun(Randy) Li <randy.li@synaptics.com> >>>> --- >>>> include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++++++++++++++ >>>> 1 file changed, 76 insertions(+) >>>> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h >>>> index bc056f2d537d..e0905f573f43 100644 >>>> --- a/include/uapi/drm/drm_fourcc.h >>>> +++ b/include/uapi/drm/drm_fourcc.h >>>> @@ -407,6 +407,7 @@ extern "C" { >>>> #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 >>>> #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 >>>> #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a >>>> +#define DRM_FORMAT_MOD_VENDOR_SYNAPTICS 0x0b >>>> /* add more to the end as needed */ >>>> @@ -1507,6 +1508,81 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) >>>> #define AMD_FMT_MOD_CLEAR(field) \ >>>> (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) >>>> +/* >>>> + * Synaptics VideoSmart modifiers >>>> + * >>>> + * Tiles could be arranged in Groups of Tiles (GOTs), it is a small tile >>>> + * within a tile. GOT size and layout varies based on platform and >>>> + * performance concern. >>>> + * >>>> + * Besides, an 8 length 4 bytes arrary (32 bytes) would be need to store >>>> + * some compression parameters for a compression metadata plane. >>>> + * >>>> + * Further information can be found in >>>> + * Documentation/gpu/synaptics.rst >>>> + * >>>> + * Macro >>>> + * Bits Param Description >>>> + * ---- ----- ----------------------------------------------------------------- >>>> + * >>>> + * 7:0 f Scan direction description. >>>> + * >>>> + * 0 = Invalid >>>> + * 1 = V4, the scan would always start from vertical for 4 pixel >>>> + * then move back to the start pixel of the next horizontal >>>> + * direction. >>>> + * 2 = Reserved for future use. >>>> + * >>>> + * 15:8 m The times of pattern repeat in the right angle direction from >>>> + * the first scan direction. >>>> + * >>>> + * 19:16 p The padding bits after the whole scan, could be zero. >>>> + * >>>> + * 20:20 g GOT packing flag. >>>> + * >>>> + * 23:21 - Reserved for future use. Must be zero. >>> Can you pls fold all the future use reservations into the top end? >> You see we could put more related flag in each of reserved area. >> Here is for the group of tiles flag. >> Bit 35 to 32 could be used for describing the dimension of the group of tiles. > > Oh also on the dimension thing, this is the tile size and has nothing to > do with the overall buffer size, right? I don’t think you could have a insufficient tile, that applies to the group of tile. > Because the overall buffer size is > meant to be carried in separate metadata (like the drm_framebuffer > structure or ADDFB2 ioctl data). drm fourcc/modifier assume that height, > width, offset and stride are specified per plane already (unless the > auxiary plane has a fixed layout and is not tracked as a separate plane > for this format). One thing I noticed here, there is no way to tell the buffer size that user should request/allocate from the drm API. It needs to be calculated in the userspace unless you would use the custom ioctl. > >>> Also I >>> think it'd be good to at least reserve maybe the top 8 bits or so for a >>> synaptics specific format indicator, so that it's easier to extend this in >>> the future ... >> I think the bit 56 to 63 are used for storing the vendor id. That is why I didn’t include them below. Or you mean the bit 7 to 0? >> Do yo > > Yeah there's 8 bit vendor id, but you could reserve another 8 bit at the > top (so 48:55 or something like that) to enumerate within the synaptics > space. Just to future proof the schema, because experience says that hw > engineers absolutely do love to change this stuff eventually. I left the whole 37:55. > -Daniel > >>> -Daniel >>>> + * >>>> + * 27:24 h log2(horizontal) of pixels, in GOTs. >>>> + * >>>> + * 31:28 v log2(vertical) of pixels, in GOTs. >>>> + * >>>> + * 35:32 - Reserved for future use. Must be zero. >>>> + * >>>> + * 36:36 c Compression flag. >>>> + * >>>> + * 55:37 - Reserved for future use. Must be zero. >>>> + * >>>> + */ >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_V4_TILED fourcc_mod_code(SYNAPTICS, 1) >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(f, m, p, g, h, v, c) \ >>>> + fourcc_mod_code(SYNAPTICS, ((__u64)((f) & 0xff) | \ >>>> + ((__u64)((m) & 0xff) << 8) | \ >>>> + ((__u64)((p) & 0xf) << 16) | \ >>>> + ((__u64)((g) & 0x1) << 20) | \ >>>> + ((__u64)((h) & 0xf) << 24) | \ >>>> + ((__u64)((v) & 0xf) << 28) | \ >>>> + ((__u64)((c) & 0x1) << 36))) >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_V4H1 \ >>>> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 0, 0, 0, 0) >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_V4H3P8 \ >>>> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 0, 0, 0, 0) >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED \ >>>> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 6, 2, 1) >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED \ >>>> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 6, 2, 1) >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED \ >>>> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 7, 7, 1) >>>> + >>>> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED \ >>>> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 7, 7, 1) >>>> + >>>> #if defined(__cplusplus) >>>> } >>>> #endif >>>> -- >>>> 2.37.3 >>> -- >>> Daniel Vetter >>> Software Engineer, Intel Corporation >>> https://urldefense.proofpoint.com/v2/url?u=http-3A__blog.ffwll.ch&d=DwIBAg&c=7dfBJ8cXbWjhc0BhImu8wVIoUFmBzj1s88r8EGyM0UY&r=P4xb2_7biqBxD4LGGPrSV6j-jf3C3xlR7PXU-mLTeZE&m=d1mgHWc-ItDXK9dSnz0WGYs9xoXTTk9LqbifMtn2LOxmaHHsc4ieCoE78BFkHI1i&s=8ptqPzTUwb3X3fBSyQA6nVAA6DchubUUsMRgmLIp1lY&e= > > -- > Daniel Vetter > Software Engineer, Intel Corporation > https://urldefense.proofpoint.com/v2/url?u=http-3A__blog.ffwll.ch&d=DwIDaQ&c=7dfBJ8cXbWjhc0BhImu8wVIoUFmBzj1s88r8EGyM0UY&r=reqwguHMk9_Krd2xyybLKUi7qRQg3FIHG-6xLimUZv8&m=tmN4FcUbfHQ74lDlCJfhwkr5WqNNCY6CzNFzTM6X_i1HSp9Nt2WlyXv-Wu-yNI9y&s=yEyPRethHiPbmj0QHoJMsmb1Pj2IN7B0J8_vlBvy0wk&e= ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v5 2/2] Documentation/gpu: Add Synaptics tiling formats documentation 2022-11-30 9:21 [PATCH v5 0/2] Add pixel formats used in Synatpics SoC Hsia-Jun Li 2022-11-30 9:21 ` [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers Hsia-Jun Li @ 2022-11-30 9:21 ` Hsia-Jun Li 2022-12-01 7:25 ` kernel test robot 1 sibling, 1 reply; 8+ messages in thread From: Hsia-Jun Li @ 2022-11-30 9:21 UTC (permalink / raw) To: dri-devel Cc: airlied, ayaka, sakari.ailus, ezequiel, tzimmermann, linux-kernel, laurent.pinchart, mchehab, tfiga, mripard, ribalda, maarten.lankhorst, linux-media, sebastian.hesselbarth, helen.koike, nicolas, linux-arm-kernel, Hsia-Jun Li From: Randy Li <ayaka@soulik.info> Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Hsia-Jun(Randy) Li <randy.li@synaptics.com> --- Documentation/gpu/drivers.rst | 1 + Documentation/gpu/synaptics.rst | 104 ++++++++++++++++++++++++++++++++ 2 files changed, 105 insertions(+) create mode 100644 Documentation/gpu/synaptics.rst diff --git a/Documentation/gpu/drivers.rst b/Documentation/gpu/drivers.rst index 3a52f48215a3..7e820c93d994 100644 --- a/Documentation/gpu/drivers.rst +++ b/Documentation/gpu/drivers.rst @@ -18,6 +18,7 @@ GPU Driver Documentation xen-front afbc komeda-kms + synaptics .. only:: subproject and html diff --git a/Documentation/gpu/synaptics.rst b/Documentation/gpu/synaptics.rst new file mode 100644 index 000000000000..b0564d2fe3ce --- /dev/null +++ b/Documentation/gpu/synaptics.rst @@ -0,0 +1,104 @@ +.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later + +================ +Synaptics Tiling +================ + +The tiling pixel formats in Synpatics Video Smart platform have +many variants. Tiles could form the group of tiles(GOT), pixels +within a group rectangle are stored into tile. +There are two parameters which consist a modifier described +the (nearest) width and height pixels in a group. + +Meanwhile, the tile in a group may not follow dimension +layout, tile could form a small group of tiles, then that (sub)group +of tiles would form a bigger group. We won't describe the dimension +layout inside the group of tiles here. The layout of the group +of tiles is fixed with the group width and height parameters +in the same generation of the platform. + +Compression +=========== +The proprietary lossless image compression protocol in Synaptics +could minimizes the amount of data transferred (less memory bandwidth +consumption) between devices. It would usually apply to the tiling +pixel format. + +Each component would request an extra page aligned length buffer +for storing the compression meta data. Also a 32 bytes parameters +set would come with a compression meta data buffer. + +The component here corresponds to a signal type (i.e. Luma, Chroma). +They could be encoded into one or multiple metadata planes, but +their compression parameters would still be individual. + +Pixel format modifiers +====================== +Addition alignment requirement for stride and size of a memory plane +could apply beyond what has been mentioned below. Remember always +negotiating with all the devices in pipeline before allocation. + +.. raw:: latex + + \small + +.. tabularcolumns:: |p{5.8cm}|p{1.2cm}|p{10.3cm}| + +.. cssclass:: longtable + +.. flat-table:: Synpatics Image Format Modifiers + :header-rows: 1 + :stub-columns: 0 + :widths: 3 1 8 + + * - Identifier + - Fourcc + - Details + * .. _DRM-FORMAT-MOD-SYNA-V4H1 + + - ``DRM_FORMAT_MOD_SYNA_V4H1`` + - ``DRM_FORMAT_NV12`` + - The plain uncompressed 8 bits tile format. It sounds similar to + Intel's Y-tile. but it won't take any pixel from the next X direction + in a tile group. The line stride and image height must be aligned to + a multiple of 16. The height of chrominance plane would plus 8. + * .. _DRM-FORMAT-MOD-SYNA-V4H3P8 + + - ``DRM_FORMAT_MOD_SYNA_V4H3P8`` + - ``DRM_FORMAT_NV15`` + - The plain uncompressed 10 bits tile format. It stores pixel in 2D + 3x4 tiles with a 8bits padding to each of tile. Then a tile is in a + 128 bits cache line. + * .. _DRM-FORMAT-MOD-SYNA-V4H1-64L4-COMPRESSED + + - ``DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED`` + - ``DRM_FORMAT_NV12`` + - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H1``. + A group of tiles would contain 64x4 pixels, where a tile has 1x4 + pixel. + * .. _DRM-FORMAT-MOD-SYNA-V4H3P8-64L4-COMPRESSED + + - ``DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED`` + - ``DRM_FORMAT_NV15`` + - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H3P8``. + A group of tiles would contains 48x4 pixels, where a tile has 3x4 pixels + and a 8 bits padding in the end of a tile. A group of tiles would + be 256 bytes. + * .. _DRM-FORMAT-MOD-SYNA-V4H1-128L128-COMPRESSED + + - ``DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED`` + - ``DRM_FORMAT_NV12`` + - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H1``. + A group of tiles would contain 128x32 pixels, where a tile has 1x4 pixel. + * .. _DRM-FORMAT-MOD-SYNA-V4H3P8-128L128-COMPRESSED + + - ``DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED`` + - ``DRM_FORMAT_NV15`` + - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H3P8``. + A group of tiles would contains 96x128 pixels, where a tile has 3x4 pixels + and a 8 bits padding in the end of a tile. A group of tiles would + be 16 KiB. + +.. raw:: latex + + \normalsize -- 2.37.3 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v5 2/2] Documentation/gpu: Add Synaptics tiling formats documentation 2022-11-30 9:21 ` [PATCH v5 2/2] Documentation/gpu: Add Synaptics tiling formats documentation Hsia-Jun Li @ 2022-12-01 7:25 ` kernel test robot 0 siblings, 0 replies; 8+ messages in thread From: kernel test robot @ 2022-12-01 7:25 UTC (permalink / raw) To: Hsia-Jun Li, dri-devel Cc: oe-kbuild-all, nicolas, sakari.ailus, airlied, ayaka, linux-kernel, tfiga, Hsia-Jun Li, helen.koike, linux-media, ezequiel, tzimmermann, ribalda, sebastian.hesselbarth, mchehab, linux-arm-kernel, laurent.pinchart [-- Attachment #1: Type: text/plain, Size: 4227 bytes --] Hi Hsia-Jun, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-misc/drm-misc-next] [also build test WARNING on drm/drm-next drm-exynos/exynos-drm-next drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.1-rc7 next-20221130] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Hsia-Jun-Li/Add-pixel-formats-used-in-Synatpics-SoC/20221130-172411 base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next patch link: https://lore.kernel.org/r/20221130092149.102788-3-randy.li%40synaptics.com patch subject: [PATCH v5 2/2] Documentation/gpu: Add Synaptics tiling formats documentation reproduce: # https://github.com/intel-lab-lkp/linux/commit/7f84f8d9c98d589eb7283261c18f3702e69e236d git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Hsia-Jun-Li/Add-pixel-formats-used-in-Synatpics-SoC/20221130-172411 git checkout 7f84f8d9c98d589eb7283261c18f3702e69e236d make menuconfig # enable CONFIG_COMPILE_TEST, CONFIG_WARN_MISSING_DOCUMENTS, CONFIG_WARN_ABI_ERRORS make htmldocs If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> All warnings (new ones prefixed by >>): >> Documentation/gpu/synaptics.rst:57: WARNING: malformed hyperlink target. vim +57 Documentation/gpu/synaptics.rst 48 49 .. flat-table:: Synpatics Image Format Modifiers 50 :header-rows: 1 51 :stub-columns: 0 52 :widths: 3 1 8 53 54 * - Identifier 55 - Fourcc 56 - Details > 57 * .. _DRM-FORMAT-MOD-SYNA-V4H1 58 59 - ``DRM_FORMAT_MOD_SYNA_V4H1`` 60 - ``DRM_FORMAT_NV12`` 61 - The plain uncompressed 8 bits tile format. It sounds similar to 62 Intel's Y-tile. but it won't take any pixel from the next X direction 63 in a tile group. The line stride and image height must be aligned to 64 a multiple of 16. The height of chrominance plane would plus 8. 65 * .. _DRM-FORMAT-MOD-SYNA-V4H3P8 66 67 - ``DRM_FORMAT_MOD_SYNA_V4H3P8`` 68 - ``DRM_FORMAT_NV15`` 69 - The plain uncompressed 10 bits tile format. It stores pixel in 2D 70 3x4 tiles with a 8bits padding to each of tile. Then a tile is in a 71 128 bits cache line. 72 * .. _DRM-FORMAT-MOD-SYNA-V4H1-64L4-COMPRESSED 73 74 - ``DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED`` 75 - ``DRM_FORMAT_NV12`` 76 - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H1``. 77 A group of tiles would contain 64x4 pixels, where a tile has 1x4 78 pixel. 79 * .. _DRM-FORMAT-MOD-SYNA-V4H3P8-64L4-COMPRESSED 80 81 - ``DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED`` 82 - ``DRM_FORMAT_NV15`` 83 - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H3P8``. 84 A group of tiles would contains 48x4 pixels, where a tile has 3x4 pixels 85 and a 8 bits padding in the end of a tile. A group of tiles would 86 be 256 bytes. 87 * .. _DRM-FORMAT-MOD-SYNA-V4H1-128L128-COMPRESSED 88 89 - ``DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED`` 90 - ``DRM_FORMAT_NV12`` 91 - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H1``. 92 A group of tiles would contain 128x32 pixels, where a tile has 1x4 pixel. 93 * .. _DRM-FORMAT-MOD-SYNA-V4H3P8-128L128-COMPRESSED 94 95 - ``DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED`` 96 - ``DRM_FORMAT_NV15`` 97 - Group of tiles and compressed variant of ``DRM_FORMAT_MOD_SYNA_V4H3P8``. 98 A group of tiles would contains 96x128 pixels, where a tile has 3x4 pixels 99 and a 8 bits padding in the end of a tile. A group of tiles would 100 be 16 KiB. 101 -- 0-DAY CI Kernel Test Service https://01.org/lkp [-- Attachment #2: config --] [-- Type: text/plain, Size: 38869 bytes --] # # Automatically generated file; DO NOT EDIT. # Linux/x86_64 6.1.0-rc6 Kernel Configuration # CONFIG_CC_VERSION_TEXT="gcc-11 (Debian 11.3.0-8) 11.3.0" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=110300 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y CONFIG_AS_VERSION=23900 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=23900 CONFIG_LLD_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=123 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_COMPILE_TEST=y # CONFIG_WERROR is not set CONFIG_LOCALVERSION="" CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_HAVE_KERNEL_ZSTD=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" # CONFIG_SYSVIPC is not set # CONFIG_WATCH_QUEUE is not set # CONFIG_CROSS_MEMORY_ATTACH is not set # CONFIG_USELIB is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y # # Timers subsystem # CONFIG_HZ_PERIODIC=y # CONFIG_NO_HZ_IDLE is not set # CONFIG_NO_HZ is not set # CONFIG_HIGH_RES_TIMERS is not set CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100 # end of Timers subsystem CONFIG_HAVE_EBPF_JIT=y CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y # # BPF subsystem # # CONFIG_BPF_SYSCALL is not set # end of BPF subsystem CONFIG_PREEMPT_NONE_BUILD=y CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set # CONFIG_PREEMPT_DYNAMIC is not set # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_PSI is not set # end of CPU/Task time and stats accounting CONFIG_CPU_ISOLATION=y # # RCU Subsystem # CONFIG_TINY_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TINY_SRCU=y # end of RCU Subsystem # CONFIG_IKCONFIG is not set # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=17 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # # end of Scheduler features CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC12_NO_ARRAY_BOUNDS=y CONFIG_ARCH_SUPPORTS_INT128=y # CONFIG_CGROUPS is not set CONFIG_NAMESPACES=y # CONFIG_UTS_NS is not set # CONFIG_TIME_NS is not set # CONFIG_USER_NS is not set # CONFIG_PID_NS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_SCHED_AUTOGROUP is not set # CONFIG_SYSFS_DEPRECATED is not set # CONFIG_RELAY is not set # CONFIG_BLK_DEV_INITRD is not set # CONFIG_BOOT_CONFIG is not set # CONFIG_INITRAMFS_PRESERVE_MTIME is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LD_ORPHAN_WARN=y CONFIG_SYSCTL=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y # CONFIG_EXPERT is not set CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_RSEQ=y # CONFIG_EMBEDDED is not set CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # end of Kernel Performance Events And Counters # CONFIG_PROFILING is not set # end of General setup CONFIG_64BIT=y CONFIG_X86_64=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_MMU=y CONFIG_ARCH_MMAP_RND_BITS_MIN=28 CONFIG_ARCH_MMAP_RND_BITS_MAX=32 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_NR_GPIO=1024 CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_AUDIT_ARCH=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_PGTABLE_LEVELS=4 CONFIG_CC_HAS_SANE_STACKPROTECTOR=y # # Processor type and features # # CONFIG_SMP is not set CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_MPPARSE=y # CONFIG_GOLDFISH is not set # CONFIG_X86_CPU_RESCTRL is not set # CONFIG_X86_EXTENDED_PLATFORM is not set # CONFIG_SCHED_OMIT_FRAME_POINTER is not set # CONFIG_HYPERVISOR_GUEST is not set # CONFIG_MK8 is not set # CONFIG_MPSC is not set # CONFIG_MCORE2 is not set # CONFIG_MATOM is not set CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_HYGON=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_ZHAOXIN=y CONFIG_HPET_TIMER=y CONFIG_DMI=y CONFIG_NR_CPUS_RANGE_BEGIN=1 CONFIG_NR_CPUS_RANGE_END=1 CONFIG_NR_CPUS_DEFAULT=1 CONFIG_NR_CPUS=1 CONFIG_UP_LATE_INIT=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y # CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set # CONFIG_X86_MCE is not set # # Performance monitoring # # CONFIG_PERF_EVENTS_AMD_POWER is not set # CONFIG_PERF_EVENTS_AMD_UNCORE is not set # CONFIG_PERF_EVENTS_AMD_BRS is not set # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y # CONFIG_X86_IOPL_IOPERM is not set # CONFIG_MICROCODE is not set # CONFIG_X86_MSR is not set # CONFIG_X86_CPUID is not set # CONFIG_X86_5LEVEL is not set CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_AMD_MEM_ENCRYPT is not set CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_MTRR=y # CONFIG_MTRR_SANITIZER is not set CONFIG_X86_PAT=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_X86_UMIP=y CONFIG_CC_HAS_IBT=y # CONFIG_X86_KERNEL_IBT is not set # CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set # CONFIG_HZ_100 is not set CONFIG_HZ_250=y # CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=250 # CONFIG_KEXEC is not set # CONFIG_CRASH_DUMP is not set CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x200000 CONFIG_LEGACY_VSYSCALL_XONLY=y # CONFIG_LEGACY_VSYSCALL_NONE is not set # CONFIG_CMDLINE_BOOL is not set CONFIG_MODIFY_LDT_SYSCALL=y # CONFIG_STRICT_SIGALTSTACK_SIZE is not set CONFIG_HAVE_LIVEPATCH=y # end of Processor type and features CONFIG_CC_HAS_SLS=y CONFIG_CC_HAS_RETURN_THUNK=y # CONFIG_SPECULATION_MITIGATIONS is not set CONFIG_ARCH_HAS_ADD_PAGES=y CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y # # Power management and ACPI options # # CONFIG_SUSPEND is not set # CONFIG_PM is not set CONFIG_ARCH_SUPPORTS_ACPI=y # CONFIG_ACPI is not set # # CPU Frequency scaling # # CONFIG_CPU_FREQ is not set # end of CPU Frequency scaling # # CPU Idle # # CONFIG_CPU_IDLE is not set # end of CPU Idle # end of Power management and ACPI options # # Bus options (PCI etc.) # CONFIG_ISA_DMA_API=y # end of Bus options (PCI etc.) # # Binary Emulations # # CONFIG_IA32_EMULATION is not set # CONFIG_X86_X32_ABI is not set # end of Binary Emulations CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y CONFIG_AS_TPAUSE=y # # General architecture-dependent options # CONFIG_GENERIC_ENTRY=y # CONFIG_JUMP_LABEL is not set # CONFIG_STATIC_CALL_SELFTEST is not set CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_MERGE_VMAS=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y # CONFIG_SECCOMP is not set CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y # CONFIG_STACKPROTECTOR is not set CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_LTO_NONE=y CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_HAVE_ARCH_HUGE_VMALLOC=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_HAVE_OBJTOOL=y CONFIG_HAVE_JUMP_LABEL_HACK=y CONFIG_HAVE_NOINSTR_HACK=y CONFIG_HAVE_NOINSTR_VALIDATION=y CONFIG_HAVE_UACCESS_VALIDATION=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y # CONFIG_COMPAT_32BIT_TIME is not set CONFIG_HAVE_ARCH_VMAP_STACK=y # CONFIG_VMAP_STACK is not set CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDOMIZE_KSTACK_OFFSET=y # CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_HAS_MEM_ENCRYPT=y CONFIG_HAVE_STATIC_CALL=y CONFIG_HAVE_STATIC_CALL_INLINE=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAS_ELFCORE_COMPAT=y CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y CONFIG_DYNAMIC_SIGFRAME=y CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y # # GCOV-based kernel profiling # CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y # CONFIG_GCC_PLUGINS is not set # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 # CONFIG_MODULES is not set CONFIG_BLOCK=y # CONFIG_BLOCK_LEGACY_AUTOLOAD is not set # CONFIG_BLK_DEV_BSGLIB is not set # CONFIG_BLK_DEV_INTEGRITY is not set # CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y CONFIG_EFI_PARTITION=y # end of Partition Types # # IO Schedulers # # CONFIG_MQ_IOSCHED_DEADLINE is not set # CONFIG_MQ_IOSCHED_KYBER is not set # CONFIG_IOSCHED_BFQ is not set # end of IO Schedulers CONFIG_INLINE_SPIN_UNLOCK_IRQ=y CONFIG_INLINE_READ_UNLOCK=y CONFIG_INLINE_READ_UNLOCK_IRQ=y CONFIG_INLINE_WRITE_UNLOCK=y CONFIG_INLINE_WRITE_UNLOCK_IRQ=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y # # Executable file formats # # CONFIG_BINFMT_ELF is not set # CONFIG_BINFMT_SCRIPT is not set # CONFIG_BINFMT_MISC is not set CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # # CONFIG_SWAP is not set # # SLAB allocator options # # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLAB_MERGE_DEFAULT is not set # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set # CONFIG_SLUB_STATS is not set # end of SLAB allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y # CONFIG_SPARSEMEM_VMEMMAP is not set CONFIG_HAVE_FAST_GUP=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y # CONFIG_COMPACTION is not set # CONFIG_PAGE_REPORTING is not set CONFIG_PHYS_ADDR_T_64BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANTS_THP_SWAP=y # CONFIG_TRANSPARENT_HUGEPAGE is not set CONFIG_NEED_PER_CPU_KM=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y # CONFIG_CMA is not set CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # # GUP_TEST needs to have DEBUG_FS enabled # CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_SECRETMEM=y # CONFIG_ANON_VMA_NAME is not set # CONFIG_USERFAULTFD is not set # CONFIG_LRU_GEN is not set # # Data Access Monitoring # # CONFIG_DAMON is not set # end of Data Access Monitoring # end of Memory Management options # CONFIG_NET is not set # # Device Drivers # CONFIG_HAVE_EISA=y # CONFIG_EISA is not set CONFIG_HAVE_PCI=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set # # Generic Driver Options # # CONFIG_UEVENT_HELPER is not set # CONFIG_DEVTMPFS is not set # CONFIG_STANDALONE is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_FW_LOADER_USER_HELPER is not set # CONFIG_FW_LOADER_COMPRESS is not set # CONFIG_FW_UPLOAD is not set # end of Firmware loader CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y # end of Generic Driver Options # # Bus devices # # CONFIG_ARM_INTEGRATOR_LM is not set # CONFIG_BT1_APB is not set # CONFIG_BT1_AXI is not set # CONFIG_HISILICON_LPC is not set # CONFIG_INTEL_IXP4XX_EB is not set # CONFIG_QCOM_EBI2 is not set # CONFIG_MHI_BUS is not set # CONFIG_MHI_BUS_EP is not set # end of Bus devices # # Firmware Drivers # # # ARM System Control and Management Interface Protocol # # CONFIG_ARM_SCMI_PROTOCOL is not set # end of ARM System Control and Management Interface Protocol # CONFIG_EDD is not set CONFIG_FIRMWARE_MEMMAP=y # CONFIG_DMIID is not set # CONFIG_DMI_SYSFS is not set CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y # CONFIG_FW_CFG_SYSFS is not set # CONFIG_SYSFB_SIMPLEFB is not set # CONFIG_BCM47XX_NVRAM is not set # CONFIG_GOOGLE_FIRMWARE is not set # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers # CONFIG_GNSS is not set # CONFIG_MTD is not set # CONFIG_OF is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y # CONFIG_PARPORT is not set # CONFIG_BLK_DEV is not set # # NVME Support # # CONFIG_NVME_FC is not set # end of NVME Support # # Misc devices # # CONFIG_DUMMY_IRQ is not set # CONFIG_ATMEL_SSC is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_QCOM_COINCELL is not set # CONFIG_SRAM is not set # CONFIG_XILINX_SDFEC is not set # CONFIG_C2PORT is not set # # EEPROM support # # CONFIG_EEPROM_93CX6 is not set # end of EEPROM support # # Texas Instruments shared transport line discipline # # end of Texas Instruments shared transport line discipline # # Altera FPGA firmware download module (requires I2C) # # CONFIG_ECHO is not set # CONFIG_PVPANIC is not set # end of Misc devices # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set # CONFIG_SCSI is not set # end of SCSI device support # CONFIG_ATA is not set # CONFIG_MD is not set # CONFIG_TARGET_CORE is not set # # IEEE 1394 (FireWire) support # # CONFIG_FIREWIRE is not set # end of IEEE 1394 (FireWire) support # CONFIG_MACINTOSH_DRIVERS is not set # # Input device support # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_SPARSEKMAP is not set # CONFIG_INPUT_MATRIXKMAP is not set # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set # CONFIG_RMI4_CORE is not set # # Hardware I/O ports # # CONFIG_SERIO is not set CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y # CONFIG_GAMEPORT is not set # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set # CONFIG_LDISC_AUTOLOAD is not set # # Serial drivers # # CONFIG_SERIAL_8250 is not set # # Non-8250 serial port support # # CONFIG_SERIAL_AMBA_PL010 is not set # CONFIG_SERIAL_MESON is not set # CONFIG_SERIAL_CLPS711X is not set # CONFIG_SERIAL_SAMSUNG is not set # CONFIG_SERIAL_TEGRA is not set # CONFIG_SERIAL_IMX is not set # CONFIG_SERIAL_UARTLITE is not set # CONFIG_SERIAL_SH_SCI is not set # CONFIG_SERIAL_MSM is not set # CONFIG_SERIAL_VT8500 is not set # CONFIG_SERIAL_OMAP is not set # CONFIG_SERIAL_LANTIQ is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_TIMBERDALE is not set # CONFIG_SERIAL_BCM63XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_MXS_AUART is not set # CONFIG_SERIAL_MPS2_UART is not set # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_ST_ASC is not set # CONFIG_SERIAL_STM32 is not set # CONFIG_SERIAL_OWL is not set # CONFIG_SERIAL_RDA is not set # CONFIG_SERIAL_LITEUART is not set # CONFIG_SERIAL_SUNPLUS is not set # end of Serial drivers # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NULL_TTY is not set # CONFIG_SERIAL_DEV_BUS is not set # CONFIG_VIRTIO_CONSOLE is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_ASPEED_KCS_IPMI_BMC is not set # CONFIG_NPCM7XX_KCS_IPMI_BMC is not set # CONFIG_HW_RANDOM is not set # CONFIG_MWAVE is not set # CONFIG_DEVMEM is not set # CONFIG_NVRAM is not set # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set # CONFIG_TELCLOCK is not set # CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # end of Character devices # # I2C support # # CONFIG_I2C is not set # end of I2C support # CONFIG_I3C is not set # CONFIG_SPI is not set # CONFIG_SPMI is not set # CONFIG_HSI is not set # CONFIG_PPS is not set # # PTP clock support # CONFIG_PTP_1588_CLOCK_OPTIONAL=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # # end of PTP clock support # CONFIG_PINCTRL is not set # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set # CONFIG_POWER_RESET is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set # CONFIG_WATCHDOG is not set CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set CONFIG_BCMA_POSSIBLE=y # CONFIG_BCMA is not set # # Multifunction device drivers # # CONFIG_MFD_SUN4I_GPADC is not set # CONFIG_MFD_AT91_USART is not set # CONFIG_MFD_MADERA is not set # CONFIG_MFD_EXYNOS_LPASS is not set # CONFIG_MFD_MXS_LRADC is not set # CONFIG_MFD_MX25_TSADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_SM501 is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_SUN6I_PRCM is not set # CONFIG_MFD_SYSCON is not set # CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_MFD_TQMX86 is not set # CONFIG_MFD_STM32_LPTIMER is not set # CONFIG_MFD_STM32_TIMERS is not set # end of Multifunction device drivers # CONFIG_REGULATOR is not set # CONFIG_RC_CORE is not set # # CEC support # # CONFIG_MEDIA_CEC_SUPPORT is not set # end of CEC support # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # # CONFIG_IMX_IPUV3_CORE is not set # CONFIG_DRM is not set # # ARM devices # # end of ARM devices # # Frame buffer Devices # # CONFIG_FB is not set # CONFIG_MMP_DISP is not set # end of Frame buffer Devices # # Backlight & LCD device support # # CONFIG_LCD_CLASS_DEVICE is not set # CONFIG_BACKLIGHT_CLASS_DEVICE is not set # end of Backlight & LCD device support # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 # end of Console display driver support # end of Graphics support # CONFIG_SOUND is not set # # HID support # # CONFIG_HID is not set # end of HID support CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_SUPPORT is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set # CONFIG_NEW_LEDS is not set # CONFIG_ACCESSIBILITY is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y # CONFIG_RTC_CLASS is not set # CONFIG_DMADEVICES is not set # # DMABUF options # # CONFIG_SYNC_FILE is not set # CONFIG_DMABUF_HEAPS is not set # end of DMABUF options # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set # CONFIG_VFIO is not set # CONFIG_VIRT_DRIVERS is not set # CONFIG_VIRTIO_MENU is not set # CONFIG_VHOST_MENU is not set # # Microsoft Hyper-V guest support # # end of Microsoft Hyper-V guest support # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set # CONFIG_STAGING is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_OLPC_XO175 is not set # CONFIG_SURFACE_PLATFORMS is not set # CONFIG_X86_PLATFORM_DEVICES is not set # CONFIG_COMMON_CLK is not set # CONFIG_HWSPINLOCK is not set # # Clock Source drivers # CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y # CONFIG_BCM2835_TIMER is not set # CONFIG_BCM_KONA_TIMER is not set # CONFIG_DAVINCI_TIMER is not set # CONFIG_DIGICOLOR_TIMER is not set # CONFIG_OMAP_DM_TIMER is not set # CONFIG_DW_APB_TIMER is not set # CONFIG_FTTMR010_TIMER is not set # CONFIG_IXP4XX_TIMER is not set # CONFIG_MESON6_TIMER is not set # CONFIG_OWL_TIMER is not set # CONFIG_RDA_TIMER is not set # CONFIG_SUN4I_TIMER is not set # CONFIG_TEGRA_TIMER is not set # CONFIG_VT8500_TIMER is not set # CONFIG_NPCM7XX_TIMER is not set # CONFIG_ASM9260_TIMER is not set # CONFIG_CLKSRC_DBX500_PRCMU is not set # CONFIG_CLPS711X_TIMER is not set # CONFIG_MXS_TIMER is not set # CONFIG_NSPIRE_TIMER is not set # CONFIG_INTEGRATOR_AP_TIMER is not set # CONFIG_CLKSRC_PISTACHIO is not set # CONFIG_CLKSRC_STM32_LP is not set # CONFIG_ARMV7M_SYSTICK is not set # CONFIG_ATMEL_PIT is not set # CONFIG_ATMEL_ST is not set # CONFIG_CLKSRC_SAMSUNG_PWM is not set # CONFIG_FSL_FTM_TIMER is not set # CONFIG_OXNAS_RPS_TIMER is not set # CONFIG_MTK_TIMER is not set # CONFIG_SH_TIMER_CMT is not set # CONFIG_SH_TIMER_MTU2 is not set # CONFIG_RENESAS_OSTM is not set # CONFIG_SH_TIMER_TMU is not set # CONFIG_EM_TIMER_STI is not set # CONFIG_CLKSRC_PXA is not set # CONFIG_TIMER_IMX_SYS_CTR is not set # CONFIG_CLKSRC_ST_LPC is not set # CONFIG_GXP_TIMER is not set # CONFIG_MSC313E_TIMER is not set # CONFIG_MICROCHIP_PIT64B is not set # end of Clock Source drivers # CONFIG_MAILBOX is not set # CONFIG_IOMMU_SUPPORT is not set # # Remoteproc drivers # # CONFIG_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # CONFIG_MESON_CANVAS is not set # CONFIG_MESON_CLK_MEASURE is not set # CONFIG_MESON_GX_SOCINFO is not set # CONFIG_MESON_MX_SOCINFO is not set # end of Amlogic SoC drivers # # Apple SoC drivers # # CONFIG_APPLE_SART is not set # end of Apple SoC drivers # # ASPEED SoC drivers # # CONFIG_ASPEED_LPC_CTRL is not set # CONFIG_ASPEED_LPC_SNOOP is not set # CONFIG_ASPEED_UART_ROUTING is not set # CONFIG_ASPEED_P2A_CTRL is not set # CONFIG_ASPEED_SOCINFO is not set # end of ASPEED SoC drivers # CONFIG_AT91_SOC_ID is not set # CONFIG_AT91_SOC_SFR is not set # # Broadcom SoC drivers # # CONFIG_SOC_BCM63XX is not set # CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # fujitsu SoC drivers # # end of fujitsu SoC drivers # # i.MX SoC drivers # # CONFIG_SOC_IMX8M is not set # CONFIG_SOC_IMX9 is not set # end of i.MX SoC drivers # # IXP4xx SoC drivers # # CONFIG_IXP4XX_QMGR is not set # CONFIG_IXP4XX_NPE is not set # end of IXP4xx SoC drivers # # Enable LiteX SoC Builder specific drivers # # CONFIG_LITEX_SOC_CONTROLLER is not set # end of Enable LiteX SoC Builder specific drivers # # MediaTek SoC drivers # # CONFIG_MTK_CMDQ is not set # CONFIG_MTK_DEVAPC is not set # CONFIG_MTK_INFRACFG is not set # CONFIG_MTK_MMSYS is not set # end of MediaTek SoC drivers # # Qualcomm SoC drivers # # CONFIG_QCOM_GENI_SE is not set # CONFIG_QCOM_GSBI is not set # CONFIG_QCOM_LLCC is not set # CONFIG_QCOM_RPMH is not set # CONFIG_QCOM_SPM is not set # CONFIG_QCOM_ICC_BWMON is not set # end of Qualcomm SoC drivers # CONFIG_SOC_RENESAS is not set # CONFIG_ROCKCHIP_GRF is not set # CONFIG_SOC_SAMSUNG is not set # CONFIG_SOC_TI is not set # CONFIG_UX500_SOC_ID is not set # # Xilinx SoC drivers # # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set # CONFIG_IIO is not set # CONFIG_PWM is not set # # IRQ chip support # # CONFIG_AL_FIC is not set # CONFIG_RENESAS_INTC_IRQPIN is not set # CONFIG_RENESAS_IRQC is not set # CONFIG_RENESAS_RZA1_IRQC is not set # CONFIG_RENESAS_RZG2L_IRQC is not set # CONFIG_SL28CPLD_INTC is not set # CONFIG_TS4800_IRQ is not set # CONFIG_INGENIC_TCU_IRQ is not set # CONFIG_IRQ_UNIPHIER_AIDET is not set # CONFIG_MESON_IRQ_GPIO is not set # CONFIG_IMX_IRQSTEER is not set # CONFIG_IMX_INTMUX is not set # CONFIG_EXYNOS_IRQ_COMBINER is not set # CONFIG_MST_IRQ is not set # CONFIG_MCHP_EIC is not set # CONFIG_SUNPLUS_SP7021_INTC is not set # end of IRQ chip support # CONFIG_IPACK_BUS is not set # CONFIG_RESET_CONTROLLER is not set # # PHY Subsystem # # CONFIG_GENERIC_PHY is not set # CONFIG_PHY_PISTACHIO_USB is not set # CONFIG_PHY_CAN_TRANSCEIVER is not set # # PHY drivers for Broadcom platforms # # CONFIG_PHY_BCM63XX_USBH is not set # CONFIG_BCM_KONA_USB2_PHY is not set # end of PHY drivers for Broadcom platforms # CONFIG_PHY_HI6220_USB is not set # CONFIG_PHY_HI3660_USB is not set # CONFIG_PHY_HI3670_USB is not set # CONFIG_PHY_HI3670_PCIE is not set # CONFIG_PHY_HISTB_COMBPHY is not set # CONFIG_PHY_HISI_INNO_USB2 is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_PXA_USB is not set # CONFIG_PHY_MMP3_USB is not set # CONFIG_PHY_MMP3_HSIC is not set # CONFIG_PHY_MT7621_PCI is not set # CONFIG_PHY_RALINK_USB is not set # CONFIG_PHY_RCAR_GEN3_USB3 is not set # CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set # CONFIG_PHY_ROCKCHIP_PCIE is not set # CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set # CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set # CONFIG_PHY_SAMSUNG_USB2 is not set # CONFIG_PHY_ST_SPEAR1310_MIPHY is not set # CONFIG_PHY_ST_SPEAR1340_MIPHY is not set # CONFIG_PHY_TEGRA194_P2U is not set # CONFIG_PHY_DA8XX_USB is not set # CONFIG_OMAP_CONTROL_PHY is not set # CONFIG_TI_PIPE3 is not set # CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set # CONFIG_PHY_INTEL_KEEMBAY_USB is not set # CONFIG_PHY_INTEL_LGM_EMMC is not set # CONFIG_PHY_XILINX_ZYNQMP is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set # CONFIG_MCB is not set # # Performance monitor support # # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set # CONFIG_FSL_IMX8_DDR_PMU is not set # CONFIG_XGENE_PMU is not set # CONFIG_ARM_DMC620_PMU is not set # CONFIG_MARVELL_CN10K_TAD_PMU is not set # CONFIG_ALIBABA_UNCORE_DRW_PMU is not set # CONFIG_MARVELL_CN10K_DDR_PMU is not set # end of Performance monitor support # CONFIG_RAS is not set # # Android # # CONFIG_ANDROID_BINDER_IPC is not set # end of Android # CONFIG_DAX is not set # CONFIG_NVMEM is not set # # HW tracing support # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set # end of HW tracing support # CONFIG_FPGA is not set # CONFIG_TEE is not set # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set # CONFIG_PECI is not set # CONFIG_HTE is not set # end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set # CONFIG_EXT4_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set CONFIG_FILE_LOCKING=y # CONFIG_FS_ENCRYPTION is not set # CONFIG_FS_VERITY is not set # CONFIG_DNOTIFY is not set # CONFIG_INOTIFY_USER is not set # CONFIG_FANOTIFY is not set # CONFIG_QUOTA is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_AUTOFS_FS is not set # CONFIG_FUSE_FS is not set # CONFIG_OVERLAY_FS is not set # # Caches # # CONFIG_FSCACHE is not set # end of Caches # # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set # CONFIG_UDF_FS is not set # end of CD-ROM/DVD Filesystems # # DOS/FAT/EXFAT/NT Filesystems # # CONFIG_MSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_EXFAT_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS3_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y # CONFIG_PROC_KCORE is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set CONFIG_PROC_PID_ARCH_STATUS=y CONFIG_KERNFS=y CONFIG_SYSFS=y # CONFIG_TMPFS is not set # CONFIG_HUGETLBFS is not set CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y # CONFIG_CONFIGFS_FS is not set # end of Pseudo filesystems # CONFIG_MISC_FILESYSTEMS is not set # CONFIG_NLS is not set # CONFIG_UNICODE is not set CONFIG_IO_WQ=y # end of File systems # # Security options # # CONFIG_KEYS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y # CONFIG_HARDENED_USERCOPY is not set # CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" # # Kernel hardening options # # # Memory initialization # CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization CONFIG_RANDSTRUCT_NONE=y # end of Kernel hardening options # end of Security options # CONFIG_CRYPTO is not set # # Library routines # # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y # # Crypto library routines # CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y # CONFIG_CRYPTO_LIB_CHACHA is not set # CONFIG_CRYPTO_LIB_CURVE25519 is not set CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 # CONFIG_CRYPTO_LIB_POLY1305 is not set # end of Crypto library routines # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_T10DIF is not set # CONFIG_CRC64_ROCKSOFT is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set # CONFIG_CRC64 is not set # CONFIG_CRC4 is not set # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set # CONFIG_CRC8 is not set # CONFIG_RANDOM32_SELFTEST is not set # CONFIG_XZ_DEC is not set CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_SWIOTLB=y # CONFIG_DMA_API_DEBUG is not set # CONFIG_IRQ_POLL is not set CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_COPY_MC=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y CONFIG_SBITMAP=y # CONFIG_PARMAN is not set # CONFIG_OBJAGG is not set # end of Library routines # # Kernel hacking # # # printk and dmesg options # # CONFIG_PRINTK_TIME is not set # CONFIG_PRINTK_CALLER is not set # CONFIG_STACKTRACE_BUILD_ID is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DYNAMIC_DEBUG_CORE is not set # CONFIG_SYMBOLIC_ERRNAME is not set CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options # CONFIG_DEBUG_KERNEL is not set # # Compile-time checks and compiler options # CONFIG_AS_HAS_NON_CONST_LEB128=y CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_HEADERS_INSTALL is not set CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_OBJTOOL=y # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # # CONFIG_MAGIC_SYSRQ is not set # CONFIG_DEBUG_FS is not set CONFIG_HAVE_ARCH_KGDB=y CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments # # Networking Debugging # # end of Networking Debugging # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set CONFIG_SLUB_DEBUG=y # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_PAGE_TABLE_CHECK is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_DEBUG_MEMORY_INIT=y CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_HAVE_ARCH_KFENCE=y # CONFIG_KFENCE is not set CONFIG_HAVE_ARCH_KMSAN=y # end of Memory Debugging # # Debug Oops, Lockups and Hangs # # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # # end of Scheduler Debugging # CONFIG_DEBUG_TIMEKEEPING is not set # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_WW_MUTEX_SELFTEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # # Debug kernel data structures # # CONFIG_BUG_ON_DATA_CORRUPTION is not set # end of Debug kernel data structures # # RCU Debugging # # end of RCU Debugging CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y CONFIG_HAVE_OBJTOOL_MCOUNT=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # # x86 Debugging # # CONFIG_X86_VERBOSE_BOOTUP is not set CONFIG_EARLY_PRINTK=y CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_UDELAY is not set # CONFIG_IO_DELAY_NONE is not set CONFIG_UNWINDER_ORC=y # CONFIG_UNWINDER_FRAME_POINTER is not set # end of x86 Debugging # # Kernel Testing and Coverage # # CONFIG_KUNIT is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage # # Rust hacking # # end of Rust hacking CONFIG_WARN_MISSING_DOCUMENTS=y CONFIG_WARN_ABI_ERRORS=y # end of Kernel hacking ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-12-01 14:00 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-11-30 9:21 [PATCH v5 0/2] Add pixel formats used in Synatpics SoC Hsia-Jun Li 2022-11-30 9:21 ` [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers Hsia-Jun Li 2022-11-30 11:30 ` Daniel Vetter 2022-11-30 16:49 ` Randy Li 2022-12-01 9:38 ` Daniel Vetter 2022-12-01 13:59 ` Randy Li 2022-11-30 9:21 ` [PATCH v5 2/2] Documentation/gpu: Add Synaptics tiling formats documentation Hsia-Jun Li 2022-12-01 7:25 ` kernel test robot
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