From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/5] clk: tegra: Halve SCLK rate on Tegra20
Date: Fri, 15 Jan 2021 16:14:04 +0100 [thread overview]
Message-ID: <YAGxPEWGN3sgovJo@ulmo> (raw)
In-Reply-To: <20210112122724.1712-5-digetx@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 579 bytes --]
On Tue, Jan 12, 2021 at 03:27:23PM +0300, Dmitry Osipenko wrote:
> Higher SCLK rates on Tegra20 require high core voltage. The higher
> clock rate may have a positive performance effect only for AHB DMA
> transfers and AVP CPU, but both aren't used by upstream kernel at all.
> Halve SCLK rate on Tegra20 in order to remove the high core voltage
> requirement.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> drivers/clk/tegra/clk-tegra20.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Acked-by: Thierry Reding <treding@nvidia.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2021-01-15 15:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-12 12:27 [PATCH v2 0/5] Couple improvements for Tegra clk driver Dmitry Osipenko
2021-01-12 12:27 ` [PATCH v2 1/5] clk: tegra30: Use 300MHz for video decoder by default Dmitry Osipenko
2021-01-15 15:02 ` Thierry Reding
2021-01-12 12:27 ` [PATCH v2 2/5] clk: tegra: Fix refcounting of gate clocks Dmitry Osipenko
2021-01-15 15:17 ` Thierry Reding
2021-01-12 12:27 ` [PATCH v2 3/5] clk: tegra: Ensure that PLLU configuration is applied properly Dmitry Osipenko
2021-01-15 15:13 ` Thierry Reding
2021-01-12 12:27 ` [PATCH v2 4/5] clk: tegra: Halve SCLK rate on Tegra20 Dmitry Osipenko
2021-01-15 15:14 ` Thierry Reding [this message]
2021-01-12 12:27 ` [PATCH v2 5/5] MAINTAINERS: Hand Tegra clk driver to Jon and Thierry Dmitry Osipenko
2021-01-15 15:15 ` Thierry Reding
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YAGxPEWGN3sgovJo@ulmo \
--to=thierry.reding@gmail.com \
--cc=digetx@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=pdeschrijver@nvidia.com \
--cc=pgaikwad@nvidia.com \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).