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From: Thierry Reding <thierry.reding@gmail.com>
To: JC Kuo <jckuo@nvidia.com>
Cc: gregkh@linuxfoundation.org, robh@kernel.org,
	jonathanh@nvidia.com, kishon@ti.com, linux-tegra@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, nkristam@nvidia.com
Subject: Re: [PATCH v6 04/15] phy: tegra: xusb: tegra210: Do not reset UPHY PLL
Date: Tue, 19 Jan 2021 14:52:00 +0100	[thread overview]
Message-ID: <YAbkABc68aMTvIyr@ulmo> (raw)
In-Reply-To: <20210119085546.725005-5-jckuo@nvidia.com>

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On Tue, Jan 19, 2021 at 04:55:35PM +0800, JC Kuo wrote:
> Once UPHY PLL hardware power sequencer is enabled, do not assert
> reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken.
> This commit removes reset_control_assert(pcie->rst) and
> reset_control_assert(sata->rst) from PEX/SATA UPHY disable procedure.
> 
> Signed-off-by: JC Kuo <jckuo@nvidia.com>
> ---
> v6:
>    no change
> v5:
>    no change
> v4:
>    no change
> v3:
>    new, was a part of "phy: tegra: xusb: Rearrange UPHY init on Tegra210"
> 
>  drivers/phy/tegra/xusb-tegra210.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c
> index 4dc9286ec1b8..9bfecdfecf35 100644
> --- a/drivers/phy/tegra/xusb-tegra210.c
> +++ b/drivers/phy/tegra/xusb-tegra210.c
> @@ -502,7 +502,6 @@ static void tegra210_pex_uphy_disable(struct tegra_xusb_padctl *padctl)
>  	if (--pcie->enable > 0)
>  		return;
>  
> -	reset_control_assert(pcie->rst);
>  	clk_disable_unprepare(pcie->pll);
>  }
>  
> @@ -739,7 +738,6 @@ static void tegra210_sata_uphy_disable(struct tegra_xusb_padctl *padctl)
>  	if (--sata->enable > 0)
>  		return;
>  
> -	reset_control_assert(sata->rst);
>  	clk_disable_unprepare(sata->pll);
>  }

Isn't this going to break things between here and patch 5 where the
hardware sequencer is enabled? If so, it might be better to move this
into patch 5 so that things stay functional and bisectible.

Thierry

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  reply	other threads:[~2021-01-20  0:10 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-19  8:55 [PATCH v6 00/15] Tegra XHCI controller ELPG support JC Kuo
2021-01-19  8:55 ` [PATCH v6 01/15] clk: tegra: Add PLLE HW power sequencer control JC Kuo
2021-01-19 14:11   ` Thierry Reding
2021-02-11  3:06   ` Stephen Boyd
2021-01-19  8:55 ` [PATCH v6 02/15] clk: tegra: Don't enable PLLE HW sequencer at init JC Kuo
2021-01-19 14:12   ` Thierry Reding
2021-02-11  3:06   ` Stephen Boyd
2021-01-19  8:55 ` [PATCH v6 03/15] phy: tegra: xusb: Move usb3 port init for Tegra210 JC Kuo
2021-01-19  8:55 ` [PATCH v6 04/15] phy: tegra: xusb: tegra210: Do not reset UPHY PLL JC Kuo
2021-01-19 13:52   ` Thierry Reding [this message]
2021-01-20  1:42     ` JC Kuo
2021-01-19  8:55 ` [PATCH v6 05/15] phy: tegra: xusb: Rearrange UPHY init on Tegra210 JC Kuo
2021-01-19  8:55 ` [PATCH v6 06/15] phy: tegra: xusb: Add Tegra210 lane_iddq operation JC Kuo
2021-01-19  8:55 ` [PATCH v6 07/15] phy: tegra: xusb: Add sleepwalk and suspend/resume JC Kuo
2021-01-19 13:54   ` Thierry Reding
2021-01-19  8:55 ` [PATCH v6 08/15] soc/tegra: pmc: Provide USB sleepwalk register map JC Kuo
2021-01-19  8:55 ` [PATCH v6 09/15] arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop JC Kuo
2021-01-19  8:55 ` [PATCH v6 10/15] dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop JC Kuo
2021-01-19  8:55 ` [PATCH v6 11/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra210 JC Kuo
2021-01-19 13:58   ` Thierry Reding
2021-01-19  8:55 ` [PATCH v6 12/15] phy: tegra: xusb: Tegra210 host mode VBUS control JC Kuo
2021-01-19  8:55 ` [PATCH v6 13/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra186 JC Kuo
2021-01-19 13:59   ` Thierry Reding
2021-01-19  8:55 ` [PATCH v6 14/15] usb: host: xhci-tegra: Unlink power domain devices JC Kuo
2021-01-19 14:04   ` Thierry Reding
2021-01-19  8:55 ` [PATCH v6 15/15] xhci: tegra: Enable ELPG for runtime/system PM JC Kuo
2021-01-19 14:04   ` Thierry Reding
2021-01-19 14:07 ` [PATCH v6 00/15] Tegra XHCI controller ELPG support Thierry Reding

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